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N-Channel 100-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
Qg (Max.) (nC)
Qgs (nC)
Qgd (nC)
Configuration
100
VGS = 10 V
0.20
16
4.4
7.7
Single
• Halogen-free According to IEC 61249-2-21
Definition
• Available in Tape and Reel
• Dynamic dV/dt Rating
• Repetitive Avalanche Rated
• 175 °C Operating Temperature
• Fast Switching
• Ease of Paralleling
Available
Available
D
TO-252
G
S
G
D
N-Channel MOSFET
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Currenta
SYMBOL
VDS
VGS
VGS at 10 V
TC = 25 °C
TC = 100 °C
ID
Pulsed Drain
IDM
Linear Derating Factor
Linear Derating Factor (PCB Mount)
Single Pulse Avalanche Energyb
EAS
Avalanche Currenta
IAR
EAR
Repetitive Avalanche Energya
Maximum Power Dissipation
TC = 25 °C
PD
TA = 25 °C
Maximum Power Dissipation (PCB Mount)
dV/dt
Peak Diode Recovery dV/dtc
TJ, Tstg
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
For 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 3.5 mH, Rg = 25 , IAS = 9.2 A (see fig. 12).
c. ISD 9.2 A, dI/dt 110 A/μs, VDD VDS, TJ 175 °C.
LIMIT
100
± 20
12
7.5
37
0.40
0.025
200
9.2
6.0
60
3.7
5.5
- 55 to + 175
300d
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
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THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Maximum Junction-to-Ambient
(PCB Mount)a
RthJA
-
40
Maximum Junction-to-Case (Drain)
RthJC
-
2.5
UNIT
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0, ID = 250 μA
100
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.13
-
V/°C
VGS(th)
VDS = VGS, ID = 250 μA
1.5
-
3.0
V
nA
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Forward Transconductance
IGSS
IDSS
RDS(on)
gfs
VGS = ± 20 V
-
-
± 100
VDS = 100 V, VGS = 0 V
-
-
25
VDS = 80 V, VGS = 0 V, TJ = 150 °C
-
-
250
-
0.20
-
2.7
-
-
S
-
360
-
ID = 5.5 Ab
VGS = 10 V
VDS = 50 V, ID = 5.5
Ab
μA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
VGS = 10 V
ID = 9.2 A, VDS = 80 V,
see fig. 6 and 13b
-
150
-
-
34
-
-
-
16
-
-
4.4
Gate-Drain Charge
Qgd
-
-
7.7
Turn-On Delay Time
td(on)
-
8.8
-
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
tr
td(off)
VDD = 50 V, ID = 9.2 A,
Rg = 18 , RD = 5.2 , see fig. 10b
tf
LD
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
-
30
-
-
19
-
-
20
-
-
4.5
-
-
7.5
-
-
-
9.2
-
-
37
pF
nC
ns
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
IS
ISM
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 9.2 A, VGS = 0
S
Vb
TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/μsb
-
-
1.8
V
-
110
260
ns
-
0.53
1.3
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
VGS
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
Top
25 °C
101
4.5 V
100
ID, Drain Current (A)
ID, Drain Current (A)
101
175 °C
100
20 µs Pulse Width
TC = 25 °C
10-1
100
101
4
VDS, Drain-to-Source Voltage (V)
91018_01
20 µs Pulse Width
VDS = 50 V
91018_03
Fig. 1 - Typical Output Characteristics, TC = 25 °C
4.5 V
100
20 µs Pulse Width
TC = 175 °C
10-1
91018_02
100
101
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics, TC = 175 °C
6
7
8
9
10
Fig. 3 - Typical Transfer Characteristics
RDS(on), Drain-to-Source On Resistance
(Normalized)
ID, Drain Current (A)
101
VGS
Top
15 V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom 4.5 V
5
VGS, Gate-to-Source Voltage (V)
91018_04
3.0
2.5
ID = 9.2 A
VGS = 10 V
2.0
1.5
1.0
0.5
0.0
- 60 - 40 - 20 0
20 40 60 80 100 120 140 160 180
TJ, Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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VGS = 0 V, f = 1 MHz
Ciss = Cgs + Cgd, Cds Shorted
Crss = Cgd
Coss = Cds + Cgd
Capacitance (pF)
600
450
Ciss
300
Coss
150
Crss
101
175 °C
ISD, Reverse Drain Current (A)
750
25 °C
100
0
100
VDS, Drain-to-Source Voltage (V)
91018_05
VDS = 20 V
8
4
8
12
1.2
102
5
10 µs
2
100 µs
10
5
1 ms
2
10 ms
1
5
For test circuit
see figure 13
4
1.1
2
ID, Drain Current (A)
VGS, Gate-to-Source Voltage (V)
VDS = 80 V
VDS = 50 V
0
1.0
0.9
Operation in this area limited
by RDS(on)
5
0
91018_06
0.8
VSD, Source-to-Drain Voltage (V)
103
16
0.7
Fig. 7 - Typical Source-Drain Diode Forward Voltage
ID = 9.2 A
12
0.6
91018_07
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
VGS = 0 V
10-1
0.5
101
16
0.1
0.1
20
QG, Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
TC = 25 °C
TJ = 175 °C
Single Pulse
2
91018_08
2
5
1
2
5
10
2
5
102
2
5
103
VDS, Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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RD
VDS
VGS
10
8
ID, Drain Current (A)
D.U.T.
Rg
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
6
Fig. 10a - Switching Time Test Circuit
4
VDS
2
90 %
0
25
75
50
100
125
150
175
10 %
VGS
TC, Case Temperature (°C)
91018_09
td(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(off) tf
tr
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJC)
10
1
0 - 0.5
0.2
PDM
0.1
0.05
0.1
10-2
10-5
91018_11
t1
0.02
0.01
Single Pulse
(Thermal Response)
10-4
10-3
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
10-2
0.1
1
10
t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
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L
Vary tp to obtain
required IAS
VDS
VDS
tp
D.U.T.
Rg
+
-
I AS
VDD
V DD
VDS
10 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
EAS, Single Pulse Energy (mJ)
600
ID
3.8 A
6.5 A
Bottom 9.2 A
Top
500
400
300
200
100
VDD = 25 V
0
25
91018_12c
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
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Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
+
-
-
Rg
•
•
•
•
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
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TO-252AA CASE OUTLINE
E
MILLIMETERS
A
C2
e
b2
D1
e1
E1
L
gage plane height (0.5 mm)
L4
b
L5
H
D
L3
b3
C
A1
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
A
2.18
2.38
0.086
0.094
A1
-
0.127
-
0.005
b
0.64
0.88
0.025
0.035
b2
0.76
1.14
0.030
0.045
b3
4.95
5.46
0.195
0.215
C
0.46
0.61
0.018
0.024
C2
0.46
0.89
0.018
0.035
D
5.97
6.22
0.235
0.245
D1
5.21
-
0.205
-
E
6.35
6.73
0.250
0.265
E1
4.32
-
0.170
-
H
9.40
10.41
0.370
0.410
e
2.28 BSC
0.090 BSC
e1
4.56 BSC
0.180 BSC
L
1.40
1.78
0.055
0.070
L3
0.89
1.27
0.035
0.050
L4
-
1.02
-
0.040
L5
1.14
1.52
0.045
0.060
ECN: X12-0247-Rev. M, 24-Dec-12
DWG: 5347
Note
• Dimension L3 is for reference only.
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RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
0.243
0.087
(2.202)
0.090
(2.286)
(10.668)
0.420
(6.180)
(5.690)
0.180
0.055
(4.572)
(1.397)
Recommended Minimum Pads
Dimensions in Inches/(mm)
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