FSC-BW121A

FSC-BW121 Datasheet 0 Bluetooth 5.3 +WLAN 802.11 a/b/g/n/ac Module Datasheet Version 1.9 Shenzhen Feasycom Co.,Ltd -1- www.feasycom.com FSC-BW121 Datasheet Copyright © 2013-2023 Feasycom Technology. All Rights Reserved. Feasycom Technology reserves the right to make corrections, modifications, and other changes to its products, documentation and services at anytime. Customers should obtain the newest relevant information before placing orders. To minimize customer product risks, customers should provide adequate design and operating safeguards. Without written permission from Feasycom Technology, reproduction, transfer, distribution or storage of part or all of the contents in this document in any form is prohibited. Revision History Data 1.0 2019/02/20 Initial Version Notes Devin Wan 1.1 2019/04/28 1, Correction module and package image 2, The Notice about the stencil making 3, Add solder mask slivers next to the locating hole of the shield to prevent soldering tin from diffusing to the bonding pad on the back of the module. Devin Wan 1.2 2020/03/14 Modify Bluetooth Features: Require external MCU to execute Bluetooth protocol stack Devin Wan 1.3 2020/06/17 Modify the description and update the application circuit diagram (SDIO CLK line adds 5.6pF capacitor to ground) Devin Wan 1.4 2020/07/21 Selection of version Devin Wan 1.5 2020/12/03 Update selection of version Devin Wan 1.6 2021/08/19 Add BW121D Marsh Chen 1.7 2022/02/25 Update sequence diagram and modify some wrong descriptions Devin Wan 1.8 2022/05/24 Added dual antenna version, model FSC-BW121E, hardware version is V1.2 Devin Wan 1.8.1 2022/09/20 Updated Bluetooth version to V5.0, Recommended antenna and IPEX Devin Wan 1.8.2 2023/02/24 Add BW121EA, BW121EB, BW121EC Devin Wan 1.9 2023/03/29 Update Bluetooth version to 5.3 en zh en Sh Version om yc as Fe TD L ., Co Devin Wan Contact Us Shenzhen Feasycom Co.,LTD Email: sales@feasycom.com Address: Rm 508, Building A, Fenghuang Zhigu, No.50, Tiezai Road, Xixiang, Baoan District,Shenzhen,518100,China. Tel: 86-755-27924639 Shenzhen Feasycom Co.,Ltd -2- www.feasycom.com FSC-BW121 Datasheet Contents 1. INTRODUCTION ............................................................................................................................................................... 5 1.1 SELECTION OF VERSION ............................................................................................................................................................ 8 2. GENERAL SPECIFICATION ............................................................................................................................................... 10 3. HARDWARE SPECIFICATION ........................................................................................................................................ 11 3.1 BLOCK DIAGRAM AND PIN DIAGRAM ....................................................................................................................................... 11 3.2 PIN DEFINITION DESCRIPTIONS ............................................................................................................................................... 12 4. PHYSICAL INTERFACE ..................................................................................................................................................... 14 4.1 UART INTERFACE ................................................................................................................................................................. 14 4.2 BLUETOOTH PCM INTERFACE .................................................................................................................................................. 16 4.3 I2S INTERFACES .................................................................................................................................................................... 18 4.4 WLAN HOST INTERFACES....................................................................................................................................................... 20 SDIO V3.0 ................................................................................................................................................................. 20 4.4.2 SDIO Default Mode Timing....................................................................................................................................... 21 4.4.3 SDIO High-Speed Mode Timing ................................................................................................................................ 22 4.4.4 SDIO Bus Timing Specifications in SDR Modes ......................................................................................................... 23 4.4.5 Device Input Timing.................................................................................................................................................. 24 4.4.6 Device Output Timing ............................................................................................................................................... 24 4.4.7 SDIO Bus Timing Specifications in DDR50 Mode ...................................................................................................... 26 en zh en Sh Fe ELECTRICAL CHARACTERISTICS ...................................................................................................................................... 27 as 5. 4.4.1 om yc 5.1 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................... 27 5.2 RECOMMENDED OPERATING CONDITIONS ................................................................................................................................. 27 5.3 RF CHARACTERISTIC .............................................................................................................................................................. 28 WLAN RF Characteristics(Transmitter) ..................................................................................................................... 28 5.3.2 WLAN RF Characteristics(Receive) ........................................................................................................................... 28 5.3.3 Bluetooth RF Characteristics .................................................................................................................................... 29 L ., Co 5.3.1 TD 5.4 SYSTEM POWER SEQUENCE..................................................................................................................................................... 30 5.4.1 System Power On Sequence ..................................................................................................................................... 30 5.4.2 SDIO Reset Sequence ................................................................................................................................................ 32 5.4.3 WLAN and G-SPI Reset Sequence ............................................................................................................................. 32 5.4.4 Power Off Sequence ................................................................................................................................................. 33 5.4.5 WLAN Radio On/Off Sequence ................................................................................................................................. 34 5.4.6 BT Power On/Off Sequence ...................................................................................................................................... 35 5.4.7 Power Reset Sequence ............................................................................................................................................. 36 5.5 POWER CONSUMPTION .......................................................................................................................................................... 36 6. MSL & ESD..................................................................................................................................................................... 37 7. RECOMMENDED TEMPERATURE REFLOW PROFILE........................................................................................................ 37 8. MECHANICAL DETAILS ................................................................................................................................................... 38 8.1 MECHANICAL DETAILS............................................................................................................................................................ 38 Shenzhen Feasycom Co.,Ltd -3- www.feasycom.com FSC-BW121 Datasheet 9. HARDWARE INTEGRATION SUGGESTIONS ..................................................................................................................... 39 9.1 SOLDERING RECOMMENDATIONS ............................................................................................................................................. 39 9.2 LAYOUT GUIDELINES(INTERNAL ANTENNA)................................................................................................................................. 39 9.3 LAYOUT GUIDELINES(EXTERNAL ANTENNA) ................................................................................................................................ 40 9.3.1 Antenna Connection and Grounding Plane Design .................................................................................................. 41 9.3.2 Recommendable antenna & IPEX by Feasycom ....................................................................................................... 42 9.4 SDIO LINES LAYOUT GUIDELINE ............................................................................................................................................... 44 9.5 HCI LINES LAYOUT GUIDELINE ................................................................................................................................................. 44 9.6 PCM LINES LAYOUT GUIDELINE ............................................................................................................................................... 44 9.7 RTC CLOCK(32.768KHZ) LINES LAYOUT GUIDELINE .................................................................................................................... 44 9.8 POWER TRACE LINES LAYOUT GUIDELINE ................................................................................................................................... 44 9.9 GROUND LINES LAYOUT GUIDELINE .......................................................................................................................................... 45 10. PRODUCT PACKAGING INFORMATION ......................................................................................................................... 45 10.1 DEFAULT PACKING ............................................................................................................................................................... 45 10.2 APPLICATION SCHEMATIC ............................................................................................................................................ 47 en zh en Sh 11. PACKING BOX(OPTIONAL) ................................................................................................................................................... 46 om yc as Fe TD L ., Co Shenzhen Feasycom Co.,Ltd -4- www.feasycom.com FSC-BW121 Datasheet 1. INTRODUCTION Overview FSC-BW121 is a Wi-Fi / Bluetooth combo module that support 1-stream 802.11ac solutions with Multi-user MIMO (Multiple-Input, Multiple-Output) STA mode with integrated Bluetooth Smart Ready controller, SDIO (SDIO 1.1/2.0/3.0) interface, and HS-UART mixed interface. It combines a WLAN MAC, a 1T1R capable WLAN baseband, and RF in s single chip. It provides a complete solution for a high-performance integrated wireless and Bluetooth device. General Features CMOS MAC, Baseband PHY and RF in a single chip for IEEE 802.11a/b/g/n/ac compatible WLAN Support 802.11ac 1x1,Wave-2 compliant with MUMIMO STA mode Complete 802.11n MIMO en zh en Sh For legacy compatibility, Direct Sequence Spread Spectrum (DSSS), Complementary Code Keying (CCK) and OFDM baseband processing are included to support all IEEE 802.11b, 802.11g and 802.11a data rates. Differential phase shift keying modulation schemes, DBPSK and DQPSK with data scrambling capability are available, and CCK provides support for legacy data rates, with long or short preamble. The high speed FFT/IFFT paths, combined with BPSK, QPSK, 16QAM, 64QAM and 256QAM modulation of the individual subcarriers, and rate compatible coding rate of 1/2, 2/3, 3/4, and 5/6, provide up to 433.3Mbps for IEEE 802.11ac MIMO OFDM. FSC-BW121 Bluetooth controller complies with Bluetooth core specification v5.3, and supports dual mode (BR/EDR + Low Energy Controllers). It is compatible with previous versions, including v2.1 + EDR. For BR/EDR, it supports scatternet topology and allows active links in slave mode, and active links in master mode. For Low Energy, it supports multiple states and allows active links in master mode. The links in BR/EDR and LE can be active simultaneously. and 5Ghz band Host Interface Complies with SDIO 1.1/2.0/3.0 for WLAN with Fe FSC-BW121 builds in an enhanced signal detector, an adaptive frequency domain equalizer, and a softdecision Viterbi decoder to alleviate severe multi-path effects and mutual interference in the reception of multiple streams. Robust interference detection and suppression are provided to protect against Bluetooth, cordless phone, and microwave oven interference. solution for 2.4GHz clock rate up to 100MHz (SDR50 and DDR50) om yc as IEEE 802.11i (WPA, WPA2). Open, shared key, and pair-wise key authentication services TD Shenzhen Feasycom Co.,Ltd IEEE 802.11e QoS Enhancement (WMM) L ., FSC-BW121 MAC supports 802.11e for multimedia applications, 802.11i and WAPI (Wireless Authentication Privacy Infrastructure) for security, and 802.11n/802.11ac for enhanced MAC protocol efficiency. Using packet aggregation techniques such as A-MPDU with BA and A-MSDU, protocol efficiency is significantly improved. Power saving mechanisms such as Legacy Power Save, U-APSD, and MIMO power saving reduce the power wasted during idle time, and compensate for the extra power required to transmit MIMO OFDM. FSC-BW121 provides simple legacy, 20MHz/40MHz/80MHz co-existence mechanisms to ensure backward and network compatibility. IEEE 802.11a/b/g/n/ac compatible WLAN Co FSC-BW121 supports fast receiver Automatic Gain Control (AGC) with synchronous and asynchronous control loops among antennas, antenna diversity functions, and adaptive transmit power control functions to obtain better performance in the analog portions of the transceiver. Standards Supported IEEE 802.11h DFS, TPC, Spectrum Measurement MAC Features Frame aggregation for increased MAC efficiency (A-MSDU, A-MPDU) Low latency immediate Block Acknowledgement (BA) Long NAV for media reservation with CF-End for NAV release Maximum PHY data rate up to 86.7Mbps using 20MHz bandwidth, 200Mbps using 40MHz -5- www.feasycom.com FSC-BW121 Datasheet bandwidth, and 433.3Mbps using 80MHz PHY Features bandwidth. IEEE 802.11ac OFDM Backward compatible with 802.11a/b/g devices IEEE 802.11n OFDM while operating at 802.11n data rates One Transmit and One Receive path Backward compatible with 802.11a/n devices 5MHz / 10MHz / 20MHz / 40MHz / 80MHz while operating at 802.11ac data rates. bandwidth transmission G-SPI interface for configurable endian for WLAN Support 2.4Ghz and 5Ghz band channels Complies with HS-UART with configurable baud Short Guard Interval (400ns) rate for Bluetooth Sounding packet. IEEE 802.11k Radio Resource Measurement DSSS with DBPSK and DQPSK, CCK modulation WAPI (Wireless Authentication Privacy with long and short preamble Infrastructure) certified. OFDM with BPSK, QPSK, 16QAM, 64QAM and Cisco Compatible Extensions (CCX) for WLAN 256QAM modulation. Convolutional Coding Rate: en Sh devices 1/2, 2/3, 3/4, and 5/6 PHY-level spoofing to enhance legacy WiFi NAN (Neighborhood Area Network) support zh compatibility WiFi FTM (Fine Time Measurement) supported en MIMO power saving mechanism WiFi TDLS (Tunneled Direct Link Setup) Supported Fe Channel management and co-existence MIMO power saving mechanism Single external power source 3.3V only Maximum data rate 54Mbps in 802.11g, 150Mbps in 802.11n and 433Mbps in 802.11ac. TD assume multiple MAC identities when used as a Generates 40MHz clock for peripheral chip. L ., Multiple BSSID feature allows the BW121 to Support TCP/UDP/IP checksum offload Co Channel management and co-existence om yc compatibility CCA on secondary through RTS/CTS handshake. as PHY-level spoofing to enhance legacy Switch diversity used for DSSS/CCK wireless bridge Transmit Opportunity (TXOP) Short Inter-Frame Space (SIFS) bursting for higher multimedia Support STBC receiving Support LDPC transmitting Hardware antenna diversity bandwidth WiFi Direct supports wireless peer to peer Fast receiver Automatic Gain Control (AGC) On-chip ADC and DAC applications Build-in both 2.4GHz and 5GHz PA Other Features Supports Wake-On-WLAN Build-in both 2.4GHz and 5GHz LNA via Magic Packet and Wake-up frame Transmit Beam forming Shenzhen Feasycom Co.,Ltd -6- www.feasycom.com FSC-BW121 Datasheet Bluetooth Features Bluetooth 5.3 , Support Simultaneous LE & BR/EDR ,and High Duty Cycle Non-Connectable Advertising HS-UART interface for Bluetooth data transmission compliant with H4 and H5 specification (RTLS) Tags – Cloud Connectivity – Internet Gateway – Appliances – Security Systems – Smart Energy – Industrial Control – Smart Plug and Metering – Wireless Audio – IP Network Sensor Nodes – Medical Devices PCM interface for audio data transmission via Car audio and video system Bluetooth controller Require external MCU to execute Bluetooth proto col stack Module picture as below showing Supports all packet types in basic rate and enhanced data rate en Sh PIN No.1 Bluetooth Transceiver en range zh Fast AGC control to improve receiving dynamic Figure 1: Peripheral Interfaces FSC-BW121 Picture om yc as Supports Enhanced Power Control PIN No.8 Fe Integrated internal Class 1, Class 2, and Class 3 PA Supports SCO/eSCO link (allows one link for PCM TD Enhanced BT/WLAN Coexistence Control to L ., Supports Secure Simple Pairing Co interface and three links for HS-UART) improve transmission quality in different profiles Supports multiple Low Energy states Supports Bluetooth Low Energy Integrated 32K oscillator for power management Application Internet-of-Things (IoT) Applications, including: – Home and Building Automation – Low-Power Video Cameras – Thermostats – Access Control and Electronic Locks (E-Locks) – Asset Tracking and Real Time Location System Shenzhen Feasycom Co.,Ltd -7- www.feasycom.com FSC-BW121 Datasheet 1.1 Selection of version Order Number Module picture as below showing Descriptions FSC-BW121 (Default) (-40°C ~+85°C) PIN No.1 PIN No.45 FSC-BW121B (Optional) (-40°C ~+85°C) PIN No.1 PIN No.45 RF_IO_ Wi-Fi /BT NC External antenna(stamp hole，PIN No.1) NC RF_IO_ Wi-Fi/BT en zh en Sh External antenna(stamp hole，PIN No.45) PIN No.1 NC PIN No.45 NC External antenna (IPEX connector) FSC-BW121D (Optional) (-20°C ~+70°C) PIN No.1 RF_IO_ Wi-Fi/BT PIN No.45 NC External antenna(stamp hole，PIN No.1) FSC-BW121DI (Optional) (-20°C ~+70°C) PIN No.1 NC PIN No.45 NC External antenna (IPEX connector) om yc as Fe FSC-BW121C (Optional) (-40°C ~+85°C) -8- TD L ., Co Shenzhen Feasycom Co.,Ltd www.feasycom.com FSC-BW121 Datasheet FSC-BW121E (Optional) (-40°C ~+85°C) FSC-BW121EA (Optional) (-40°C ~+85°C) PIN No.1 2.4GHz Wi-Fi PIN No.45 2.4GHz BT + 5GHz Wi-Fi 1, Two external antennas must be soldered (stamp hole，PIN No.1 and PIN No.45) 2, PCB hardware version is V1.2 PIN No.1 NC PIN No.45 2.4GHz BT + 5GHz Wi-Fi 1, Position 1,External antenna (IPEX connector): 2.4GHz Wi-Fi 2, One external antennas must be soldered (stamp hole，PIN No.45) 3, PCB hardware version is V1.2 Position 1 FSC-BW121EC (Optional) (-40°C ~+85°C) PIN No.1 NC PIN No.45 NC 1, Position 1,External antenna (IPEX connector): 2.4GHz Wi-Fi 2, Position 2,External antenna (IPEX connector): 2.4GHz BT + 5GHz Wi-Fi 3, PCB hardware version is V1.2 Position 2 en zh FSC-BW121EB (Optional) (-40°C ~+85°C) en Sh PIN No.1 2.4GHz Wi-Fi PIN No.45 NC 1, Position 2,External antenna (IPEX connector): 2.4GHz BT + 5GHz Wi-Fi 2, One external antennas must be soldered (stamp hole，PIN No.1) 3, PCB hardware version is V1.2 as Fe Position 2 om yc TD L ., Co Position 1 See chapter 3.2 for details Shenzhen Feasycom Co.,Ltd -9- www.feasycom.com FSC-BW121 Datasheet 2. General Specification Table 1: General Specifications Categories Bluetooth Features Implementation Bluetooth Standard Bluetooth V5.3 LE & BR/EDR Frequency Band 2402MHz~2480MHz Interface UART/PCM WIFI WiFi Standard 802.11 a/b/g/n/ac Frequency Band 2412MHz~2484MHz /4900MHZ~5925MHz Interface SDIO General 17mm × 17 mm × 2.4mm Operating temperature -40°C ~+85°C, Storage temperature -40°C ~+85°C VDD_3V3_WL 3.0V~3.6V VDD_IO Warranty One Year 10% ~ 90% non-condensing MSL 3 Human Body Model: Pass ±2000 V, all pins Charge device model: Pass ±400 V, all pins om yc as ESD grade: Lead-free and RoHS compliant Fe MSL grade: Lead Free en Humidity -20°C ~+70°C(FSC-BW121D) 1.62V~3.6V zh Miscellaneous en Sh Size TD L ., Co Shenzhen Feasycom Co.,Ltd -10- www.feasycom.com FSC-BW121 Datasheet 3. HARDWARE SPECIFICATION 3.1 Block Diagram and PIN Diagram SDIO I/F for Wi-Fi 2.4G_RFIN 2.4GHz/5GHz ANT MATCH Internal or External antenna(Default) 2.4G_RFIP UART I/F for BT Diplexer Antenna (WIFI/BT) MATCH 5G_RFIO PCM for BT Ipex Connector (ICON_WLAN/BT ) (Optional) WiFi chip VDD_IO (1.62V or 3.6V) en Sh VDD_3V3_WL (3.0V ~3.6V) 40MHZ Crystal en zh Figure 2: Block Diagram Fe 2.4G_RFIP BT Diplexer 5G_RFIO MATCH 2.4G_RF WIFI VDD_IO Internal or External antenna(Default) TD MATCH 40MHZ Crystal Antenna (5G WIFI/BT) 2.4GHz ANT L ., WiFi chip 2.4GHz/5GHz ANT Ipex Connector (ICON_WLAN) (Optional) Co PCM for BT (1.62V or 3.6V) Internal or External antenna(Default) MATCH om yc UART I/F for BT 2.4G_RFIN as SDIO I/F for Wi-Fi Antenna (2.4G WIFI) Ipex Connector (ICON_WLAN) (Optional) VDD_3V3_WL (3.0V ~3.6V) Figure 3: Block Diagram (Only FSC-BW121E/EA/EB/EC) Shenzhen Feasycom Co.,Ltd -11- www.feasycom.com FSC-BW121 Datasheet en zh en Sh 3.2 PIN Definition Descriptions Table 2: Pin definition a. RF_IO_WIFI/BT RF Not es b. RF_IO_2.4G WIFI c. NC a. WIFI 2.4G/5G RF and BT RF in/out port(FSC-BW121 and FSCBW121D ) ** No function (FSC-BW121B and FSC-BW121C only，) b. WIFI 2.4G RF in/out port(FSC-BW121E and FSC-BW121EB) c. No function (FSC-BW121EA and FSC-BW121EC) 2 GND Ground 3 GND Ground 4 NC 5 GND 6 HCI_RX_BT I High-Speed UART Data In 7 HCI_TX_BT O High-Speed UART Data Out 8 GND 9 HCI_CTS_BT I High-Speed UART CTS 10 HCI_RTS_BT O High-Speed UART RTS 11 NC TD L ., 1 Type Pin Descriptions Co Pin Pin Name om yc as Fe Figure 4: FSC-BW121 PIN Diagram (Top View) Shenzhen Feasycom Co.,Ltd Ground Ground -12- www.feasycom.com FSC-BW121 Datasheet 12 BT_EN I Bluetooth Function Enable(High Active)(BT_Reset) 13 WL_EN I Wi-Fi Function Enable(High Active) (Wi-Fi_Reset) 14 NC 15 NC 16 NC 17 NC 18 GND 19 NC 20 NC 21 GND 22 VDD_3V3_WL PWR 3.3V Supply Voltage 23 VDD_3V3_WL PWR 3.3V Supply Voltage 24 VDD_3V3_WL PWR 3.3V Supply Voltage 25 NC/RTC_CLK I Sleep Clock(32.768kHz) By default, this pin is not connected and is left floating. 26 AUD_OUT_BT O BT PCM/I2S Bus. Data out ; NC if not used 27 AUD_FSYNC_BT I BT PCM/I2S Bus. Frame sync ; NC if not used. 28 AUD_IN_BT I BT PCM/I2S Bus. Data in ; NC if not used. 29 NC 30 NC 31 AUD_CLK_BT 32 NC 33 GND 34 VDD_IO PWR 1.8V~3.3V Supply Voltage 35 VDD_IO PWR 1.8V~3.3V Supply Voltage 36 GND 37 SDIO_D0_WL I/O SDIO Data Line 0 38 SDIO_D1_WL I/O SDIO Data Line1 39 SDIO_D2_WL I/O SDIO Data Line 2 40 SDIO_D3_WL I/O SDIO Data Line 3 41 SDIO_CLK_WL I WLAN SDIO Clock. Must be driven by the host 42 SDIO_CMD_WL I SDIO Command Input 43 BT_WALEUP_HOST O Host wakeup Bluetooth; NC if not used. 44 GND 45 a. NC Ground Ground zh en Sh BT PCM/I2S Clock; NC if not used. en I Fe Ground om yc as Ground TD L ., Co Ground b. RF_IO_2.4G&5G WIFI a. No function (FSC-BW121 and FSC-BW121C/D,FSC-BW121EB and FSC-BW121EC) ** WIFI 2.4G/5G RF and BT RF in/out port (FSC-BW121B only) b. BT 2.4G/WIFI 5G RF in/out port(FSC-BW121E and FSC-BW121EA ) 46 GND Ground 47 GND Ground 48 GND Ground 49 GND Ground 50 GND Ground 51 GND Ground Shenzhen Feasycom Co.,Ltd RF -13- www.feasycom.com FSC-BW121 Datasheet 52 GND Ground 53 GND Ground 54 GND Ground 55 GND Ground 56 GND Ground 4. PHYSICAL INTERFACE 4.1 UART Interface FSC-BW121 UART interface is a standard 4-wire interface with RX, TX, CTS, and RTS. The interface supports the Bluetooth UART HCI H4 and H5 specifications. The default baud rate is 115.2 kbaud. In order to support high and low speed baud rate, FSC-BW121 provides multiple UART clocks. The UART signal level ranges from 1.8V to 3.3V. The host provides the power source with the targeted power level to the UART interface via the VIO_HOST pin . en Sh Table 3: Possible UART Settings Parameter 1200 baud (≤0%Error) Standard 115200bps(≤0.08%Error) Maximum 4Mbps(≤0%Error) Supports Automatic Flow Control (CTS and RTS lines) None, Odd or Even om yc Bits per channel Minimum as Number of stop bits Fe Parity en Flow control zh Baudrate Possible Values 1 8 TD L ., Co Figure 5: UART Timing Shenzhen Feasycom Co.,Ltd -14- www.feasycom.com FSC-BW121 Datasheet Figure 6: UART Power-On Sequence Without Hardware Flow Control en zh en Sh om yc as Fe Figure 7: UART Power-On Sequence Without Hardware Flow Control Description TD T33ramp L ., Symbol Co Table 4: UART Interface Power-On Sequence 3.3V Power Pre-Charge Ramp Up Duration Before Formal Power Up. We recommend that a 3.3V power-on and then power-off sequence is executed by the host controller before the formal power on sequence. This procedure can eliminate host card detection issues when power ramp up duration is too long, or when a system warm reboot fails. Toff The duration 3.3V is cut off before formal power up. T33ramp The 3.3V main power ramp up duration T12ramp The internal 1.2V ramp up duration. TPOR The duration from when the power-on reset releases and the power management unit executes power on tasks. A power on reset will detect both 3.3V and 1.2V power ramp up after a predetermined duration. Tnon_rdy UART Not Ready Duration. In this state, the FSC-BW121 will not respond to any commands. Shenzhen Feasycom Co.,Ltd -15- www.feasycom.com FSC-BW121 Datasheet We recommend that the card detection procedures are divided into two phases: A 3.3V power pre-charge phase and a formal power-up phase. During the 3.3V power pre-charge phase, the power ramp up duration is not limited. The 3.3V power is cut off and is turned on after the Toff period. The ramp up time is specified in the T33ramp duration. After main 3.3V ramp up and 1.2V ramp up, the power management unit is enabled by the power ready detection circuit. The power management unit enables the Bluetooth block. The Bluetooth firmware then initializes all circuits, included the UART. In addition to wait the Tnon_rdy time, if the host supports UART hardware flow control it can detect RTS signals and follow the formal UART flow control handshake. Table 5: UART Interface Power On Timing Parameters Parameter T33ramp T33ramp T12ramp Max Unit - - No Limit ms 250 500 1000 ms 0.1 0.5 2.5 ms 0.1 0.5 1.5 ms 2 2 8 ms 1 2 10 ms en Tnon-rd Type zh TPOR en Sh Toff Min om yc as Fe 4.2 Bluetooth PCM Interface FSC-BW121 supports a PCM digital audio interface that is used for transmitting digital audio/voice data to/from the Audio Codec. Features are supported as below: Programmable long/short Frame Sync TD Supports 8-bit A-law/µ-law, and 13/16-bit linear PCM formats L ., Co Supports Master and Slave mode Supports sign-extension and zero-padding for 8-bit and 13-bit samples Supports padding of Audio Gain to 13-bit samples PCM Master Clock Output: 64, 128, 256, or 512kHz Supports SCO/ESCO link The PCM signal level ranges from 1.8V to 3.3V. The host provides the power source with the targeted power level to the PCM interface via the VDD-IO pin . Shenzhen Feasycom Co.,Ltd -16- www.feasycom.com FSC-BW121 Datasheet Figure 8: PCM Long FrameSync Figure 9: PCM Short FrameSync en zh en Sh om yc as Fe TD L ., Co Figure 10: PCM interface timing (Long FrameSync) Shenzhen Feasycom Co.,Ltd -17- www.feasycom.com FSC-BW121 Datasheet Figure 11: PCM interface timing (Short FrameSync) Table 6: PCM Interface Clock Specifications Min Type Max Unit 64 - 512 KHz - 8 - KHz 64 - 512 KHz - 8 - KHz 8 8 16 KHz 1 1 1 Slots Min Type Max Unit 980 - - ns 970 - - ns - - 75 ns - - 125 ns Set-up Time for ADC_Data Valid to BCLK Low 10 - - ns Hold Time for BCLK Low to ADC_Data Invalid 125 - - ns en Sh Parameter Frequency of BCLK (Master) Frequency of BCLK (Slave) Frequency of Frame Sync (Slave) en zh Frequency of Frame Sync (Master) Fe Data Size Table 7: PCM interface timing Low Period of BCLK Delay Time from BCLK High to Valid DAC_Data 4.3 TD Delay Time from BCLK High to Frame Sync High L ., High Period of BCLK Co Parameter om yc as Number of Slots Per Frame I2S Interfaces FSC-BW121 supports I2S digital audio interface used for transmitting digital audio/voice data to/from Audio Codec. The Interface shares the same pins with PCM interface, but mutually exclusive in its stage.There are features supported by FSC-BW121: Support both Master and Slave mode Programmable MSB/LSB bit 1st SCK(Left-Justified) or 2nd SCK(I2S-Compatible) latch time Shenzhen Feasycom Co.,Ltd -18- www.feasycom.com FSC-BW121 Datasheet Programmable SCK rising/falling edge trigger for latching data bits Support 8-bit a-Law/u-Law and 16-bit linear formats Support sign-extension and zero-padding for 8-bit and 13-bit samples Support padding of Audio Gain to 13-bit samples Programmable MSB/LSB first I2S Master clock output: 128/256kHz Support one SCO/ESCO link only FSC-BW121 can be configured as either master or slave mode. As master mode, the FSC-BW121 generate SCK and WS, thus controls the data transfer over DAC_Data and ADC_Data. FSC-BW121 supports audio sampling rate 8kHz(FrameSync), depends on I2S data format. The clock output(SCK) will be up to 256kHz. en Sh In slave mode, FSC-BW121 responds with DAC_Data and ADC_Data to SCK and WS it receives from Audio Codec. FSCBW121 can receive audio sampling rate 8kHz(WS), depends on I2S data format. The clock input(BCLK) accepted will be up to 256kHz. en zh FSC-BW121 supports audio sampling rate 8kHz(WS), depends on the I2S data format, in Master mode the clock output(SCK) will be 128, 256kHz. Min Type Max Unit 128 - 256 KHz - 8 - KHz 128 - 256 KHz - 8 - KHz 8 8 16 KHz 1 1 1 Slots Min Type Max Unit High Period of SCK 1960 - - ns Low Period of SCK 1950 - - ns Delay time from SCK falling to WS high/low - - 75 ns Delay time from SCK falling to valid DAC_Data - - 125 ns Set-up time for ADC_Data valid to SCK rising 10 - - ns Hold time for SCK rising to ADC_Data invalid 125 - - ns Frequency of Frame WS (Master) Frequency of SCK (Slave) L ., Data Size Co Frequency of Frame WS (Slave) om yc Frequency of SCK (Master) as Parameter Fe Table 8: I2S Interface Clock Specifications Number of Slots Per Frame TD Table 9: I2S interface timing Parameter Shenzhen Feasycom Co.,Ltd -19- www.feasycom.com FSC-BW121 Datasheet Figure 12: I2S interface timing en Sh WLAN Host Interfaces en 4.4.1 SDIO V3.0 zh 4.4 Fe The module WLAN section supports SDIO version 3.0, including the new UHS-I modes: om yc as DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3V signaling). HS: High speed up to 50 MHz (3.3V signaling). SDR12: SDR up to 25 MHz (1.8V signaling). TD SDR104: SDR up to 208 MHz (1.8V signaling). L ., SDR50: SDR up to 100 MHz (1.8V signaling). Co SDR25: SDR up to 50 MHz (1.8V signaling). DDR50: DDR up to 50 MHz (1.8V signaling). Note: The FSC-BW121 is backward compatible with SDIO v2.0 host interfaces. The SDIO interface also has the ability to map the interrupt signal on to a GPIO pin for applications requiring an interrupt different from the one provided by the SDIO interface. The ability to force control of the gated clocks from within the device is also provided. SDIO mode is enabled by strapping options. Refer to next Table WLAN GPIO Functions and Strapping Options. The following three functions are supported: Function 0 Standard SDIO function (Max. BlockSize/ByteCount = 32B) Function 1 Backplane Function to access the internal system-on-chip (SoC) address space (Max. Shenzhen Feasycom Co.,Ltd -20- www.feasycom.com FSC-BW121 Datasheet BlockSize/ByteCount = 64B) Function 2 WLAN Function for efficient Table 10: SDIO Pin Description SD 4-Bit Mode DATA0 Data line 0 DATA1 Data line 1 or Interrupt DATA2 Data line 2 or Read Wait DATA3 Data line 3 CLK Clock CMD Command line en Sh FSC-BW121 en zh as Fe 4.4.2 SDIO Default Mode Timing om yc Figure 13: Signal Connections to SDIO Host (SD 4-Bit Mode) TD L ., Co Figure 14: SDIO Bus Timing (Default Mode) Shenzhen Feasycom Co.,Ltd -21- www.feasycom.com FSC-BW121 Datasheet Table 11: SDIO Bus Timinga Parameters (Default Mode) Parameter Min Type Max Unit SDIO CLK (All values are referred to minimum VIH and maximum VIL ) b Frequency – Data Transfer mode 0 - 25 MHz Frequency – Identification mode 0 - 400 KHz Clock low time 10 - - ns Clock high time 10 - - ns Clock rise time 8 - 10 ns Clock fall time 0 - 10 ns Inputs: CMD, DAT (referenced to CLK) Input setup time 5 - - ns Input hold time 5 - - ns Outputs: CMD, DAT (referenced to CLK) Output delay time – Data Transfer mode 0 - 14 ns Output delay time – Identification mode 0 - 50 ns zh en Sh a. Timing is based on CL