OJJMDLLTNF-312.500000

OJ-M Type High Frequency and Ultra Low Noise 5.0 x 3.2 mm SMD Crystal Oscillator FEATURE - Low Power Supply Voltage: 3.3, 2.5, and 1.8V supply options - Clock Output: LVPECL, LVDS, CML, HCSL and LVCMOS - Output frequency support from 15MHz to 2.1GHz - Ultra Low Noise, Phase Jitter < 300 fs (Typical: 150 fs at 12kHz to 20MHz frequency offsets) - Tri-state enable / disable mode. - Temperature Range: -40 to 85。C - Pb-free/RoHS Compliant Actual Size RoHS Compliant TYPICAL APPLICATION - SONET/SDH, Gigabit Ethernet. - Storage Area Networking (SAN) - SD/HD video - FPGA clock generation DIMENSION (mm) SOLDER PAD L AYOUT (mm) PIN ASSIGNMENTS #1 #2 #3 #3 0.64 GND #7 #8 #2 #1 0.70 0.1uF 2.10 #8 #6 0.7 #7 #5 1.27 #4 #4 1.20 #5 2.10±0.20 3.2±0.20 #6 4.20 2.54 2.54±0.20 5.0±0.20 1.15 [ BOTTOM VIEW ] [ TOP VIEW ] 1.40±0.15 [ SIDE VIEW ] PIN# 1 2 3 4 5 6 7 8 FUNCTION LVPECL/LVDS/CML/HCSL NC/OE OE/NC GND Output Comp.Output VDD NC NC CMOS NC/OE OE/NC GND Output NC VDD NC NC Recommended soldering pattern ☆To ensure optimal oscillator performance, place a by-pass capacitor of 0.1uF as close to the part as possible between Vdd and GND pads. ELECTRICAL SPECIFICATION LVPECL Parameter Supply Voltage Variation (VDD) ± 10% Frequency Range Supply Current Transition Time (20% - 80%) Duty Cycle Startup Time Tri-State mode (Input to Pin 2) Stand by Current Phase Noise At VDD=3.3V, fout=873.515MHz RMS Phase Jitter (12KHz to 20MHz) Period Jitter Unit Min. Max. Min. Max. VDD -10% 15 VDD +10% 2100 VDD -10% 15 VDD +10% 2100 100, 106.25, 125, 156.25, 187.5, 200, 212.5, 266, 300, 312.5, 400, 491.52, 622.08, 644.531250 Standard Frequency Output Level 2.5V 3.3V Output High Output Low Rise Time Fall Time Enable Disable 1kHz offset 10kHz offset 100kHz offset 1MHz offset 20MHz offset VDD – 1.165 VDD – 2.0 45 0.7 x VDD VDD Typ. -106 -115 -123 -133 -150 150 - 110 VDD – 0.8 VDD – 1.55 0.35 0.35 55 8 0.3 x VDD 110 Max. 300 50 VDD – 1.165 VDD VDD – 2.0 0.8 VDD -– 2.0 45VDD – 1.55 0.7 x VDD Typ. -106 -115 -123 -133 -150 150 - 95 VDD – 0.8 VDD – 1.55 0.35 0.35 55 8 0.3 x VDD 95 Max. 300 50 V MHz MHz mA V V nSec nSec % mSec V mA dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz fs ps Note: not all combination of options are available. Other specifications may be available upon request. www.taitien.com sales@taitien.com.tw XO-0164 Rev(6) 01/2023 63 LVDS Parameter 3.3V Supply Voltage Variation (VDD) ± 5% Supply Voltage Variation (VDD) ± 10% Frequency Range Standard Frequency Supply Current Transition Time (20% - 80%) Duty Cycle Startup Time Tri-State mode (Input to Pin 2) Stand by Current Phase Noise Enable Disable At VDD=3.3V, fout=873.515MHz RMS Phase Jitter (12KHz to 20MHz) Period Jitter 1kHz offset 10kHz offset 100kHz offset 1MHz offset 10MHz offset Max. Min Max. 3.63 15 2.97 2100 2.25 15 2.75 2100 1.71 15 1.89 2100 0.9 45 0.7 x VDD Typ. -106 -115 -123 -133 -150 150 - At VDD=3.3V, Fout=805.664MHz RMS Phase Jitter (12KHz to 20MHz) Period Jitter Min. 3.63 15 0.9 45 0.7 x VDD Typ. -106 -115 -123 -133 -150 150 - 80 1.6 -0.35 0.35 55 8 0.3 x VDD 80 Max. 300 50 0.9 45 0.7 x VDD Typ. -106 -115 -123 -133 -150 150 - CML 2.5V Max. 2.97 2100 70 1.6 0.35 0.35 55 8 0.3 x VDD 70 Max. 300 50 1.8V Min 2.25 15 Max. 2.75 2100 Min. 1.71 15 Output High Output Low Rise Time Fall Time Enable Disable 1kHz offset 10kHz offset 100kHz offset 1MHz offset 20MHz offset VDD – 0.085 VDD – 0.6 45 0.7 x VDD Typ. -107 -117 -125 -135 -150 150 - 90 VDD VDD – 0.32 0.35 0.35 55 8 0.3 x VDD 90 Max. 300 50 45 0.7 x VDD - 80 VDD VDD – 0.32 0.35 0.35 55 8 0.3 x VDD 80 Max. 300 50 VDD – 0.085 VDD – 0.6 45 0.7 x VDD Typ. -107 -117 -125 -135 -150 150 - HCSL 2.5V 3.3V Min. 3.63 15 15 0.66 0 - VDD – 0.085 VDD – 0.6 45 0.7 x VDD Typ. -107 -117 -125 -135 -150 150 - Max. 2.97 700 115 700 1.15 0.15 0.4 0.4 55 8 0.3 x VDD 115 Min 2.25 15 15 0.66 0 - 0.7x VDD - 70 VDD VDD – 0.32 0.35 0.35 55 8 0.3 x VDD 70 Max. 300 50 1.8V Max. 2.75 700 100 2100 1.15 0.15 0.4 0.4 55 8 0.3 x VDD 100 50 ohms to GND Typ. Max. Typ. Max. -87 -110 -127 -138 -153 150 - 300 50 -87 -110 -127 -138 -153 150 - 300 50 Min. 1.71 15 15 0.66 0 45 0.7xVDD Typ. -87 -110 -127 -138 -153 150 - V V MHz MHz mA V V nSec nSec % mSec V V mA dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz fs ps Unit Max. 1.89 2100 100, 106.25, 125, 156.25, 187.5, 200, 212.5, 266, 300, 312.5, 400, 491.52, 622.08, 644.531250 Parameter Supply Voltage Variation (VDD)±10% Frequency Range Supply Current Output High Output Level Output Low Transition Time Rise Time (20% - 80%) Fall Time Duty Cycle Startup Time Tri-State mode Enable (Input to Pin 2) Disable Stand by Current Disable Output Load Phase Noise 1kHz offset 10kHz offset At VDD=3.3V, fout= 100kHz offset 873.515MHz 1MHz offset 10MHz offset RMS Phase Jitter (12KHz to 20MHz) Period Jitter 90 1.6 0.35 0.35 55 8 0.3 x VDD 90 Max. 300 50 3.3V Supply Voltage Variation (VDD) ± 5% Supply Voltage Variation (VDD) ± 10% Frequency Range Standard Frequency Supply Current Transition Time (20% - 80%) Duty Cycle Startup Time Tri-State mode (Input to Pin 2) Stand by Current Phase Noise Unit Min Parameter Output Level 1.8V Max. 100, 106.25, 125, 156.25, 187.5, 200, 212.5, 266, 300, 312.5, 400, 491.52, 622.08, 644.531250 Output High Output Low Rise Time Fall Time Output Level 2.5V Min. V V MHz MHz mA V V nSec nSec % mSec V V mA dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz fs ps Unit Max. 1.89 700 94 2100 1.15 0.15 0.4 0.4 55 8 0.3 x VDD 94 V MHz mA V V nSec nSec % mSec V V mA Max. 300 50 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz fs ps Note: not all combination of options are available. Other specifications may be available upon request. 64 www.taitien.com sales@taitien.com.tw XO-0164 Rev(6) 01/2023 CMOS 3.3V Parameter Supply Voltage Variation (VDD) Supply Voltage Variation (VDD) Frequency Range Supply Current Output Level Transition Time (20% - 80%) Duty cycle Startup Time Tri-State mode (Input to Pin 2) Period Jitter 5% 10% Output High Output Low Rise Time Fall Time Fout < 100MHz Fout > 100MHz Enable Disable 2.5V 1.8V Unit Min. Max. Min Max. Min Max. 3.63 15 0.9 x VDD 45 40 0.7 x VDD - 2.97 250 90 0.1 x VDD 1.2 1.2 55 60 8 0.3 x VDD 100 2.25 15 2.75 250 80 0.1 x VDD 1.5 1.5 55 60 8 0.3 x VDD 100 1.71 15 1.89 250 70 0.1 x VDD 2 2 55 60 8 0.3 x VDD 100 0.9 x VDD 45 40 0.7 x VDD - 0.9 x VDD 45 40 0.7 x VDD - V V MHz mA V V nSec nSec % % mSec V V ps FREQ. STABILITY vs. TEMP. RANGE ppm Temp. (°C) 20 -20~+70 -40~+85 X 25 30 50 O O O O O Note: not all combination of options are available. Other specifications may be available upon request. www.taitien.com sales@taitien.com.tw XO-0164 Rev(6) 01/2023 65