SIT9122AI-2B1-33E233.333333

SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Features Applications  Any frequency between 220 MHz and 625 MHz accurate to 6 decimal places  10GB Ethernet, SONET, SATA, SAS, Fibre Channel, PCI-Express  LVPECL and LVDS output signaling types  Telecom, networking, instrumentation, storage, servers  0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth  Frequency stability as low as ±10 ppm  Industrial and extended commercial temperature ranges  Industry-standard packages: 3.2x2.5, 5.0x3.2 and 7.0x5.0 mmxmm  For frequencies lower than 220 MHz, refer to SiT9121 datasheet Electrical Characteristics Parameter and Conditions Symbol Min. Typ. Max. Unit Condition LVPECL and LVDS, Common Electrical Characteristics Supply Voltage Output Frequency Range Frequency Stability Vdd f F_stab 2.97 3.3 3.63 2.25 2.5 2.75 V V 2.25 – 3.63 V 220 -10 – – 625 +10 MHz ppm -20 – +20 ppm -25 – +25 ppm ppm Termination schemes in Figures 1 and 2 - XX ordering code Inclusive of initial tolerance, operating temperature, rated power supply voltage, and load variations -50 – +50 First Year Aging F_aging1 -2 – +2 ppm 25°C 10-year Aging F_aging10 -5 – +5 ppm 25°C Operating Temperature Range T_use -40 – +85 °C Industrial -20 – +70 °C Extended Commercial Input Voltage High VIH 70% – – Vdd Pin 1, OE or ST Input Voltage Low VIL – – 30% Vdd Pin 1, OE or ST Input Pull-up Impedance Z_in – 100 250 kΩ Pin 1, OE logic high or logic low, or ST logic high 2 – – MΩ Pin 1, ST logic low – 6 10 ms Measured from the time Vdd reaches its rated minimum value. Start-up Time Resume Time Duty Cycle T_start T_resume – DC 45 6 10 ms In Standby mode, measured from the time ST pin crosses 50% threshold. – 55 % Contact SiTime for tighter duty cycle LVPECL, DC and AC Characteristics Current Consumption Idd – 61 69 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V OE Disable Supply Current I_OE – – 35 mA OE = Low Output Disable Leakage Current I_leak – – 1 A OE = Low Standby Current I_std – – 100 A ST = Low, for all Vdds I_driver – – 30 mA Maximum average current drawn from OUT+ or OUT- Output High Voltage VOH Vdd-1.1 – Vdd-0.7 V See Figure 1(a) Output Low Voltage VOL Vdd-1.9 – Vdd-1.5 V See Figure 1(a) V_Swing 1.2 1.6 2.0 V See Figure 1(b) Rise/Fall Time Tr, Tf – 300 500 ps 20% to 80%, see Figure 1(a) OE Enable/Disable Time RMS Period Jitter T_oe T_jitt RMS Phase Jitter (random) T_phj – – – – – – 1.2 1.2 1.2 0.6 115 1.7 1.7 1.7 0.85 ns ps ps ps ps f = 220 MHz - For other frequencies, T_oe = 100ns + 3 period f = 266 MHz, VDD = 3.3V or 2.5V f = 312.5 MHz, VDD = 3.3V or 2.5V f = 622.08 MHz, VDD = 3.3V or 2.5V f = 312.5 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds Idd – 47 55 mA Excluding Load Termination Current, Vdd = 3.3V or 2.5V OE Disable Supply Current I_OE – – 35 mA OE = Low Differential Output Voltage VOD 250 350 450 mV See Figure 2 Maximum Output Current Output Differential Voltage Swing LVDS, DC and AC Characteristics Current Consumption SiTime Corporation Rev. 1.05 990 Almanor Avenue, Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Revised October 6, 2014 SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Electrical Characteristics (continued) Parameter and Conditions Symbol Min. Typ. Max. Unit Condition LVDS, DC and AC Characteristics (continued) Output Disable Leakage Current I_leak – – 1 A Standby Current I_std – – 100 A ST = Low, for all Vdds VOD – – 50 mV See Figure 2 VOD Magnitude Change Offset Voltage OE = Low VOS 1.125 1.2 1.375 V See Figure 2 VOS Magnitude Change VOS – – 50 mV See Figure 2 Rise/Fall Time Tr, Tf – 495 600 ps 20% to 80%, see Figure 2 OE Enable/Disable Time RMS Period Jitter T_oe T_jitt RMS Phase Jitter (random) T_phj – – – – – – 1.4 1.4 1.2 0.6 115 1.7 1.7 1.7 0.85 ns ps ps ps ps f = 220 MHz - For other frequencies, T_oe = 100ns + 3 period f = 266 MHz, VDD = 3.3V or 2.5V f = 312.5 MHz, VDD = 3.3V or 2.5V f = 622.08 MHz, VDD = 3.3V or 2.5V f = 312.5 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds Pin Description Pin Map Functionality OE Input H or Open: specified frequency output L: output is high impedance ST Input H or Open: specified frequency output L: Device goes to sleep mode. Supply current reduces to I_std. OE/ST 1 6 VDD NC NA No Connect; Leave it floating or connect to GND for better heat dissipation NC 2 5 OUT- GND 3 4 OUT+ 1 2 3 GND Power VDD Power Supply Ground 4 OUT+ Output Oscillator output 5 OUT- Output Complementary oscillator output 6 VDD Power Power supply voltage Top View Absolute Maximum Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Min. Max. Unit Storage Temperature Parameter -65 150 °C VDD -0.5 4 V Electrostatic Discharge (HBM) – 2000 V Soldering Temperature (follow standard Pb free soldering guidelines) – 260 °C Thermal Consideration JA, 4 Layer Board JC, Bottom 7050, 6-pin 142 27 5032, 6-pin 97 20 3225, 6-pin 109 20 Package (°C/W) (°C/W) Environmental Compliance Parameter Condition/Test Method Mechanical Shock MIL-STD-883F, Method 2002 Mechanical Vibration MIL-STD-883F, Method 2007 Temperature Cycle JESD22, Method A104 Solderability MIL-STD-883F, Method 2003 Moisture Sensitivity Level MSL1 @ 260°C Rev. 1.05 Page 2 of 8 www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Waveform Diagrams OUT80% 80% 20% 20% VOH OUT+ Tr VOL Tf GND Figure 1(a). LVPECL Voltage Levels per Differential Pin (OUT+/OUT-) V _ S w in g 0 V t Figure 1(b). LVPECL Voltage Levels Across Differential Pair OUT80% 80% VOD 20% 20% OUT+ VOS Tr Tf GND Figure 2. LVDS Voltage Levels per Differential Pin (OUT+/OUT-) Rev. 1.05 Page 3 of 8 www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Termination Diagrams LVPECL: VDD Z 0 = 50  OUT+ D+ Receiver Device L V P E C L D rive r Z0 = 5 0  OUT- D50  50  V T T = V D D – 2.0 V Figure 3. LVPECL Typical Termination VDD= 3.3V => R1 = 100 to 150  VDD= 2.5V => R1 = 75  VDD OUT+ 100 nF Z0 = 50  D+ Receiver Device LVPECL Driver 100 nF Z0 = 50  OUTR1 R1 D50  50  VTT Figure 4. LVPECL AC Coupled Termination VDD = 3.3V => R1 = R3 = 133  and R2 = R4 = 82  VDD = 2.5V => R1 = R3 = 250  and R2 = R4 = 62.5  VDD R1 VDD OUT+ R3 Z0 = 50  D+ Receiver Device LVPECL Driver OUT- Z0 = 50  DR2 R4 Figure 5. LVPECL with Thevenin Typical Termination Rev. 1.05 Page 4 of 8 www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice LVDS: VDD OUT+ Z0 = 50  D+ 100  LVDS Driver OUT- Z0 = 50  Receiver Device D- Figure 6. LVDS Single Termination (Load Terminated) Rev. 1.05 Page 5 of 8 www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Dimensions and Patterns Package Size – Dimensions (Unit: mm)[1] Recommended Land Pattern (Unit: mm)[2] 3.2 x 2.5x 0.75 mm 3.2±0.05 2.20 #4 #2 #3 #4 #6 0.9 #1 #3 #2 1.00 0.7 YXXXX 2 .2 5 #5 1.6 #5 2.5±0.05 #6 #1 0.6 0.75±0.05 0 .6 5 1 .0 5 5.0 x 3.2 x 0.75 mm #5 #4 #2 #3 #4 #5 #6 1.20 #6 YXXXX #1 #3 #2 #1 0.75±0.05 7.0 x 5.0x 0.90 mm 7.0±0.10 5.08 #4 5.08 #6 3.80 #3 #3 #2 #1 1.60 #2 #5 1.10 YXXXX #1 #4 2.60 #5 5.0±0.10 #6 0.90 ±0.10 1.40 1.60 Notes: 1. Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device. 2. A capacitor of value 0.1 F between Vdd and GND is recommended. Rev. 1.05 Page 6 of 8 www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Ordering Information SiT9122AC -1C2-33E220.123456T Packaging: Part Family “SiT9122” “T”, “Y”, “X”, “D”, “E” or “G” Refer to table below for packing method Leave Blank for Bulk Revision Letter “A” is the revision of Silicon Frequency 220.000000 MHz to 625.000000 MHz Temperature Range “I” Industrial, -40 to 85°C “C” Extended Commercial, -20 to 70°C Feature Pin “E” for Output Enable “S” for Standby Signalling Type “1” = LVPECL “2” = LVDS Voltage Supply Package Size “B” 3.2 x 2.5 mm x mm “C” 5.0 x 3.2 mm x mm “D” 7.0 x 5.0 mm x mm Frequency Stability “25” for 2.5V ±10% “33” for 3.3V ±10% “XX” for 2.25V to 3.63V “F” for ±10 ppm “1” for ±20 ppm “2” for ±25 ppm “3” for ±50 ppm Frequencies Not Supported Range 1: From 251.000001 MHz to 263.999999 MHz Range 2: From 314.000001 MHz to 422.999999 MHz Range 3: From 502.000001 MHz to 527.999999 MHz Ordering Codes for Supported Tape & Reel Packing Method Device Size 8 mm T&R (3ku) 8 mm T&R (1ku) 8 mm T&R (250u) 7.0 x 5.0 mm – – – – 5.0 x 3.2 mm – – – T 3.2 x 2.5 mm D E G T Y Rev. 1.05 12 mm T&R (3ku) 12 mm T&R (1ku) Page 7 of 8 12 mm T&R (250u) 16 mm T&R (3ku) 16 mm T&R (1ku) 16 mm T&R (250u) – – T Y X Y X – – – X – – – www.sitime.com SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Revision History Version Release Date 1.01 2/20/13 Original Change Summary 1.02 12/3/13 Added input specifications, LVPECL/LVDS waveforms, packaging T&R options 1.03 2/6/14 Added 8mm T&R option and ±10 ppm 1.04 7/23/14 Include Thermal Consideration Table 1.05 10/6/14 Modified Thermal Consideration values © SiTime Corporation 2014. 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