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AI1002

AI1002

  • 厂商:

    A1PROS

  • 封装:

  • 描述:

    AI1002 - Vertical Clock Driver for Camera System - A1 PROs co., Ltd.

  • 数据手册
  • 价格&库存
AI1002 数据手册
Ver1.0 1 A1 PROs A1 PROs GENERAL DESCRIPTION Ai1002 Vertical Clock Driver for Camera System 20-pin SSOP The Ai1002 is a vertical driver for CCD image sensors. This IC is the successor of the Ai1001S with better features. 3.3V and 5V clock interface is acceptable while Ai1001S can accept only 5V clock interface. #1 FEATURES • • • Only two power supplies are ( +15V and -8.5V) needed. 3.3V and 5V clock interface is acceptable. 20-pin SSOP package APPLICATIONS CCD Cameras PROCESS High Voltage CMOS BLOCK DIAGRAM GND XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 VCP DCIN 1 2 3 4 5 6 7 8 9 10 + 20 19 18 17 16 15 14 13 12 11 VP1 (+15V) VSUB VSS (−8.5V) VΦ2 VΦ1 VP0 (0V) VΦ3 VΦ4 VP1(+15V) DCOUT 1 Ai1002 PIN DESCRIPTION Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol GND XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 VCP DCIN DCOUT VP1 VΦ4 I/O I I I I I I I I I O O Ground Control Output Control (VSUB) Output Control (VΦ2) Output Control (VΦ1) Output Control (VΦ1) Output Control (VΦ3) Output Control (VΦ3) Output Control (VΦ4) Power of Amp OP-Amp Input (internal pull-down resistor) OP-Amp Output Power (15V) High Voltage Output (2 level : VP0, VSS) High Voltage Output (3 level : VP0, VSS, VP1) Power (0V) High Voltage Output (3 level : VP0, VSS, VP1) High Voltage Output (2 level : VP0, VSS) Power (− 8.5V) High Voltage Output (2 level : VSS, VP1) Power (15V) Description 14 VΦ3 O 15 VP0 - 16 VΦ1 O 17 18 19 20 VΦ2 VSS VSUB VP1 O O - 2 Ai1002 ABSOLUTE MAXIMUM RATINGS ( Ta = 25°C ) Characteristics Symbol VSS Supply Voltage VP1 VP0 VI Input Voltage VCP Output Voltage OP-Amp Output Current Operating Temperature Storage Temperature VΦ1, VΦ2, VΦ3, VΦ4, VSUB IOUT TOPR TSTG − 0.3 ~ VSS + 35 VSS − 0.3 ~ VP1 + 0.3 ±5 − 25 ~ + 85 °C − 45 ~ + 120 mA Value 0 ~ −10 −0.3 ~ VSS + 35 VSS − 0.3 ~ 3.0 − 0.3 ~ VP1 + 0.3 V Unit LOGIC FUNCTION TABLE INPUT XV1,3 L H L H X X X X X : Don’t care Z : High impedance XSG1,2 L L H H X X X X XV2,4 X X X X L H X X XSUB X X X X X X L H VΦ1,3 VP1 Z VP0 VSS X X X X OUTPUT VΦ2,4 X X X X VP0 VSS X X VSUB X X X X X X VP1 VSS 3 Ai1002 AC CHARACTERISTICS ( VP1 = 15V, VP0 = GND, VSS = -8.5V ; Ta = 25°C ) Description Symbol TPLM TPMH TPLH Delay Time TPML TPHM TPHL TTLM TTMH TTLH Rising Time TTML TTHM TTHL Output Noise Voltage VCLH, VCLL VCMH, VCML VP0 → VSS (*1) VP1 → VP0 (*1) VP1 → VP0 (*1) (*2) 200 400 10 300 600 50 500 820 100 0.5 V No Load(*1) No Load(*1) No Load(*1) VSS → VP0 (*1) VP0 → VP1 (*1) VSS → VP1 (*1) 10 10 10 400 400 10 100 100 60 700 650 50 200 180 100 ns 930 930 100 Test Condition No Load (*1) No Load(*1) No Load(*1) Min 10 10 10 Typ 40 30 40 Max 70 70 100 Unit (*1) Refer the timing diagram of page 5. (*2) Refer the noise diagram of page 5. 4 Ai1002 DC CHARACTERISTICS ( VP1 = 15V, VP0 = GND, VSS = -8.5V, VCP = 22V ; Ta = 25°C ) Description Symbol VP1 Supply Voltage VSS Input Voltage High Level Input Voltage Low Level Input Voltage VCP VIH When VCP is used (*3) − 9.5 VP1 2.3 − 8.5 22 − 7.5 23.5 V Test Condition Min 14.5 Typ 15 Max 15.5 Unit VIL II (*3) VIN = 0 ~ 5V (*3) VDCIN = 1.0V (*1) (*1) (*1) VΦ1~4 = − 8.0V VΦ1~4 = − 0.5V VΦ1,3 = 0.5V VΦ1,3 = 14.5V VSUB = − 8.0V VSUB = 14.5V IOUT = − 200μA Ta = − 20 ~ 75°C (*2), IOUT = − 200mA VDCIN = 1.0 ~ 4.5V VDCIN = 1.0 ~ 4.5V IOUT = 0mA − 1.0 80 − 8.5 25 9 12 X 4.0 0.0 100 2.0 4.5 − 6.5 37 − 15 13.5 − 18 18 − 10.5 X 4.2 1.2 1.0 μA 140 3.5 5.0 − 10 − 12 −7 X 4.7 mA Input Current IDCIN IP1 Operation Current IP0 ISS IOL IOM1 IOM2 Output Current IOH IOSL IOSH Op-Amp Gain G Gain Variation ΔG −3 - +3 % Operation Current IVCP 0.08 - 1.0 mA (*1) : Refer the test circuit of page 7. Shutter speed : 1/100000 sec. (*2) : Refer the characteristics of OP-AMP of page 7. (*3) : XV1 ~ 4, XSG1, XSG2, XSUB pin 5 Ai1002 TIMING DIAGRAM 5V XV1 ~ 4 50% 50% GND XSG1, 2 5V GND TPMH VP1 TPLM TTLM 90% 10% 50% 50% TPHM TTHM TTML 90% 10% 10% TTMH TPML 90% VΦ1,3 VP0 VSS TPLM VP0 10% TTHL TTLM 90% TPHL 90% VΦ2,4 VSS 10% 10% 5V XSUB GND 50% 50% TTHL TPLH VP1 TTLH 90% TPHL 90% 10% VSUB VSS 10% NOISE DIAGRAM VCMH VCML VM VCLH VCLL VL 6 Ai1002 TEST CIRCUIT R2 C2 C2 C2 C2 R1 C1 R1 R1 : 27Ω R2 : 5Ω C1 : 1500pF C2 : 3300pF C1 C1 500pF R1 R1 C1 VP1(15V) 20 VSS(− 8.5V) 0V 19 18 17 16 15 14 13 VP1(15V) 12 11 Ai1002 1 2 3 4 5 6 7 8 9 10 VCP(22V) Timing Generator OP-AMP GAIN CHARACTERISTICS (Ta = − 20 ~ 75°C) IOUT = 0μA 25.0 (V) OUTPUT VOLTAGE (2.5 / div) INPUT VOLTAGE (0.5 / div) 5.0 (V) 7 Ai1002 APPLICATION CIRCUIT 0.1μF/35V + + VP1 (15V) VSS (− 8.5V) 0.1μF /35V 1 T I M I N G G E N E R A T O R GND XSUB XV2 XV1 XSG1 XV3 XSG2 XV4 VCP DCIN VP1 VSUB VSS 20 19 18 17 16 15 14 13 12 11 VΦ3 VΦ4 + 0.1μF /35V 1μF VΦ2 VΦ1 VSUB XSUB 2 2 3 4 5 6 7 8 9 10 XV2 3 XV1 XSG1 XV3 XSG2 XV4 4 5 6 7 8 A i 1 0 0 2 VΦ2 VΦ1 VP0 VΦ3 VΦ4 VP1 DCOUT C C D VDD (5V) 47KΩ 0.1μF 0.1μF 100KΩ 1MΩ * In case of DCOUT ≤ VP1 − 1.0V, VCP PIN connects with VP1. * Warning : W hen voltage is biased, You must keep this flow. If you don’t keep this flow, Negative voltage is applied to CCD image sensor’s SUB. 15V (VP1) t1 20% 0V (VP0 ) 20% t2 * t1 ≥ t2 ≥ 10ms − 8.5V (VSS ) 8 Ai1002 PACKAGE DIMENSION 20-pin SSOP 6.50±0.13 Unit : mm 0.127 4° ± 3 ° #20 #11 0.537±0.05 4°± 3° 1.20 6.40±0.10 4.40 +0.08 -0.10 Φ 1.00ⅹ(0.02 ~ 0.10) 3.20 12°± 2° 0.635 +0.20 -0.12 R0 .2 0 #1 1.20 #10 R0 0 .2 0.254 1.20±0.05 0.325 1.45 MAX 0.10 MAX * Planarity between each form lead tip is 0.10 max 0.65 0.10 +0.10 -0.05 0.22 9 1.00
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