EQCO30R5.D
EQCO30R5.D 3G/HD-SDI Video Cable Equalizer
Features
Introduction
• Supports up to 140 Meters of Cable at 2.97 Gbps
Using High-Quality Coax
• Supports up to 200 Meters of Cable at 1.485
Gbps Using High-Quality Coax
• Supports up to 450 Meters of Cable at 270 Mbps
Using High-Quality Coax
• Compatible with all SMPTE3G SDI Data Rates:
- SMPTE259M SDI, 143 to 360 Mbps
- SMPTE344M, 540 Mbps
- SMPTE292M HD-SDI, 1.485 Gbps
- SMPTE372M Dual-Link HD-SDI, 2.97 Gbps
- SMPTE424M Dual-Speed 3G-SDI, 2.97 Gbps
• Pin Compatible with Gennum and National
Semiconductor Parts
• Also Operates with 8B/10B Coding
• Single 3.3V Supply.
• Low Power Consumption (220 mW, 3.3V Supply;
80 mW, 1.2V Supply)
• Better Robustness Due to Transmit Amplitude
Independent Operation
• 16-Pin, 0.65 mm Pin Pitch, 4 mm QFN Package
• -40°C to +85°C Industrial Temperature Range
• Pb-Free and RoHS Compliant
The EQCO30R5 is a video equalizer for 3G/HD/SD-SDI
video, with speeds up to 2.97 Gbps. It is designed to be
a direct replacement for competing video equalizers. In
addition to downlink functionality from camera to frame
grabber, it can also transmit a 5 Mbps uplink signal from
the frame grabber to the camera. Additionally, power
can be provided over the same cable using the same
chip and a few external components. The device
operates with 8B/10B coded signals up to 3.125 Gbps.
Applications
• High Definition, High Frame Rate Pro-Video HD-SDI
Frame Store
• Surveillance, Industrial/Inspection, Medical
Video Inputs
• HDcctv Applications
Note:
The EQCO30R5 video equalizer can be
used in combination with the EQCO30T5
cable driver. This device is capable of
receiving the uplink signal whilst other key
parameters remain compliant to SMPTE
specifications. Please refer to the
Microchip website (www.microchip.com)
for the EQCO30T5 data sheet.
2011-2016 Microchip Technology Inc.
DS60001304C-page 1
EQCO30R5.D
Typical Link Performance
Table 1, Table 2, and Table 3 give an overview of video
equalizer typical performance at room temperature
without using the uplink and without providing power
over the same coax. When providing power or using
the uplink communication to the camera, a small length
penalty may arise (in cable length, typically 10%) due
to added parasitics and noise. The uplink operates to at
least 400m at the 5 Mbps bit rate.
TABLE 1:
BELDEN TYPICAL EQUALIZATION PERFORMANCE
Name
Belden 7731A Belden 1694A Belden 1505A Belden 1505F Belden 1855A
Type
Long
Distance
Industry
Standard
Compromise
Coax
Flexible
Thinnest
Cable
Diameter
(mm)
10.3
6.99
5.94
6.15
4.03
270 Mbps
(m)
718
469
384
302
270
1.485 Gbps
(m)
332
223
187
136
132
2.97 Gbps
(m)
219
149
128
89
91
TABLE 2:
GEPCO TYPICAL EQUALIZATION PERFORMANCE
Name
Gepco
VHD1100
Gepco
VSD2001
Gepco
VPM2000
Gepco
VHD2000M
Gepco
VDM230
Type
Long
Distance
Industry
Standard
Compromise
Coax
Flexible
Thinnest
Cable
Diameter
(mm)
10.3
6.91
6.15
6.15
4.16
270 Mbps
(m)
772
502
387
305
273
1.485 Gbps
(m)
372
241
187
138
133
2.97 Gbps
(m)
252
163
128
91
92
TABLE 3:
CANARE TYPICAL EQUALIZATION PERFORMANCE
Name
Canare
L-7CFB
Canare
L-5CFB
Canare
L-4CFB
Canare
L-3CFB
Canare
L-2.5CFB
Type
Long
Distance
Industry
Standard
Compromise
Coax
Thin Cable
Thinnest
Cable
Diameter
(mm)
10.3
6.99
5.94
6.15
4.03
270 Mbps
(m)
615
434
344
287
223
1.485 Gbps
(m)
281
201
161
135
109
2.97 Gbps
(m)
182
132
107
90
73
DS60001304C-page 2
2011-2016 Microchip Technology Inc.
EQCO30R5.D
Table of Contents
1.0
2.0
3.0
4.0
Device Overview .......................................................................................................................................................................... 4
Application Information................................................................................................................................................................. 8
Electrical Characteristics ............................................................................................................................................................ 12
Packaging................................................................................................................................................................................... 14
TO OUR VALUED CUSTOMERS
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The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current
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2011-2016 Microchip Technology Inc.
DS60001304C-page 3
EQCO30R5.D
1.0
DEVICE OVERVIEW
.
Note: Email address: eqcoproducts@microchip.com
The EQCO30R5 is a multi-rate adaptive cable
equalizer, designed to restore signals received over
coaxial cable. The EQCO30R5 chip is optimized for
SMPTE HD/SDI signals, but works equally well with
8B/10B coded signals. The device operates from a
single 3.3V power supply. A sister device operates from
a single 1.2V power supply, which reduces power
consumption at the cost of voltage compatibility with
competitive parts. For more information on the 1.2V
part, please contact Microchip.
The EQCO30T5 is a cable driver that matches to the
EQCO30R5, since it can receive the uplink signal.
Implementing the uplink requires very few additional
components on both sides of the link and complies with
SMPTE specifications. The EQCO30T5 data sheet is
available separately from Microchip.
The EQCO30R5 has a DC restore circuit to recover
SMPTE pathological patterns in the data stream. The
EQCO30R5 has a variable gain to compensate for lowfrequency attenuation through the coax and variations
in transmit amplitude.
Figure 1-1 shows a typical communication link using
the EQCO30T5 and EQCO30R5 chips
FIGURE 1-1:
TYPICAL EQCO30R5 SETUP
Up to
2.97 Gbps
downlink
High
Definition
Camera
EQCO
30T5
Up to
5 Mbps
uplink
DS60001304C-page 4
Up to
900 mA DC
Up to 400 meters
75ɏCoax
Up to
900 mA DC
Up to
2.97 Gbps
downlink
Frame
Store +
Camera
Control
EQCO
30R5
Up to
5 Mbps
uplink
2011-2016 Microchip Technology Inc.
EQCO30R5.D
1.1
Pinout and Pin Description
FIGURE 1-2:
TABLE 1-1:
Pin Number
EQCO30R5.D PIN DIAGRAM (VIEWED FROM TOP)
VCC
NC
NC
VCC
16
15
14
13
GND
1
12
GND
SDIp
2
11
SDOp
SDIn
3
10
SDOn
GND
4
9
GND
EQCO30R5
GND TAB
5
6
7
LFI
AmpR
NC
8
NC
EQCO30R5.D PIN DESCRIPTIONS
Pin Name
Signal Type
Description
(TAB)
GND
Power
Use as single-point ground.
13, 16
VCC
Power
+3.3V of power supply.
1, 4, 9, 12
GND
Power
Connect to ground of power supply.
2, 3
SDIp, SDIn
CML Input
Serial input positive/negative differential serial input. Connect
SDIn to ground reference via termination network. External
75Ω resistors are required.
11, 10
SDOp/SDOn
CML Output
Serial output positive/negative differential serial output.
Output has a swing of 2x370 mV and has 50Ω on-chip
termination resistors to internal VDD (1.2V).
5
LFI
Input
Uplink signal. (Low = 0V, High = 1.2V). When driving from
3.3V, an external series resistance of 6.2 kΩ is required.
6
AmpR
Input
Connect to ground with a 1 kΩ resistor, defining the uplink
amplitude to 150 mV.
7
NC
Input
Do not connect. Used for internal testing.
8
NC
Input
Do not connect. Used for internal testing.
14
NC
Input
Do not connect. Used for internal testing.
15
NC
Input
Do not connect. Used for internal testing.
2011-2016 Microchip Technology Inc.
DS60001304C-page 5
EQCO30R5.D
1.1.1
SDIp/SDIn
SDIp/SDIn together form a differential input pair. The
EQCO30R5 analyzes the differential voltage between
these pins and adaptively equalizes for signal level and
frequency response. The equalizer automatically
detects and adapts to signals with different edge rates,
different attenuation levels and different cable
characteristics. Both SDIp and SDIn inputs need to be
terminated by an external 75Ω resistor to GND.
1.1.2
SDOp/SDOn
SDOp/SDOn together form a differential CML pair
outputting the reconstructed far-end transmit signal.
SDOp/SDOn are terminated on-chip with two 50Ω
resistors to 1.2V. These outputs should be AC coupled
to the deserializer (unless a 800 mV-1V common-mode
voltage is acceptable). For SMPTE signals, it is best to
use 4.7 µF AC coupling capacitors.
1.1.3
LFI
LFI is the uplink input signal that will be transmitted on
the SDIp/SDIn pair. LFI must be a 0-1.2V signal. The
pin has an internal resistor of 3.6 kΩ. When driving with
a 3.3V (2.5V) signal, an external resistor of 6.2 kΩ (3.9
kΩ) should be placed in series close to the EQCO30R5
chip. When not using uplink communications, leave this
pin floating.
When the downlink signal is 8b/10b coded, the uplink
signal can be 8b/10b at 5 Mbps. When the downlink
signal is a SMPTE signal, the uplink signal cannot be
5 Mbps but needs to be a lower speed signal
modulated to a 5 Mbps. See application note “AN1837
HD-SDI Repeater Reference Design” for more
information on modulation. This application note is
made available under NDA.
1.1.4
AmpR
AmpR is a VCC resistor that sets the transmit amplitude of the uplink output driver. The typical value is
Ramp = 1 kΩ for 150 mV transmit amplitude. When not
using uplink communications, leave this pin floating.
DS60001304C-page 6
2011-2016 Microchip Technology Inc.
EQCO30R5.D
1.2
Circuit Operation
FIGURE 1-3:
EQCO30R5.D BLOCK DIAGRAM SHOWING ELECTRICAL CONNECTIONS
LFI, AmpR
SDIp
SDIn
Equalizer
Core
Limiting Amplifier
with DC restore
+ CML Driver
SDOp
SDOn
EQCO30R5
1.2.1
EQUALIZER CORE
• Variable Coax
The EQCO30R5 has an embedded equalizer in the
receive path with the following characteristics:
The equalizer can receive attenuated signals from
other types of cables besides the Belden1694A.
• Auto-Adaptive
• Multi-Speed
The equalizer controls a multiple-pole analog filter
which compensates for attenuation of the cable, as
illustrated in Figure 1-4. The filter frequency response
needed to restore the signal is automatically determined
by the device using a time-continuous feedback loop
that measures the frequency components in the signal.
Upon the detection of a valid signal, the control loop
converges within a few microseconds.
The EQCO30R5 works at data rates from 143 Mbps to
2.97 Gbps. With 8B/10B coding, the allowable bit rate
is extended from 50 Mbps to 3.125 Gbps.
• Variable Gain
The EQCO30R5 equalizer has variable gain to
compensate for low-frequency attenuation through the
coax and variations in transmit amplitude; this makes
the equalizer performance more robust, even at
maximum cable lengths.
FIGURE 1-4:
Example equalizer performance measurements can be
found in Appendix B: “Typical Equalizer
Characteristics”.
1.2.2
RX OUTPUT DRIVER
The output driver converts the output of the equalizer
core to an LVDS-like signal and sends it onto a 100Ω
differential transmission line.
PRINCIPLE OF EQUALIZER OPERATION
2011-2016 Microchip Technology Inc.
DS60001304C-page 7
EQCO30R5.D
2.0
APPLICATION INFORMATION
2.1
Typical Application Circuit for SMPTE Video Signals
Figure 2-1
illustrates
a
typical
schematic
implementation of the EQCO30R5 used as an
equalizer for SMPTE video signals.
FIGURE 2-1:
2.1.1
EQCO30R5.D TYPICAL APPLICATION CIRCUIT FOR SMPTE VIDEO SIGNALS
RETURN-LOSS NETWORK
For optimal return-loss, an external return-loss network
is needed. The value of R2 is 75Ω, and the value of L1
is 2.7 nH.
TABLE 2-1:
COMPONENT RECOMMENDATION FOR THE EQCO30R5.D BOARD LAYOUT FOR
SMPTE VIDEO SIGNALS
Element
Value
Size
R2, R3, R4, R5
75Ω ±1%
0402
L1
2.7 nH
0402
DS60001304C-page 8
Recommended Component
2011-2016 Microchip Technology Inc.
EQCO30R5.D
2.1.2
GUIDELINES FOR PCB LAYOUT
All components in the high-speed signal path should be
0402 size for minimal parasitic effects.
The transmission line between the BNC connector and
the return-loss network (L1, R2) shall be a 75Ω singleended transmission line. Components R2, R4 and R5
are 75Ω resistors, and component L1 is a 2.7 nH
inductor. Component R3 is the 75Ω termination resistor
to GND. Components C1 and C2 are AC coupling
capacitors connected to the input of the chip. Two
decoupling capacitors (C10, C11) are placed between
VCC and GND, close to the chip. The output of the chip
is connected to the deserializer or FPGA with a 100Ω
differential transmission line. To minimize unwanted
parasitic effects, a cutout of the ground and power
plane is made underneath capacitor C6 and
underneath the input pins of the EQCO30R5 chip.
Figure 2-2 shows a recommended layout for the
EQCO30R5 implementation.
FIGURE 2-2:
RECOMMENDED PCB LAYOUT FOR EQCO30R5
2011-2016 Microchip Technology Inc.
DS60001304C-page 9
EQCO30R5.D
2.2
Typical Application Circuit for Bidirectional Link with Power Over Coax
FIGURE 2-3:
TABLE 2-2:
EQCO30R5.D TYPICAL APPLICATION CIRCUIT FOR BIDIRECTIONAL LINK
WITH POWER OVER COAX
COMPONENT RECOMMENDATION FOR THE EQCO30R5.D BOARD LAYOUT
Element
Value
Size
Recommended Component
Fb1, Fb2
1 kΩ @ 100 MHz Ferrite Bead
0603
FBMH1608HM102 from Taiyo Yuden
L1
10 µH
1812
1812PS_103 from Coilcraft
2.2.1
BIDIRECTIONAL LINK IN SMPTE
APPLICATIONS
When using the bidirectional link with power supply
transmission, the components (FB1, L1 and L2) and
layout are very critical. Changes in the design or
components may result in decreased performance.
2.2.2
PCB LAYOUT
All components in the high-speed signal path should be
0402 size for minimal parasitic effects.
Figure 2-4 shows a recommended layout for the
EQCO30R5 with uplink and power over coax.
DS60001304C-page 10
2011-2016 Microchip Technology Inc.
EQCO30R5.D
FIGURE 2-4:
RECOMMENDED PCB LAYOUT FOR EQCO30R5 IN BIDIRECTIONAL LINK
2011-2016 Microchip Technology Inc.
DS60001304C-page 11
EQCO30R5.D
3.0
ELECTRICAL CHARACTERISTICS
3.1
Absolute Maximum Ratings
Stresses beyond those listed under this section may
cause permanent damage to the device. These are
stress ratings only and are not tested. Functional
operation of the device at these or any other
conditions beyond those indicated in the operational
sections are not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
TABLE 3-1:
ABSOLUTE MAXIMUM RATINGS
Parameter
Conditions
Min.
Typ.
Max.
Units
—
-65
—
+150
°C
Storage Temperature
Ambient Temperature
Operating Temperature
Power applied
-55
—
+125
°C
Normal operation
(VCC = 3.3V ±5%)
-40
—
+85
°C
—
-0.8
—
+3.6
V
Supply Voltage to Ground
DC Input Voltage
—
-0.8
—
+3.6
V
DC Voltage to Outputs
—
-0.8
—
+3.6
V
Outputs low
—
—
90
mA
Current into Outputs
TABLE 3-2:
ELECTRICAL CHARACTERISTICS (OVER THE OPERATING VCC AND -40 TO +85°C
RANGE)
Parameter
Description
Min.
Typ.
Max.
Unit
3.15
3.3
3.45
V
—
55
—
mA
Power Supply
VCC
Supply voltage
IS
Supply current, both transmitting and receiving
Operational Bit Rate
BRsmpte
Bit rate using SMPTE data
0.143
—
3.0
Gbps
BR8B10B
Bit rate using 8B/10B coded data
0.05
—
3.125
Gbps
SDIp Connection to Coax
Zcoax
Coax cable characteristic impedance
—
75
—
Ω
Rloss
Coax return-loss as seen on SDIp pin.
Frequency range = 1 MHz-1.5 GHz
—
—
-15
dB
Rloss
Coax return-loss as seen on SDIp pin
Frequency range = 1.5 GHz-3 GHz
—
—
-10
dB
⌂VTX
Transmit amplitude (at camera end into 75Ω)
500
800
1200
mV
2x300
2x370
2x450
mV
SDOp/SDOn Outputs (CML to 1.2V)
⌂Vo
Output amplitude VSDOp,n (into 2x50Ω)
Vcmout
Common-mode output voltage when AC
coupled
—
0.83
—
V
Routput
Termination on SDOp/SDOn to VCC
—
50
—
Ω
trise_o
Rise/Fall time 20% to 80% of VSDOp,n
—
75
—
ps
DS60001304C-page 12
2011-2016 Microchip Technology Inc.
EQCO30R5.D
TABLE 3-2:
ELECTRICAL CHARACTERISTICS (OVER THE OPERATING VCC AND -40 TO +85°C
RANGE)
Uplink Parameters
VLF
Uplink transmit amplitude for Ramp = 1 kΩ
measured inside cable
110
150
190
mV
trise_lf
Rise/Fall time 20% to 80% of LF output on
SDIp with Ramp = 1 kΩ
30
40
55
ns
Vih
LFI input high voltage
0.8
—
1.3
V
Vil
LFI input low voltage
-0.5
—
0.4
V
Rinput
Internal resistor to GND
—
3.6
—
kΩ
Min.
Typ.
Max.
Units
—
—
0.25
UI
—
0.3
—
UI
—
—
0.25
UI
—
0.3
—
UI
TABLE 3-3:
JITTER NUMBERS(1)
Parameter
Jitter in Equalizer Output
Conditions
2.97 Gbps from 0-120m(2)
(2)
Jitter in Equalizer Output
2.97 Gbps from 120-140m
Jitter in Equalizer Output
1.485 Gbps from 0-160m(2)
(2)
Jitter in Equalizer Output
1.485 Gbps from 160-200m
Jitter in Equalizer Output
270 Mbps from 0-400m(2)
—
—
0.2
UI
Additive Jitter on LF Output
8B/10B coded signal at 5 Mbps
over full VCC and temperature
range.
—
—
10
ns
DCD in LF Output
1:
2:
8B/10B coded signal at 5 Mbps
over full VCC and temperature
—
—
10
ns
range.
Jitter numbers (over operating VCC range at -40°C to +85°C and full ⌂VTX range with pathological patterns)
Measured with Belden 1694A
2011-2016 Microchip Technology Inc.
DS60001304C-page 13
EQCO30R5.D
4.0
PACKAGE INFORMATION
4.1
Package Marking Information
16-Lead Plastic Quad Flat, No Lead Package – 4x4x0.9 mm Body [QFN]
16-Lead QFN (4x4x0.9 mm)
PIN 1
Example
PIN 1
EQCO
30R5.D
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS60001304C-page 14
YYWWNNN
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available characters
for customer-specific information.
2011-2016 Microchip Technology Inc.
EQCO30R5.D
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
N
NOTE 1
1
2
E
(DATUM B)
(DATUM A)
2X
0.20 C
2X
TOP VIEW
0.20 C
0.10 C
C
A1
A
SEATING
PLANE
16X
SIDE VIEW
(A3)
0.10
0.08 C
C A B
D2
(16X K)
0.10
C A B
E2
e
2
2
1
16X L
N
e
BOTTOM VIEW
16X b
0.10
0.05
C A B
C
Microchip Technology Drawing C04-259B Sheet 1 of 2
2011-2016 Microchip Technology Inc.
DS60001304C-page 15
EQCO30R5.D
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Pins
N
e
Pitch
A
Overall Height
Standoff
A1
A3
Terminal Thickness
Overall Width
E
E2
Exposed Pad Width
D
Overall Length
D2
Exposed Pad Length
b
Terminal Width
Terminal Length
L
K
Terminal-to-Exposed-Pad
MIN
0.80
0.00
1.95
1.95
0.25
0.45
MILLIMETERS
NOM
16
0.65 BSC
0.87
0.02
0.20 REF
4.00 BSC
2.05
4.00 BSC
2.05
0.30
0.55
0.425 REF
MAX
0.95
0.05
2.15
2.15
0.35
0.65
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-259B Sheet 2 of 2
DS60001304C-page 16
2011-2016 Microchip Technology Inc.
EQCO30R5.D
16-Lead Plastic Quad Flat, No Lead Package (8E) - 4x4x0.9 mm Body [QFN]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
C1
X2
16
G1
1
X1
2
C2 Y2
Y1
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Optional Center Pad Width
X2
Optional Center Pad Length
Y2
Contact Pad Spacing
C1
Contact Pad Spacing
C2
Contact Pad Width (X16)
X1
Contact Pad Length (X16)
Y1
Contact Pad to Center Pad (X16)
G1
MIN
MILLIMETERS
NOM
0.65 BSC
MAX
2.15
2.15
3.625
3.625
0.30
0.725
0.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2259A
2011-2016 Microchip Technology Inc.
DS60001304C-page 17
EQCO30R5.D
APPENDIX A:
REVISION HISTORY
Revision C (November 2016)
• Revised Section 1.1.3 (LFI).
Revision B (February 2016)
• Removed electrostatic discharge ratings from
Table 3-1.
• Minor typographical changes.
Revision A (September 2014)
This is the initial release of the document in the Microchip
format. This replaces EqcoLogic document version 1v0.
TABLE A-1:
REVISION HISTORY
Version
Date
1v0
1/27/14
Finalizing document
0v2
6/27/13
Revision
0v1
11/23/11
New document
DS60001304C-page 18
Comments
2011-2016 Microchip Technology Inc.
EQCO30R5.D
APPENDIX B:
TYPICAL EQUALIZER CHARACTERISTICS
All measurements at VCC = 3.3V, Temp = +25ºC, data pattern = prbs15 (including 20 µs of each polarity of
pathological pattern), measured with Belden 1694A cable.
FIGURE B-1:
270 Mbps, 410m,
VTX = 620 mV
FIGURE B-4:
1.485 Gbps, 200m,
VTX = 620 mV
FIGURE B-2:
270 Mbps, 410m,
VTX = 800 mV
FIGURE B-5:
1.485 Gbps, 200m,
VTX = 800 mV
FIGURE B-3:
270 Mbps, 410m,
VTX = 980 mV
FIGURE B-6:
1.485 Gbps, 200m,
VTX = 980 mV
2011-2016 Microchip Technology Inc.
DS60001304C-page 19
EQCO30R5.D
FIGURE B-7:
2.97 Gbps, 140m,
VTX = 620 mV
FIGURE B-8:
2.97 Gbps, 140m,
VTX = 800 mV
FIGURE B-9:
2.97 Gbps, 140m,
VTX = 980 mV
DS60001304C-page 20
2011-2016 Microchip Technology Inc.
EQCO30R5.D
THE MICROCHIP WEBSITE
CUSTOMER SUPPORT
Microchip provides online support via our website at
www.microchip.com. This website is used as a means to
make files and information easily available to customers.
Accessible by using your favorite Internet browser, the
website contains the following information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and
archived software
• General Technical Support – Frequently Asked
Questions (FAQs), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the website
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip website at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
2011-2016 Microchip Technology Inc.
DS60001304C-page 21
EQCO30R5.D
PRODUCT IDENTIFICATION SYSTEM
To order parts, including industrial, or obtain information, for e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
I
RM
Device
Temp. Range
Radio
Module
XXX
Firmware
F
Revision Number
Examples:
a)
b)
Device:
EQCO30R5.D
Temperature Range: I
Package:
EQCO30R5.D
= Industrial temperature,
16-Lead QFN
Tube packaging
EQCO30R5.D-TRAY = Industrial temperature,
16-Lead QFN
Tray packaging
= -40C to +85C (Industrial temperature)
TRAY = Tray
(Blank) = Tube
DS60001304C-page 22
2011-2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2011-2016 Microchip Technology Inc.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2011-2016, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-1148-2
DS60001304C-page 23
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