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MCP25612FD-E/SL

MCP25612FD-E/SL

  • 厂商:

    ACTEL(微芯科技)

  • 封装:

    SOIC14_150MIL

  • 描述:

    IC TRANSCEIVER 2/2 14SOIC

  • 数据手册
  • 价格&库存
MCP25612FD-E/SL 数据手册
MCP25612FD Dual CAN Flexible Data-Rate Transceiver Features • Supports both “classic” CAN 2.0 and CAN FD physical layer requirements • Optimized for CAN FD (Flexible Data-Rate) at 2, 5 and 8 Mbps Operation: - Maximum Propagation Delay: 120 ns - Loop Delay Symmetry: -10%/+10% (2 Mbps) • Implements ISO-11898-2 and ISO-11898-5 Standard Physical Layer Requirements • Very Low Standby Current (5 µA per transceiver, typical) • Two Fully Independent VDDX and VSSX Pins per CAN FD Transceiver for Added Flexibility and Reliability: - Optimal for redundant CAN networks • Compatible to 5V MCUs • Functional Behavior Predictable Under All Supply Conditions: - Device is in Unpowered mode if VDDX drops below undervoltage level - An unpowered node or brown-out event will not load the CAN bus • Detection of Ground Fault: - Permanent dominant detection on TXDX - Permanent dominant detection on bus • Power-on Reset and Undervoltage Lock-out on VDDX Pin • Protection against Damage due to Short-Circuit Conditions (positive or negative battery voltage) • Protection against High-Voltage Transients in Automotive Environments • Automatic Thermal Shutdown Protection • Suitable for 12V and 24V Systems • Meets or exceeds Stringent Automotive Design Requirements, including “Hardware Requirements for LIN, CAN and FlexRay™ Interfaces in Automotive Applications”, Version 1.3, May 2012: - Conducted emissions @ 2 Mbps with Common-Mode Choke (CMC) - Direct Power Injection (DPI) @ 2 Mbps with CMC • Meets SAE J2962/2 “Communication Transceivers Qualification Requirements – CAN”: - Passes radiated emissions at 2 Mbps without a CMC • High Noise Immunity due to Differential Bus Implementation • High ESD Protection on CANHx and CANLx, Meets IEC61000-4-2, up to ±6 kV • Available in 14-Lead SOIC  2015 Microchip Technology Inc. • Temperature Ranges: - Extended (E): -40°C to +125°C - High (H): -40°C to +150°C Description The MCP25612FD is a second generation, dual CAN FD transceiver from Microchip Technology Inc. It offers all of the features from two fully independent MCP2561FD CAN transceivers, except for the SPLIT pin. It ensures Loop Delay Symmetry in order to support the higher data rates required for CAN FD. The maximum propagation delay is improved to support a longer bus length. The device meets the automotive requirements for CAN FD bit rates, low quiescent current, robust Electromagnetic Compatibility (EMC) and Electrostatic Discharge (ESD). Package Types MCP25612FD SOIC TXD1 1 14 STBY1 VSS1 2 13 CANH1 VDD1 3 12 CANL1 RXD1 4 11 STBY2 TXD2 5 10 CANH2 VSS2 6 9 CANL2 VDD2 7 8 RXD2 Typical Applications Automotive • Powertrain • Body Control • Gateway • Chassis and Safety • Infotainment Industrial • Factory Automation • Gateway • Server Backplanes • Elevators • Robotics DS20005409A-page 1 MCP25612FD Device Block Diagram VDD1 Digital I/O Supply Thermal Protection POR UVLO VDD1 Permanent Dominant Detect TXD1 CANH1 Driver and Slope Control VDD1 CANL1 Mode Control STBY1 Wake-up Filter CANH1 LP_RX CANL1 Receiver RXD1 CANH1 HS_RX CANL1 VSS1 VDD2 Digital I/O Supply Thermal Protection POR UVLO VDD2 Permanent Dominant Detect TXD2 Driver and Slope Control VDD2 STBY2 CANL2 Mode Control Wake-up Filter CANH1 LP_RX (Note 1) RXD2 CANH2 CANL1 Receiver CANH1 HS_RX CANL1 VSS2 Note 1: There is only one receiver implemented. The receiver can operate in either Low-Power or High-Speed mode. DS20005409A-page 2  2015 Microchip Technology Inc. MCP25612FD 1.0 1.1.1 DEVICE OVERVIEW The MCP25612FD is a dual fully independent, CAN FD transceiver Fault tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP25612FD device provides differential transmit and receive capability for the CAN protocol controller, and is fully compatible with the ISO 11898-2 and ISO 11898-5 standards. The Loop Delay Symmetry is ensured to support data rates up to 8 Mbps for CAN FD (Flexible Data-Rate). The maximum propagation delay was improved to support longer bus length. Typically, each node in a CAN system must have a device to convert the digital signals generated by a CAN controller to signals suitable for transmission over the bus cabling (differential output). It also provides a buffer between the CAN controller and the high-voltage spikes that can be generated on the CAN bus by outside sources. 1.1 Mode Control Block The MCP25612FD supports two modes of operation between the two CAN transceivers independently: • Normal Mode • Standby Mode NORMAL MODE Normal mode is selected by applying low-level voltage to the STBYx pin. The driver block is operational and can drive the bus pins. The slopes of the output signals on CANHx and CANLx are optimized to produce minimal Electromagnetic Emissions (EME). The high-speed differential receiver is active. 1.1.2 STANDBY MODE The device may be placed in Standby mode by applying a high-level voltage to the STBYx pin. In Standby mode, the transmitter and the high-speed part of the receiver are switched off to minimize power consumption. The low-power receiver and the wake-up filter blocks are enabled to monitor the bus for activity. The Receive pin (RXDX) will show a delayed representation of the CAN bus due to the wake-up filter. The CAN controller gets interrupted by a negative edge on the RXDX pin (Dominant state on the CAN bus). The CAN controller must put the MCP25612FD back into Normal mode, using the STBYx pin, in order to enable high-speed data communication. The CAN bus wake-up function requires VDDX to be in valid range. These modes are summarized in Table 1-1. TABLE 1-1: Mode MODES OF OPERATION RXDX Pin STBYx Pin Low High Normal Low Bus is dominant Bus is recessive Standby High Wake-up request is detected No wake-up request detected  2015 Microchip Technology Inc. DS20005409A-page 3 MCP25612FD 1.2 Transmitter Function The CAN bus has two states: • Dominant state • Recessive state A Dominant state occurs when the differential voltage between CANHx and CANLx is greater than VDIFFX(D)(I). A Recessive state occurs when the differential voltage is less than VDIFFX(R)(I). The Dominant and Recessive states correspond to the Low and High state of the TXDX input pin, respectively. However, a Dominant state initiated by another CAN node will override a Recessive state on the CAN bus. 1.3 Receiver Function In Normal mode, the RXDX output pin reflects the differential bus voltage between CANHx and CANLx. The Low and High states of the RXDX output pin correspond to the Dominant and Recessive states of the CAN bus, respectively. 1.4 Internal Protection CANHx and CANLx are protected against battery short circuits and electrical transients that can occur on the CAN bus. This feature prevents destruction of the transmitter output stage during such a Fault condition. The device is further protected from excessive current loading by thermal shutdown circuitry that disables the output drivers when the junction temperature exceeds a nominal limit of +175°C. All other parts of the chip remain operational and the chip temperature is lowered due to the decreased power dissipation in the transmitter outputs. This protection is essential to protect against bus line short-circuit induced damage. The activation of the internal protection in one of the transceivers will not affect the other one since these are fully independent. 1.5 In Standby mode, if the MCP25612FD detects an extended Dominant condition on the bus, it will set the RXDX pin to the Recessive state. This allows the attached controller to go to Low-Power mode until the dominant issue is corrected. RXDX is latched high until a Recessive state is detected on the bus and the wake-up function is enabled again. Both conditions have a time-out of 1.25 ms (typical). This implies a maximum bit time of 69.44 µs (14.4 kHz), allowing up to 18 consecutive dominant bits on the bus. The permanent dominant detection in one of the transceivers will not affect the other one since these are fully independent. 1.6 Power-on Reset (POR) and Undervoltage Detection The MCP25612FD has undervoltage detection on the VDDX supply pin. The typical undervoltage threshold is 4V. When the device is powered on, CANHx and CANLx remain in a High-Impedance state until VDDX exceeds its undervoltage level. Once powered on, CANHx and CANLx will enter a High-Impedance state if the voltage level at VDDX drops below the undervoltage level, providing voltage brown-out protection during normal operation. In Normal mode, the receiver output is forced to the Recessive state during an undervoltage condition on VDDX. In Standby mode, the low-power receiver is only enabled when the VDDX supply voltage rises above its undervoltage threshold. Once the threshold voltage is reached, the low-power receiver is no longer controlled by the POR comparator and remains operational down to about 2.5V on the VDDX supply. Permanent Dominant Detection The MCP25612FD device prevents two conditions: • Permanent dominant condition on TXDX • Permanent dominant condition on the bus In Normal mode, if the MCP25612FD detects an extended Low state on the TXDX input, it will disable the CANHx and CANLx output drivers in order to prevent the corruption of data on the CAN bus. The drivers will remain disabled until TXDX goes to the High state. DS20005409A-page 4  2015 Microchip Technology Inc. MCP25612FD 2.0 ELECTRICAL CHARACTERISTICS 2.1 Absolute Maximum Ratings† VDDX ...........................................................................................................................................................................7.0V DC Voltage at TXDX, RXDX, STBYx and VSSX ..................................................................................-0.3V to VDDX + 0.3V DC Voltage at CANHx and CANLx............................................................................................................... -58V to +58V Transient Voltage on CANHx, CANLx (ISO-7637) (see Figure 2-4)......................................................... -150V to +100V Storage Temperature ..............................................................................................................................-55°C to +150°C Operating Ambient Temperature .............................................................................................................-40°C to +150°C Virtual Junction Temperature, TVJ (IEC60747-1) ....................................................................................-40°C to +190°C Soldering Temperature of Leads (10 seconds) ..................................................................................................... +300°C ESD Protection on CANHx and CANLx Pins (IEC 61000-4-2); 330Ω/150 pF; Unpowered; Contact Discharge...... ±6 kV ESD Protection on CANHx and CANLx Pins (IEC 801; Human Body Model); 1500Ω/100 pF ................................ ±8 kV ESD Protection on All Other Pins (IEC 801; Human Body Model); 1500Ω/100 pF.................................................. ±4 kV ESD Protection on All Pins (IEC 801; Machine Model); 0Ω/200 pF........................................................................±300V ESD Protection on All Pins (IEC 801; Charge Device Model).................................................................................±750V † NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2.2 Specifications TABLE 2-1: DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C; High (H): TAMB = -40°C to +150°C; VDDX = 4.5V to 5.5V, RLX = 60Ω, CLX = 100 pF; unless otherwise specified. Characteristic Sym Min Typ Max Units VDDX 4.5 — 5.5 Supply Current (per transceiver) IDD — 5 10 — 45 70 Standby Current (per transceiver) IDDS — 5 15 µA High Level of the POR Comparator VPORH 3.8 — 4.3 V Low Level of the POR Comparator VPORL 3.4 — 4.0 V Hysteresis of the POR Comparator VPORD 0.3 — 0.8 V Conditions Supply (VDDX Pin) Voltage Range Note 1: 2: mA Recessive; VTXDX = VDDX Dominant; VTXDX = 0V Characterized; not 100% tested. -12V to 12V is ensured by characterization, tested from -2V to 7V.  2015 Microchip Technology Inc. DS20005409A-page 5 MCP25612FD TABLE 2-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C; High (H): TAMB = -40°C to +150°C; VDDX = 4.5V to 5.5V, RLX = 60Ω, CLX = 100 pF; unless otherwise specified. Characteristic Sym Min Typ Max Units Conditions Bus Line Transmitter (CANHx, CANLx) CANHx, CANLx: Recessive Bus Output Voltage VO(R) 2.0 0.5 VDDX 3.0 V VTXDX = VDDX; no load CANHx, CANLx: Bus Output Voltage in Standby VO(S) -0.1 0.0 +0.1 V STBYx = VTXDX = VDDX; no load Recessive Output Current IO(R) -5 — +5 mA CANHx: Dominant Output Voltage VO(D) 2.75 3.50 4.50 V 0.50 1.50 2.25 CANLx: Dominant Output Voltage -24V < VCAN < +24V TTXDX = 0; RLX = 50 to 65Ω RLX = 50 to 65Ω Symmetry of Dominant Output Voltage (VDDX – VCANHX – VCANLX) VO(D)(M) -400 0 +400 mV Dominant: Differential Output Voltage VO(DIFF) 1.5 2.0 3.0 V VTXDX = VSSX; RLX = 50 to 65Ω (see Figure 2-1 and Figure 2-3) -120 0 12 mV VTXDX = VDDX (see Figure 2-1 and Figure 2-3) -500 0 50 mV VTXDX = VDDX; no load (see Figure 2-1 and Figure 2-3) -120 85 — mA VTXDX = VSSX; VCANHX = 0V; CANLx: Floating -100 — — mA Same as above, but VDDX = 5V; TAMB = +25°C (Note 1) — 75 +120 mA VTXDX = VSSX; VCANLX = 18V; CANHx: Floating — — +100 mA Same as above, but VDDX = 5V; TAMB = +25°C (Note 1) -1.0 — +0.5 V Normal mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) -1.0 — +0.4 0.9 — VDDX 1.0 — VDDX Recessive: Differential Output Voltage CANHx: Short-Circuit Output Current IO(SC) CANLx: Short-Circuit Output Current VTXDX = VSSX (Note 1) Bus Line Receiver (CANHx, CANLx) Recessive Differential Input Voltage Dominant Differential Input Voltage Note 1: 2: VDIFFX(R)(I) VDIFFX(D)(I) Standby mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) V Normal mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) Standby mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) Characterized; not 100% tested. -12V to 12V is ensured by characterization, tested from -2V to 7V. DS20005409A-page 6  2015 Microchip Technology Inc. MCP25612FD TABLE 2-1: DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C; High (H): TAMB = -40°C to +150°C; VDDX = 4.5V to 5.5V, RLX = 60Ω, CLX = 100 pF; unless otherwise specified. Characteristic Sym Min Typ Max Units 0.5 0.7 0.9 V 0.4 — 1.0 Conditions Bus Line Receiver (CANHx, CANLx) (Continued) Differential Receiver Threshold VTH(DIFF) Normal mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) Standby mode; -12V < V(CANHX, CANLX) < +12V (see Figure 2-5) (Note 2) Differential Input Hysteresis VHYS(DIFF) 50 — 200 mV Normal mode (see Figure 2-5) (Note 1) Common-Mode Input Resistance RIN 10 — 30 kΩ (Note 1) RIN(M) -1 0 +1 % VCANHX = VCANLX (Note 1) Differential Input Resistance RIN(DIFF) 10 — 100 kΩ (Note 1) Common-Mode Input Capacitance CIN(CM) — — 20 pF VTXDX = VDDX (Note 1) Differential Input Capacitance CIN(DIFF) — — 10 ILI -5 — +5 µA High-Level Input Voltage VIH 0.7 VDDX — VDDX + 0.3 V Low-Level Input Voltage VIL -0.3 — 0.3 VDDX V Common-Mode Resistance Matching CANHx, CANLx: Input Leakage VTXDX = VDDX (Note 1) VDDX = VTXDX = VSTBYX = 0V; VCANHX = VCANLX = 5V Digital Input Pins (TXDX, STBYx) High-Level Input Current IIH -1 — +1 µA TXDX: Low-Level Input Current IIL(TXDX) -270 -150 -30 µA STBYx: Low-Level Input Current IIL(STBYX) -30 — -1 µA High-Level Output Voltage VOHX VDDX – 0.4 — — V IOH = -2 mA; typical -4 mA Low-Level Output Voltage VOLX — — 0.4 V IOL = 4 mA; typical 8 mA TJ(SD) 165 175 185 °C -12V < V(CANHX, CANLX) < +12V (Note 1) TJ(HYST) 20 — 30 °C -12V < V(CANHX, CANLX) < +12V (Note 1) Receive Data Output (RXDX) Thermal Shutdown Shutdown Junction Temperature Shutdown Temperature Hysteresis Note 1: 2: Characterized; not 100% tested. -12V to 12V is ensured by characterization, tested from -2V to 7V.  2015 Microchip Technology Inc. DS20005409A-page 7 MCP25612FD Normal Mode Standby Mode CANH X, CANL X CANHX CANL X Recessive Dominant Recessive Time VDDX CANHX VDDX/2 Normal RXDX Standby Mode CANL X FIGURE 2-1: DS20005409A-page 8 Physical Bit Representation and Simplified Bias Implementation.  2015 Microchip Technology Inc. MCP25612FD TABLE 2-2: AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C; High (H): TAMB = -40°C to +150°C; VDDX = 4.5V to 5.5V, RLX = 60ΩCLX = 100 pF; unless otherwise specified. Param. No. Sym 1 tBIT 2 fBIT Characteristic Min Typ Max Units Bit Time 0.125 — 69.44 µs Bit Frequency 14.4 — 8000 kHz Conditions 3 tTXDX-BUSON Delay TXDX Low to Bus Dominant — 65 — ns (Note 1) 4 — 90 — ns (Note 1) 5 tTXDX-BUSOFF Delay TXDX High to Bus Recessive tBUSON-RXDX Delay Bus Dominant to RXDX — 60 — ns (Note 1) 6 tBUSOFF-RXDX Delay Bus Recessive to RXDX — 65 — ns (Note 1) 7 tTXDX-RXDX Propagation Delay TXDX to RXDX 8a tBIT(RXDX),2M Recessive Bit Time on RXDX – 2 Mbps, Loop Delay Symmetry — 90 120 ns — 120 180 ns RLX = 120Ω, CLX = 200 pF (Note 1) 450 485 550 ns tBIT(TXDX) = 500 ns (see Figure 2-10) 400 460 550 ns tBIT(TXDX) = 500 ns (see Figure 2-10); RLX = 120Ω, CLX = 200 pF (Note 1) 8b tBIT(RXDX),5M Recessive Bit Time on RXDX – 5 Mbps, Loop Delay Symmetry 160 185 220 ns tBIT(TXDX) = 200 ns (see Figure 2-10) 8c tBIT(RXDX),8M Recessive Bit Time on RXDX – 8 Mbps, Loop Delay Symmetry 85 105 140 ns tBIT(TXDX) = 120 ns (see Figure 2-10) (Note 1) 9 tFLTR(WAKE) Delay Bus Dominant to RXDX (Standby mode) 0.5 1 4 µs Standby mode Delay Standby to Normal Mode 5 25 40 µs Negative edge on STBYx 10 tWAKE 11 tPDT Permanent Dominant Detect Time — 1.25 — ms TXDX = 0V 12 tPDTR Permanent Dominant Timer Reset — 100 — ns The shortest Recessive pulse on TXDX or CAN bus to reset Permanent Dominant Timer Note 1: Characterized, not 100% tested. Load Condition 1 Load Condition 2 VDDX/2 RLX CLX Pin VSSX CLX Pin VSSX RLX = 464Ω CLX = 50 pF for all digital pins FIGURE 2-2: Test Load Conditions.  2015 Microchip Technology Inc. DS20005409A-page 9 MCP25612FD 0.1 µF VDDX CANHx TXDX CAN Transceiver RXDX 15 pF FIGURE 2-3: GNDx CANLx STBYx Test Circuit for Electrical Characteristics. 1000 pF CANHx TXDX RXDX CAN Transceiver RLX Transient Generator (Note 1) CANLx 1000 pF STBYx GNDx Note 1: CLX RLX The waveforms of the applied transients shall be in accordance with ISO-7637, Part 1, Test Pulses 1, 2, 3a and 3b. FIGURE 2-4: Test Circuit for Automotive Transients. RXDX (Receive Data Output Voltage) VOHX VDIFFX(R)(I) VDIFFX(D)(I) VOLX VDIFFX(H)(I) 0.5 FIGURE 2-5: DS20005409A-page 10 VDIFFX (V) 0.9 Hysteresis of the Receiver.  2015 Microchip Technology Inc. MCP25612FD 2.3 Terms and Definitions A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section. 2.3.1 2.3.5 DIFFERENTIAL VOLTAGE, VDIFFX (OF CAN BUS) Differential voltage of the two-wire CAN bus value: VDIFFX = VCANHX – VCANLX. 2.3.6 BUS VOLTAGE INTERNAL CAPACITANCE, CIN (OF A CAN NODE) VCANLX and VCANHX denote the voltages of the bus line wires, CANLx and CANHx, relative to the ground of each individual CAN node. Capacitance seen between CANLx (or CANHx) and ground, during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-6). 2.3.2 2.3.7 COMMON-MODE BUS VOLTAGE RANGE Boundary voltage levels of VCANLX and VCANHX, with respect to ground, for which proper operation will occur if up to the maximum number of CAN nodes are connected to the bus. 2.3.3 DIFFERENTIAL INTERNAL CAPACITANCE, CDIFF (OF A CAN NODE) Capacitance seen between CANLx and CANHx during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-6). 2.3.4 INTERNAL RESISTANCE, RIN (OF A CAN NODE) Resistance seen between CANLx (or CANHx) and ground, during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-6). ECU RIN RIN DIFFERENTIAL INTERNAL RESISTANCE, RDIFF (OF A CAN NODE) Resistance seen between CANLx and CANHx, during the Recessive state, when the CAN node is disconnected from the bus (see Figure 2-6).  2015 Microchip Technology Inc. CANLx CDIFF RDIFF CIN CIN CANHx GROUND FIGURE 2-6: Physical Layer Definitions. DS20005409A-page 11 MCP25612FD 2.4 Timing Diagrams and Specifications VDDX TXDX (Transmit Data Input Voltage) 0V VDIFFX (CANHx, CANLx Differential Voltage) RXDX (Receive Data Output Voltage) FIGURE 2-7: 3 7 5 4 8 6 Timing Diagram for AC Characteristics. VDDX VSTBYX Input Voltage 0V VDDX/2 VCANHX/VCANLX 0 VTXDX = VDDX FIGURE 2-8: 10 Timing Diagram for Wake-up from Standby. Minimum Pulse Width until CAN bus goes to Dominant State after the Falling Edge TXDX Driver is Off VDIFFX (VCANHX – VCANLX) 11 FIGURE 2-9: DS20005409A-page 12 12 Permanent Dominant Timer Reset Detect.  2015 Microchip Technology Inc. MCP25612FD 70% TXDX 30% 5 * tBIT(TXDX) tBIT(TXDX) 30% tLOOP (F) 70% RXDX 30% tLOOP(R) 8 tBIT(RXDX) The bit time of a recessive bit, after five dominant bits, is measured on the RXDX pin. Due to asymmetry of the loop delay, and the CAN transceiver not being a push-pull driver, the recessive bits tend to shorten. Note: FIGURE 2-10: TABLE 2-3: Timing Diagram for Loop Delay Symmetry. THERMAL SPECIFICATIONS Parameter Symbol Min. Typ. Max. Units Specified Temperature Range TA -40 — +125 C -40 — +150 Operating Temperature Range TA -40 — +150 C Storage Temperature Range TA -55 — +150 C JA — 90.8 — C/W Test Conditions Temperature Ranges Thermal Package Resistance Thermal Resistance, 14L-SOIC  2015 Microchip Technology Inc. DS20005409A-page 13 MCP25612FD 3.0 PIN DESCRIPTIONS Table 3-1 describes the MCP25612FD device pinout. TABLE 3-1: MCP25612FD PIN FUNCTIONS SOIC 3.1 Pin Name Pin Type 1 TXD1 I 2 VSS1 Power Ground 3 VDD1 Power Transceiver Supply Voltage 4 RXD1 O TXD2 I VSS2 Power Ground 7 VDD2 Power Transceiver Supply Voltage 8 RXD2 O Transmit Data Input Receive Data Output 9 CANL2 I/O CAN Low-Level Bus Line 10 CANH2 I/O CAN High-Level Bus Line 11 STBY2 I 12 CANL1 I/O CAN Low-Level Bus Line 13 CANH1 I/O CAN High-Level Bus Line 14 STBY1 I Transmitter Data Input Pin (TXDX) Ground Supply Pin (VSSX) Supply Voltage Pin (VDDX) Positive supply voltage pin. Supplies the transmitter and receiver, including the wake-up receiver. 3.4 Receive Data Output 6 Ground supply pin. 3.3 Transmit Data Input 5 The CAN transceivers drive the differential output pins, CANHx and CANLx, according to TXDX. TXDX is usually connected to the transmitter data output of the CAN controller device. When TXDX is low, CANHx and CANLx are in the Dominant state. When TXDX is high, CANHx and CANLx are in the Recessive state, provided that another CAN node is not driving the CAN bus with a Dominant state. TXDX is connected to an internal pull-up resistor (nominal 33 kΩ) to VDDX. 3.2 Pin Function Receiver Data Output Pin (RXDX) Standby Mode Input (active-high) Standby Mode Input (active-high) 3.5 CAN Low Pin (CANLx) The CANLx output drives the low side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANLx disconnects from the bus when MCP25612FD is not powered. 3.6 CAN High Pin (CANHx) The CANHx output drives the high side of the CAN differential bus. This pin is also tied internally to the receive input comparator. CANHx disconnects from the bus when MCP25612FD is not powered. 3.7 Standby Mode Input Pin (STBYx) This pin selects between Normal or Standby mode. In Standby mode, the transmitter and high-speed receiver are turned off; only the low-power receiver and wake-up filter are active. STBYx is connected to an internal MOS pull-up resistor to VDDX. The typical value is 660 kΩ. RXDX is a CMOS-compatible output that drives high or low, depending on the differential signals on the CANHx and CANLx pins, and is usually connected to the receiver data input of the CAN controller device. RXDX is high when the CAN bus is in the Recessive state and low in the Dominant state. RXDX is supplied by VDDX. DS20005409A-page 14  2015 Microchip Technology Inc. MCP25612FD 4.0 TYPICAL APPLICATIONS In order to meet some EMC/EMI requirements, a Common-Mode Choke (CMC) may be needed for data rates greater than 1 Mbps. VBAT 5V LDO 0.1 F 0.1 F 0.1 F VDD VDD1 CANTX1 TXD1 CANRX1 RXD1 RA1 STBY2 CANTX2 TXD2 CANRX2 RXD2 Vss FIGURE 4-1: VDD2 CANH1 CANH1 STBY1 120 MCP25612FD PIC® MCU RA0 CANL1 CANL1 CANH2 CANH2 120 CANL2 VSS1 CANL2 VSS2 MCP25612FD Application.  2015 Microchip Technology Inc. DS20005409A-page 15 MCP25612FD 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 14-Lead SOIC (3.90 mm) Example MCP25612FD E/SL e3 1518256 Legend: XX...X Y YY WW NNN e3 * Note: DS20005409A-page 16 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator (e3) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2015 Microchip Technology Inc. MCP25612FD 5.2 Note: Package Details For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2015 Microchip Technology Inc. DS20005409A-page 17 MCP25612FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005409A-page 18  2015 Microchip Technology Inc. MCP25612FD 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ  2015 Microchip Technology Inc. DS20005409A-page 19 MCP25612FD NOTES: DS20005409A-page 20  2015 Microchip Technology Inc. MCP25612FD APPENDIX A: REVISION HISTORY Revision A (June 2015) Original release of this document.  2015 Microchip Technology Inc. DS20005409A-page 21 MCP25612FD NOTES: DS20005409A-page 22  2015 Microchip Technology Inc. MCP25612FD PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact the factory or one of the sales offices listed on the back page. PART NO. -X /XX Device Temperature Range Package Examples: a) b) Device: MCP25612FD: Dual CAN FD Transceiver MCP25612FDT: Dual CAN FD Transceiver  (Tape and Reel) Temperature Range: E = -40°C to +125°C (Extended) H = -40°C to +150°C (High) Package: SL = 14-Lead Plastic Small Outline - Narrow,  3.90 mm Body  2015 Microchip Technology Inc. c) d) MCP25612FD-E/SL: Extended Temperature, 14LD SOIC package MCP25612FDT-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC package MCP25612FD-H/SL: High Temperature, 14LD SOIC package. MCP25612FDT-H/SL: Tape and Reel, High Temperature, 14LD SOIC package DS20005409A-page 23 MCP25612FD NOTES: DS20005409A-page 24  2015 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. The Embedded Control Solutions Company and mTouch are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet, KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2015, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-63277-484-2 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==  2015 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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