AD704AN

a FEATURES High DC Precision 75 V Max Offset Voltage 1 V/ C Max Offset Voltage Drift 150 pA Max Input Bias Current 0.2 pA/ C Typical I B Drift Low Noise 0.5 V p-p Typical Noise, 0.1 Hz to 10 Hz Low Power 600 A Max Supply Current per Amplifier MIL-STD-883B Processing Available Available in Tape and Reel in Accordance with EIA-481A Standard Dual Version: AD706 APPLICATIONS Industrial/Process Controls Weigh Scales ECG/EKG Instrumentation Low Frequency Active Filters Quad Picoampere Input Current Bipolar Op Amp AD704 CONNECTION DIAGRAMS 14-Lead Plastic DIP (N) 14-Lead CerDIP (Q) Packages OUTPUT –IN +IN +VS +IN –IN OUTPUT 1 2 3 4 5 6 7 14 16-Lead SOIC (R) Package 1 2 3 4 5 6 7 8 OUTPUT OUTPUT –IN +IN –VS +IN –IN 16 OUTPUT –IN +IN –VS +IN –IN OUTPUT NC 1 4 13 12 –IN +IN +VS +IN –IN 1 4 15 14 AD704 (TOP VIEW) 11 10 AD704 (TOP VIEW) 13 12 2 3 9 8 2 3 11 10 9 OUTPUT OUTPUT NC NC = NO CONNECT 20-Terminal LCC (E) Package OUT1 OUT4 –IN1 NC –IN4 3 2 1 20 19 PRODUCT DESCRIPTION The AD704 is a quad, low power bipolar op amp that has the low input bias current of a BiFET amplifier but which offers a significantly lower IB drift over temperature. It utilizes super-beta bipolar input transistors to achieve picoampere input bias current levels (similar to FET input amplifiers at room temperature), while its IB typically only increases by 5× at 125°C (unlike a BiFET amp, for which IB doubles every 10°C resulting in a 1000× increase at 125°C). Furthermore, the AD704 achieves 75 µV offset voltage and low noise characteristics of a precision bipolar input op amp. Since it has only 1/20 the input bias current of an AD OP07, the AD704 does not require the commonly used “balancing” resistor. Furthermore, the current noise is 1/5 that of the AD OP07 which makes the AD704 usable with much higher source impedances. At 1/6 the supply current (per amplifier) of the AD OP07, the AD704 is better suited for today’s higher density circuit boards and battery-powered applications. The AD704 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in precision instrumentation, and as a high quality integrator. The AD704 is internally compensated for unity gain and is available in five performance grades. The AD704J and AD704K are rated over the commercial temperature range of 0°C to 70°C. The AD704A is rated over the industrial temperature of –40°C to +85°C. The AD704T is rated over the military temperature range of –55°C to +125°C and is available processed to MIL-STD-883B, Rev. C. R EV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 100 +IN1 4 NC 5 +VS 6 NC 7 +IN2 8 AMP 1 AMP 4 18 +IN4 17 NC 16 –VS 15 NC 14 +IN3 AD704 AMP 2 AMP 3 9 –IN2 10 OUT2 11 NC 12 OUT3 13 –IN3 NC = NO CONNECT 10 TYPICAL I B – nA TYPICAL JFET AMP 1 0.1 AD704T 0.01 –55 +25 TEMPERATURE – C +125 Figure 1. Input Bias Current Over Temperature One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD704–SPECIFICATIONS (@ T = 25 C, V A CM = 0 V, and 15 V dc, unless otherwise noted.) AD704K Typ Max 30 50 0.2 132 126 0.3 80 0.2 75 150 1.0 112 108 150 200 200 300 30 0.4 80 80 100 150 200 300 130 200 300 400 110 104 110 106 104 104 110 106 150 150 50 0.4 80 100 AD704T Typ Max 30 80 132 126 0.3 80 1.0 600 700 150 200 400 500 150 250 400 600 200 250 100 150 1.0 Parameters INPUT OFFSET VOLTAGE Initial Offset Offset vs. Temp, Average TC vs. Supply (PSRR) TMIN –TMAX Long-Term Stability INPUT BIAS CURRENT 1 vs. Temp, Average TC TMIN –TMAX INPUT OFFSET CURRENT vs. Temp, Average TC TMIN –TMAX MATCHING CHARACTERISTICS Offset Voltage Conditions AD704J/A Min Typ Max 50 100 0.2 132 126 0.3 100 0.3 150 250 1.5 Min Min Unit µV µV µV/°C dB dB µV/month pA pA pA/°C pA pA pA pA pA/°C pA pA µV µV pA pA dB dB dB dB dB TMIN –TMAX VS = ± 2 to ± 18 V 100 VS = ± 2.5 to ± 18 V 100 VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V VCM = 0 V VCM = ± 13.5 V 112 108 270 300 300 400 80 0.6 100 100 250 300 300 400 250 400 500 600 TMIN –TMAX Input Bias Current2 TMIN –TMAX Common-Mode Rejection 3 TMIN –TMAX Power Supply Rejection 4 Crosstalk5 FREQUENCY RESPONSE UNITY GAIN Crossover Frequency Slew Rate, Unity Gain Slew Rate INPUT IMPEDANCE Differential Common-Mode INPUT VOLTAGE RANGE Common-Mode Voltage Common-Mode Rejection Ratio INPUT CURRENT NOISE INPUT VOLTAGE NOISE TMIN –TMAX f = 10 Hz RLOAD = 2 kΩ 94 94 94 94 150 G = –1 TMIN –TMAX 0.8 0.15 0.1 40 2 300 2 ± 13.5 ± 14 100 132 98 128 3 50 0.5 17 15 200 150 200 150 2000 1500 1000 1000 0.8 0.15 0.1 40 2 300 2 ± 13.5 ± 14 114 132 108 128 3 50 0.5 17 15 400 300 300 200 2000 1500 1000 1000 2.0 22 400 300 200 100 0.8 0.15 0.1 40 2 300 2 ± 13.5 ± 14 110 132 108 128 3 50 0.5 17 15 2000 1500 1000 1000 2.0 22 MHz V/µs V/µs MΩ pF G Ω pF V dB dB pA p-p fA/√Hz µV p-p nV/√Hz nV/√Hz V/mV V/mV V/mV V/mV VCM = ± 13.5 V TMIN –TMAX 0.1 to 10 Hz f = 10 Hz 0.1 to 10 Hz f = 10 Hz f = 1 kHz VO = ± 12 V RLOAD = 10 kΩ TMIN –TMAX VO = ± 10 V RLOAD = 2 kΩ TMIN –TMAX 22 OPEN-LOOP GAIN –2– REV. C AD704 Parameters OUTPUT CHARACTERISTICS Voltage Swing Current CAPACITIVE LOAD Drive Capability POWER SUPPLY Rated Performance Operating Range Quiescent Current TMIN –TMAX TRANSISTOR COUNT # of Transistors Conditions RLOAD = 10 kΩ TMIN –TMAX Short Circuit Gain = 1 AD704J/A Min Typ Max Min AD704K Typ Max Min AD704T Typ Max Unit ± 13 ± 14 ± 15 10,000 ± 15 1.5 1.6 180 ± 13 ± 14 ± 15 10,000 ± 15 1.5 1.6 180 ± 13 ± 14 ± 15 10,000 ± 15 1.5 1.6 180 V mA pF V V mA mA ± 2.0 ± 18 2.4 2.6 ± 2.0 ± 18 2.4 2.6 ± 2.0 ± 18 2.4 2.6 NOTES 1 Bias current specifications are guaranteed maximum at either input. 2 Input bias current match is the maximum difference between corresponding inputs of all four amplifiers. 3 CMRR match is the difference of ∆VOS/∆VCM between any two amplifiers, expressed in dB. 4 PSRR match is the difference between ∆VOS/∆V SUPPLY for any two amplifiers, expressed in dB. 5 See Figure 2a for test circuit. All min and max specifications are guaranteed. Specifications subject to change without notice. REV. C –3– AD704 ABSOLUTE MAXIMUM RATINGS 1 9k 1k +VS 1/4 INPUT* SIGNAL 1k OUTPUT COM 2.5k 0.1 F –VS 1F AD704 PIN 11 0.1 F 1F AD704 PIN 4 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Internal Power Dissipation (25°C) . . . . . . . . . . . . See Note 2 Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . ± 0.7 V Output Short-Circuit Duration (Single Input) . . . . . Indefinite Storage Temperature Range Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C N, R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C Operating Temperature Range AD704J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C AD704A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C AD704T . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C Lead Temperature Range (Soldering 10 seconds) . . . . . 300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 14-Lead Plastic Package: θJA = 150°C/W 14-Lead Cerdip Package: θJA = 110°C/W 16-Lead SOIC Package: θJA = 100°C/W 20-Terminal LCC Package: θJA = 150°C/W 3 The input pins of this amplifier are protected by back-to-back diodes. If the differential voltage exceeds ± 0.7 volts, external series protection resistors should be added to limit the input current to less than 25 mA. – AD704 + ALL 4 AMPLIFIERS ARE CONNECTED AS SHOWN *THE SIGNAL INPUT (SUCH THAT THE AMPLIFIER’S OUTPUT IS AT MAX AMPLITUDE WITHOUT CLIPPING OR SLEW LIMITING) IS APPLIED TO ONE AMPLIFIER AT A TIME. THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE THEN MEASURED FOR CROSSTALK. Figure 2a. Crosstalk Test Circuit –80 AMP4 –100 CROSSTALK – dB AMP2 AMP3 –120 –140 –160 10 100 1k FREQUENCY – Hz 10k 100k Figure 2b. Crosstalk vs. Frequency ORDERING GUIDE Model AD704JN AD704JR AD704JR-/REEL AD704KN* AD704AN* AD704AR AD704AR-REEL AD704SE/883B AD704TQ/883B* Temperature Range 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –55°C to +125°C –55°C to +125°C Package Description Plastic Small Outline (SOIC) Plastic Plastic Small Outline (SOIC) Leadless Ceramic Chip Carrier Cerdip Package Option N-14 R-16 Tape and Reel N-14 N-14 R-16 Tape and Reel E-20A Q-14 Chips are also available. *Not for new designs; obsolete April 2002. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD704 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE –4– REV. C Typical Performance Characteristics– AD704 (@ 25 C, VS = 50 15 V dc, unless otherwise noted.) 50 50 PERCENTAGE OF UNITS 40 40 30 PERCENTAGE OF UNITS 30 PERCENTAGE OF UNITS 40 30 20 20 20 10 10 10 0 –80 –40 0 +40 INPUT OFFSET VOLTAGE – +80 V 0 –160 –80 0 +80 +160 INPUT BIAS CURRENT – pA 0 –120 –60 0 +60 +120 INPUT OFFSET CURRENT – pA TPC 1. Typical Distribution of Input Offset Voltage TPC 2. Typical Distribution of Input Bias Current TPC 3. Typical Distribution of Input Offset Current 35 INPUT COMMON-MODE VOLTAGE LIMIT – V (REFERRED TO SUPPLY VOLTAGES) +VS 100 30 25 20 15 10 5 0 1k 0 5 10 15 SUPPLY VOLTAGE – V 20 –1.0 –1.5 OFFSET VOLTAGE DRIFT – V/ C OUTPUT VOLTAGE – V p-p –0.5 SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED 10 +1.5 +1.0 +0.5 –VS 1.0 10k 100k FREQUENCY – Hz 1M 0.1 1k 10k 100k 1M 10M SOURCE RESISTANCE – 100M TPC 4. Input Common-Mode Voltage Range vs. Supply Voltage TPC 5. Large Signal Frequency Response TPC 6. Offset Voltage Drift vs. Source Resistance 50 4 120 CHANGE IN OFFSET VOLTAGE – V INPUT BIAS CURRENT – pA PERCENTAGE OF UNITS 40 3 100 80 POSITIVE IB 60 30 2 20 1 40 NEGATIVE IB 20 10 0 0 –0.8 –0.4 0 +0.4 +0.8 INPUT OFFSET VOLTAGE DRIFT – V/ C 0 1 2 3 4 WARM-UP TIME – Minutes 5 0 –15 –10 –5 0 5 10 COMMON-MODE VOLTAGE – V 15 TPC 7. Typical Distribution of Offset Voltage Drift TPC 8. Change in Input Offset Voltage vs. Warm-Up Time TPC 9. Input Bias Current vs. Common-Mode Voltage REV. C –5– AD704 1000 1000 VOLTAGE NOISE – nV/ Hz 100 CURRENT NOISE – fA/ Hz 100 0.5 V 10 10 100 20M 10k VOUT 1 1 10 100 FREQUENCY – Hz 1000 1 1 10 100 FREQUENCY – Hz 1000 0 5 TIME – Seconds 10 TPC 10. Input Noise Voltage Spectral Density TPC 11. Input Noise Current Spectral Density TPC 12. 0.1 Hz to 10 Hz Noise Voltage 500 160 140 180 160 140 VS = 15V 120 100 –PSR 80 +PSR 60 40 1 10 100 1k 10k FREQUENCY – Hz 100k 1M 20 0.1 VS = 15V TA = 25 C QUIESCENT CURRENT – A 450 CMR – dB 120 100 80 60 40 –55 C 20 0 0.1 400 +125 C +25 C 350 300 0 5 10 15 SUPPLY VOLTAGE – V 20 PSR – dB 1 10 100 1k 10k FREQUENCY – Hz 100k 1M TPC 13. Quiescent Supply Current vs. Supply Voltage (per Amplifier) TPC 14. Common-Mode Rejection vs. Frequency TPC 15. Power Supply Rejection vs. Frequency 10M OPEN-LOOP VOLTAGE GAIN – dB 140 120 100 PHASE 80 60 40 GAIN 20 0 –20 0.01 0.1 0 30 60 90 120 150 180 OUTPUT VOLTAGE SWING – V (REFERRED TO SUPPLY VOLTAGES) +VS RL = 10k –0.5 –1.0 –1.5 OPEN-LOOP VOLTAGE GAIN +25 C 1M +125 C PHASE SHIFT – Degrees –55 C +1.5 +1.0 +0.5 –VS 100k 1 10 LOAD RESISTANCE – k 100 1 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz 0 5 10 15 SUPPLY VOLTAGE – V 20 TPC 16. Open-Loop Gain vs. Load Resistance Over Temperature TPC 17. Open-Loop Gain and Phase vs. Frequency TPC 18. Output Voltage Swing vs. Supply Voltage –6– REV. C AD704 1000 RF +VS 0.1 F 100 90 CLOSED-LOOP OUTPUT IMPEDANCE – 100 10 A V = –1000 1 A V = +1 0.1 – VIN 1/4 VOUT RL 2k 0.1 F CL 10 0% AD704 + 0.01 I OUT = 1mA 0.001 1 10 100 1k FREQUENCY – Hz 10k 100k SQUARE WAVE INPUT 2V –VS 50 s TPC 19. Closed-Loop Output Impedance vs. Frequency TPC 20a. Unity Gain Follower (For Large Signal Applications, Resistor RF Limits the Current through the Input Protection Diodes) TPC 20b. Unity Gain Follower Large Signal Pulse Response RF = 10 kΩ, CL = 1,000 pF 10k 5s 100 90 100 90 5s +VS 0.1 F 10k VIN – + 1/4 VOUT RL 2.5k 0.1 F CL AD704 SQUARE WAVE INPUT 10 0% 10 0% 20mV 20mV –VS TPC 20c. Unity Gain Follower Small Signal Pulse Response RF = 0 Ω, CL = 100 pF TPC 20d. Unity Gain Follower Small Signal Pulse Response RF = 0 Ω, CL = 1,000 pF TPC 21a. Unity Gain Inverter Connection 2V 100 90 50 s 100 90 5s 100 90 5s 10 0% 10 0% 10 0% 20mV 20mV TPC 21b. Unity Gain Inverter Large Signal Pulse Response, CL = 1,000 pF TPC 21c. Unity Gain Inverter Small Signal Pulse Response, CL = 100 pF TPC 21d. Unity Gain Inverter Small Signal Pulse Response, CL = 1,000 pF REV. C –7– AD704 OPTIONAL AC CMRR TRIM R5 2.4k R4 47.5k Ct GAIN TRIM (500k POT) RG R3 6.34k +VS 0.1 F R1 6.34k R2 49.9k Q1 = ω= C1 4C2 1 R6 C1C2 Q2 = ω= C3 4C4 1 C3C4 R6 = R7 C1 R8 R8 = R9 AD704 –VIN +VIN + –VS + R10, 2M R11, 2M R2 2R2 + (FOR R1 = R3, R2 = R4 + R5) R1 RG C5, 0.01 F C6, 0.01 F OPTIONAL BALANCE RESISTOR NETWORKS CAN BE REPLACED WITH A SHORT INSTRUMENTATION AMPLIFIER GAIN = 1 + ALL RESISTORS METAL FILM, 1% CAPACITORS C2 AND C4 ARE SOUTHERN ELECTRONICS MPCC, POL YCARBONATE, 5%, 50 VOLT Figure 3. Gain of 10 Instrumentation Amplifier with Post Filtering The instrumentation amplifier with post filtering (Figure 3) combines two applications which benefit greatly from the AD704. This circuit achieves low power and dc precision over temperature with a minimum of components. The instrumentation amplifier circuit offers many performance benefits including BiFET level input bias currents, low input offset voltage drift and only 1.2 mA quiescent current. It will operate for gains G ≥ 2, and at lower gains it will benefit from the fact that there is no output amplifier offset and noise contribution as encountered in a 3 op amp design. Good low frequency CMRR is achieved even without the optional ac CMRR trim (Figure 4). Table I provides resistance values for 3 common circuit gains. For other gains, use the following equations: R2 = R4 + R5 = 49.9 kΩ Table I. Resistance Values for Various Gains Circuit Gain RG (Max Value Bandwidth (G) R1 and R3 of Trim Potentiometer) (–3 dB), Hz 10 100 1,000 160 6.34 kΩ 526 Ω 56.2 Ω 166 kΩ 16.6 kΩ 1.66 kΩ GAIN = 10, 0.2V p-p COMMON-MODE INPUT 140 COMMON-MODE REJECTION – dB 120 100 80 TYPICAL MONOLITHIC IN AMP 60 40 CIRCUIT TRIMMED USING CAPACITOR Ct R1 = R 3 = 49.9 kΩ 0.9 G − 1 99.8 kΩ 0.06 G Max Value of RG = WITHOUT CAPACITOR Ct 20 0 1 10 100 FREQUENCY – Hz 1k 10k Ct ≈ 1 2 π ( R 3) 5 × 105 Figure 4. Common-Mode Rejection vs. Frequency with and without Capacitor Ct –8– – – 0.1 F C2 AD704 C4 AD704 + 1/4 AD704 + DC CMRR TRIM (5k POT) C3 – – 1/4 R6 1M R7 1M 1/4 R8 1M R9 1M 1/4 OUTPUT 50k 5k 0.5k REV. C AD704 The 1 Hz, 4-pole active filter offers dc precision with a minimum of components and cost. The low current noise, IOS, and IB allow the use of 1 MΩ resistors without sacrificing the 1 µV/°C drift of the AD704. This means lower capacitor values may be used, reducing cost and space. Furthermore, since the AD704’s IB is as low as its IOS, over most of the MIL temperature range, most applications do not require the use of the normal balancing resistor (with its stability capacitor). Adding the optional balancing resistor enhances performance at high temperatures, as shown in Figure 5. Table II gives capacitor values for several common low pass responses. 180 120 OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) – V WITHOUT OPTIONAL BALANCE RESISTOR, R3 60 0 WITH OPTIONAL BALANCE RESISTOR, R3 –60 –120 –180 –40 0 +40 +80 TEMPERATURE – C +120 Figure 5. VOS vs. Temperature Performance of the 1 Hz Filter Circuit Table II. 1 Hz, 4-Pole Low-Pass Filter Recommended Component Values Desired Low Pass Response Bessel Butterworth 0.1 dB Chebychev 0.2 dB Chebychev 0.5 dB Chebychev 1.0 dB Chebychev Section 1 Frequency (Hz) 1.43 1.00 0.648 0.603 0.540 0.492 Q 0.522 0.541 0.619 0.646 0.705 0.785 Section 2 Frequency (Hz) 1.60 1.00 0.948 0.941 0.932 0.925 Q 0.806 1.31 2.18 2.44 2.94 3.56 C1 ( F) 0.116 0.172 0.304 0.341 0.416 0.508 C2 ( F) 0.107 0.147 0.198 0.204 0.209 0.206 C3 ( F) 0.160 0.416 0.733 0.823 1.00 1.23 C4 ( F) 0.0616 0.0609 0.0385 0.0347 0.0290 0.0242 Specified values are for a –3 dB point of 1.0 Hz. For other frequencies, simply scale capacitors C1 through C4 directly; i.e., for 3 Hz Bessel response, C1 = 0.0387 µF, C2 = 0.0357 µF, C3 = 0.0533 µF, C4 = 0.0205 µF. REV. C –9– AD704 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Cerdip (Q) Package 14-Lead Plastic DIP (N) Package 16-Lead Plastic SO (R) Package 20-Terminal LCC (E) Package 0.100 (2.54) 0.064 (1.63) 0.358 (9.09) 0.342 (8.69) 0.040 (1.02) x 45 REF 3 PLCS 0.028 (0.71) 0.022 (0.56) NO. 1 PIN INDEX 0.050 (1.27) BSC 0.020 (0.51) x 45 REF Revision History Location 11/01 Data Sheet changed from REV. B to REV. C. Page Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Deleted METALIZATION PHOTOGRAPH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 –10– REV. C – 11– – 12– C00818–0–1/02(C) PRINTED IN U.S.A.