Very Low Distortion, Dual-Channel,
High Precision Difference Amplifier
AD8273
FEATURES
FUNCTIONAL BLOCK DIAGRAM
+VS
±4000 V HBM ESD
Very low distortion
0.00025% THD + N (20 kHz)
0.0015% THD + N (100 kHz)
Drives 600 Ω loads
Two gain settings
Gain of ½ (−6 dB)
Gain of 2 (+6 dB)
0.05% maximum gain error
10 ppm/°C maximum gain drift
Excellent ac specifications
20 V/μs minimum slew rate
800 ns to 0.01% settling time
High accuracy dc performance
77 dB minimum CMRR
700 μV maximum offset voltage
14-lead SOIC package
Supply current: 2.5 mA maximum per channel
Supply range: ±2.5 V to ±18 V
11
12kΩ
6kΩ
2
12
13
12kΩ
6kΩ
12kΩ
6kΩ
3
14
10
6
9
6kΩ
8
4
–VS
06981-001
12kΩ
5
Figure 1.
APPLICATIONS
ADC drivers
High performance audio
Instrumentation amplifier building blocks
Level translators
Automatic test equipment
Sine/cosine encoders
GENERAL DESCRIPTION
The AD8273 is a low distortion, dual-channel amplifier with
internal gain setting resistors. With no external components, it
can be configured as a high performance difference amplifier
(G = ½ or 2), inverting amplifier (G = ½ or 2), or noninverting
amplifier (G = 1½ or 3).
The AD8273 operates on both single and dual supplies and only
requires 2.5 mA maximum supply current for each amplifier. It
is specified over the industrial temperature range of −40°C to
+85°C and is fully RoHS compliant.
Table 1. Difference Amplifiers by Category
Low
Distortion
AD8270
AD8273
AD8274
AMP03
High
Voltage
AD628
AD629
Single-Supply
Unidirectional
AD8202
AD8203
Single-Supply
Bidirectional
AD8205
AD8206
AD8216
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2010 Analog Devices, Inc. All rights reserved.
AD8273
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................5
Applications....................................................................................... 1
Typical Performance Characteristics ..............................................6
Functional Block Diagram .............................................................. 1
Theory of Operation ...................................................................... 12
General Description ......................................................................... 1
Configurations............................................................................ 12
Revision History ............................................................................... 2
Power Supplies ............................................................................ 12
Specifications..................................................................................... 3
Outline Dimensions ....................................................................... 14
Absolute Maximum Ratings............................................................ 4
Ordering Guide .......................................................................... 14
Maximum Power Dissipation ..................................................... 4
ESD Caution.................................................................................. 4
REVISION HISTORY
8/10—Rev. A to Rev. B
Changes to Data Sheet Title ............................................................ 1
Changes to THD + Noise (THD + N) Parameter, Gain
Nonlinearity Parameter, and Offset vs. Power Supply Parameter,
Table 2 ................................................................................................ 3
Changed −12A Pin to −INA Pin, +12A Pin to +INA Pin, +12B
Pin to INB Pin, −12B Pin to −INB Pin, +6B Pin to REFB Pin,
−6B Pin to SENSEB Pin, −6A Pin to SENSEA Pin, and +6A Pin
to REFA Pin Throughout ................................................................ 5
Changes to Figure 3 and Table 4..................................................... 5
1/09—Rev. 0 to Rev. A
Changes to Product Title, Features Section, and Applications
Section................................................................................................ 1
Added Human Body Model (HBM) ESD Rating Parameter,
Table 3 ................................................................................................ 4
Changes to Figure 6 to Figure 9 ...................................................... 6
Changes to Figure 10 to Figure 12.................................................. 7
Changes to Figure 18........................................................................ 8
Deleted Figure 31; Renumbered Sequentially ............................ 10
Added Figure 31 to Figure 33; Renumbered Sequentially ........ 10
Added Figure 34 to Figure 36........................................................ 11
1/08—Revision 0: Initial Version
Rev. B | Page 2 of 16
AD8273
SPECIFICATIONS
VS = ±15 V, VREF = 0 V, TA = 25°C, G = ½, RL = 2 kΩ, unless otherwise noted.
Table 2.
Parameter
DYNAMIC PERFORMANCE
Bandwidth
Slew Rate
Settling Time to 0.1%
Settling Time to 0.01%
Channel Separation
NOISE/DISTORTION 1
THD + Noise (THD + N)
Noise Floor, RTO 2
Output Voltage Noise (Referred to Output)
GAIN
Gain Error
Gain Drift
Gain Nonlinearity
INPUT CHARACTERISTICS
Offset 3
vs. Temperature
vs. Power Supply
Common-Mode Rejection Ratio
Input Voltage Range 4
Impedance 5
Differential
Common Mode 6
OUTPUT CHARACTERISTICS
Output Swing
Short-Circuit Current Limit
Capacitive Load Drive
Conditions
Min
Typ
Max
20
20
10 V step on output, CL = 100 pF
10 V step on output, CL = 100 pF
f = 1 kHz
670
750
130
f = 1 kHz, VOUT = 10 V p-p, 600 Ω load
20 kHz BW
f = 20 Hz to 20 kHz
f = 1 kHz
0.00025
−106
3.5
26
−40°C to +85°C
VOUT = 10 V p-p, 600 Ω load
2
2
Referred to output
−40°C to +85°C
VS = ±2.5 V to ±18 V
VCM = ±40 V, RS = 0 Ω, referred to input
100
3
2
86
77
−3VS + 4.5
VCM = 0 V
750
800
0.05
10
%
ppm/°C
ppm
700
μV
μV/°C
μV/V
dB
V
5
+3VS − 4.5
−VS + 1.5
kΩ
kΩ
+VS − 1.5
V
mA
mA
pF
pF
2.5
mA
+85
°C
100
60
200
1200
POWER SUPPLY
Supply Current (per Amplifier)
TEMPERATURE RANGE
Specified Performance
−40
1
MHz
V/μs
ns
ns
dB
%
dBu
μV rms
nV/√Hz
36
9
Sourcing
Sinking
G=½
G=2
Unit
Includes amplifier voltage and current noise, as well as noise of internal resistors.
dBu = 20 log (V rms/0.7746).
3
Includes input bias and offset current errors.
4
May also be limited by absolute maximum input voltage or by the output swing. See the Absolute Maximum Ratings section and Figure 9 through Figure 12 for
details.
5
Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy.
6
Common mode is calculated looking into both inputs. Common-mode impedance looking into only one input is 18 kΩ.
2
Rev. B | Page 3 of 16
AD8273
ABSOLUTE MAXIMUM RATINGS
MAXIMUM POWER DISSIPATION
Parameter
Supply Voltage
Output Short-Circuit Current
Voltage at Any Input Pin
Differential Input Voltage
Current into Any Input Pin
Human Body Model (HBM) ESD Rating
Storage Temperature Range
Specified Temperature Range
Thermal Resistance
θJA
θJC
Package Glass Transition Temperature (TG)
Rating
±18 V
Observe
derating curve
40 V
40 V
3 mA
±4000 V
−65°C to +130°C
−40°C to +85°C
105°C/W
36°C/W
150°C
The maximum safe power dissipation for the AD8273 is limited
by the associated rise in junction temperature (TJ) on the die. At
approximately 150°C, which is the glass transition temperature,
the plastic changes its properties. Even temporarily exceeding
this temperature limit may change the stresses that the package
exerts on the die, permanently shifting the parametric performance
of the amplifiers. Exceeding a temperature of 150°C for an
extended period can result in a loss of functionality.
The AD8273 has built-in, short-circuit protection that limits the
output current to approximately 100 mA (see Figure 2 for more
information). While the short-circuit condition itself does not
damage the part, the heat generated by the condition can cause
the part to exceed its maximum junction temperature, with
corresponding negative effects on reliability.
2.0
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION (W)
TJ MAX = 150°C
θJA = 105°C/W
1.6
1.2
0.8
0.4
0
–50
–25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Rev. B | Page 4 of 16
06981-043
Table 3.
AD8273
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC 1
14
REFA
–INA 2
13
OUTA
12
SENSEA
+INA 3
AD8273
TOP VIEW
11 +VS
(Not to Scale)
10 SENSEB
+INB 5
–INB 6
9
OUTB
NC 7
8
REFB
NC = NO CONNECT
06981-020
–VS 4
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 7
2
3
4
5
6
8
9
10
11
12
13
14
Mnemonic
NC
−INA
+INA
−VS
+INB
−INB
REFB
OUTB
SENSEB
+VS
SENSEA
OUTA
REFA
Description
No Connect.
The 12 kΩ resistor connects to the negative terminal of Op Amp A.
The 12 kΩ resistor connects to the positive terminal of Op Amp A.
Negative Supply.
The 12 kΩ resistor connects to the positive terminal of Op Amp B.
The 12 kΩ resistor connects to the negative terminal of Op Amp B.
The 6 kΩ resistor connects to the positive terminal of Op Amp B.
Op Amp B Output.
The 6 kΩ resistor connects to the negative terminal of Op Amp B.
Positive Supply.
The 6 kΩ resistor connects to the negative terminal of Op Amp A.
Op Amp A Output.
The 6 kΩ resistor connects to the positive terminal of Op Amp A.
Rev. B | Page 5 of 16
AD8273
TYPICAL PERFORMANCE CHARACTERISTICS
VS = ±15 V, TA = 25°C, G = ½, difference amplifier configuration, unless otherwise noted.
400
N: 1641
MEAN: –9.5
SD: 228.4
100
300
+2.9µV/°C
SYSTEM OFFSET (μV)
HITS
80
60
40
200
100
0
–100
–1.7µV/°C
20
0
–500
–250
0
250
500
REPRESENTATIVE SAMPLES
–300
–50 –30 –10
10
30
VOSO ±15V (µV/V)
50
70
90
110
130
TEMPERATURE (°C)
Figure 4. Typical Distribution of System Offset Voltage,
G = ½, Referred to Output
06981-030
06981-036
–200
Figure 7. System Offset vs. Temperature, Normalized at 25°C,
Referred to Output
150
100
GAIN ERROR (µV/V)
100
60
40
20
0
–50
–100
–150
–100
–50
0
50
100
150
CMRR ±15V (µV/V)
REPRESENTATIVE SAMPLES
–200
–45 –30 –15 0
15 30 45
06981-028
0
–150
60
75
90
105 120
TEMPERATURE (°C)
Figure 5. Typical Distribution of CMRR, G = ½, Referred to Input
Figure 8. Gain Error vs. Temperature, Normalized at 25°C
30
20
G=½
0V, +25V
10
INPUT COMMON-MODE VOLTAGE (V)
15
+0.09µV/V/°C
15
10
5
–0.05µV/V/°C
0
–5
–10
20
VS = ±15V
10
–13.5V, +11.5V
+13.5V, +11.5V
–13.5V, –11.5V
+13.5V, –11.5V
0
–10
–20
–15
REPRESENTATIVE SAMPLES
–20
–50 –30 –10
10
30
0V, –25V
50
70
90
110
TEMPERATURE (°C)
130
–30
–15
06981-029
CMRR (µV/V)
06981-031
HITS
80
50
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
Figure 6. CMRR vs. Temperature, Normalized at 25°C
Figure 9. Input Common-Mode Voltage vs. Output Voltage,
Gain = ½, ±15 V Supplies
Rev. B | Page 6 of 16
06981-053
120
N: 1649
MEAN: –0.59
SD: 37.3
AD8273
20
140
G=½
15
POSITIVE PSRR
POWER SUPPLY REJECTION (dB)
VS = ±5V
+3.5V, +8.8V
10
VS = ±2.5V
–1.0V, +6.2V
5
+1.0V, +4.2V
0
–1.0V, –4.0V
–5
+1.0, –6.0V
–10
–20–4
–3.5V, –8.7V
–3
100
NEGATIVE PSRR
80
60
40
20
+3.5V, –15.5V
–2
–1
0
1
2
3
4
OUTPUT VOLTAGE (V)
0
1
10
100
1k
10k
100k
25
32
G=2
±15V SUPPLY
MAXIMUM OUTPUT VOLTAGE (V p-p)
20
VS = ±15V
15
10
+13.5V, +11.5V
–13.5V, +11.5V
5
0
–5
+13.5V, –11.5V
–13.5V, –11.5V
–10
–15
–20
28
24
20
16
12
±5V SUPPLY
8
4
06981-006
0V, +20.85V
0V, –20.85V
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
0
100
06981-045
–25
–15
8
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 14. Maximum Output Voltage vs. Frequency
Figure 11. Input Common-Mode Voltage vs. Output Voltage,
Gain = 2, ±15 V Supplies
10
–3.5V, +6.9V
G=2
VS = ±5V
G=2
+3.5V, +5.2V
6
5
4
–1.0V, +2.7V
VS = ±2.5V
0
+1.0V, +2.2V
GAIN (dB)
2
0
–1.0V, –2.0V
–2
+1.0, –2.6V
G=½
–5
–10
–4
–3.5V, –5.2V
+3.5V, –6.9V
–8–4
06981-007
–15
–6
–3
–2
–1
0
1
2
3
OUTPUT VOLTAGE (V)
4
06981-046
INPUT COMMON-MODE VOLTAGE (V)
1M
FREQUENCY (Hz)
Figure 13. Power Supply Rejection vs. Frequency, G = ½, Referred to Output
Figure 10. Input Common-Mode Voltage vs. Output Voltage,
Gain = ½, ±5 V and ±2.5 V Supplies
INPUT COMMON-MODE VOLTAGE (V)
120
06981-021
–15
06981-044
INPUT COMMON-MODE VOLTAGE (V)
–3.5V, +15.8V
–20
100
1k
10k
100k
1M
FREQUENCY(Hz)
Figure 15. Gain vs. Frequency
Figure 12. Input Common-Mode Voltage vs. Output Voltage,
Gain = 2, ±5 V and ±2.5 V Supplies
Rev. B | Page 7 of 16
10M
100M
AD8273
+VS
–40°C
+25°C
+VS – 3
OUTPUT VOLTAGE (V)
GAIN = ½
80
+125°C
+VS – 6
–VS + 6
+125°C
+85°C
60
+25°C
–VS + 3
40
100
1k
10k
100k
1M
FREQUENCY (Hz)
+85°C
–40°C
–VS
0
20
40
60
80
100
CURRENT (mA)
Figure 19. Output Voltage vs. IOUT
Figure 16. Common-Mode Rejection vs. Frequency, Referred to Input
120
ISHORT+
100
CLOAD = 100pF
80
40
20
50mV/DIV
CURRENT (mA)
60
0
–20
–40
NO LOAD
600Ω
ISHORT–
–60
2kΩ
–120
–40
–20
0
20
40
60
80
100
120
1µs/DIV
06981-024
06981-008
–80
–100
TEMPERATURE (°C)
Figure 17. Short-Circuit Current vs. Temperature
+VS
+85°C
+125°C
+VS – 2
CLOAD = 100pF
+25°C
–40°C
50mV/DIV
+VS – 4
0
–VS + 4
NO LOAD
+125°C
600Ω
2kΩ
–40°C +25°C
+85°C
–VS
200
1k
RLOAD (Ω)
10k
1µs/DIV
Figure 18. Output Voltage Swing vs. RLOAD, VS = ±15 V
Figure 21. Small Signal Step Response, Gain = ½
Rev. B | Page 8 of 16
06981-025
–VS + 2
06981-009
OUTPUT VOLTAGE SWING (V)
Figure 20. Small Signal Step Response, Gain = 2
06981-023
GAIN = 2
100
06981-022
COMMON-MODE REJECTION (dB)
120
AD8273
100
90
80
2.5V
5V
50mV/DIV
OVERSHOOT (%)
70
15V
60
18V
50
40
30
20
1µs/DIV
0
0
20
40
60
80
100
120
140
160
180
200
CAPACITANCE (pF)
Figure 22. Small Signal Pulse Response with 500 pF Capacitor Load, Gain = 2
06981-038
06981-026
10
Figure 25. Small Signal Overshoot vs. Capacitive Load,
G = ½, 600 Ω in Parallel with Capacitive Load
100
90
80
50mV/DIV
OVERSHOOT (%)
70
2.5V
60
15V
5V
50
18V
40
30
20
1µs/DIV
0
0
200
400
600
800
1000
1200
CAPACITANCE (pF)
Figure 23. Small Signal Pulse Response for 100 pF Capacitive Load,
Gain = ½
Figure 26. Small Signal Overshoot vs. Capacitive Load,
G = 2, No Resistive Load
100
100
90
2.5V
80
80
5V
70
70
OVERSHOOT (%)
15V
60
18V
50
40
2.5V
60
50
40
18V
30
30
20
20
10
10
0
20
40
60
80
100
120
140
160
180
200
CAPACITANCE (pF)
0
06981-037
0
5V 15V
0
200
400
600
800
1000
CAPACITANCE (pF)
Figure 27. Small Signal Overshoot vs. Capacitive Load,
G = 2, 600 Ω in Parallel with Capacitive Load
Figure 24. Small Signal Overshoot vs. Capacitive Load, G = ½,
No Resistive Load
Rev. B | Page 9 of 16
1200
06981-040
90
OVERSHOOT (%)
06981-039
06981-027
10
AD8273
0.1
22kHz FILTER
VOUT = 10V p-p
RL = 600Ω
2V/DIV
THDN + N (%)
0.01
0.001
GAIN = 2
1µs/DIV
100
1k
FREQUENCY (Hz)
100k
10k
06981-047
06981-032
GAIN = ½
0.0001
10
Figure 31. THD + N vs. Frequency, Filter = 22 kHz
Figure 28. Large Signal Pulse Response, Gain = ½
0.1
VOUT = 10V p-p
2V/DIV
THD + N (%)
0.01
0.001
GAIN = 2
1µs/DIV
0.0001
10
Figure 29. Large Signal Pulse Response, Gain = 2
1k
FREQUENCY (Hz)
100k
10k
Figure 32. THD + N vs. Frequency, Filter = 120 kHz
40
1
GAIN = ½
f = 1kHz
35
30
0.1
25
–SR
15
10
RL = 600Ω
0.001
5
0
–40
RL = 2kΩ, 100Ω
0.01
–20
0
20
40
60
80
100
0.0001
120
TEMPERATURE (°C)
Figure 30. Slew Rate vs. Temperature
0
5
10
15
OUTPUT AMPLITUDE (dBu)
20
Figure 33. THD + N vs. Output Amplitude, G = ½
Rev. B | Page 10 of 16
25
06981-049
THD + N (%)
+SR
20
06981-010
SLEW RATE (V/µS)
100
06981-048
06981-033
GAIN = ½
AD8273
10000
1
VOLTAGE NOISE DENSITY (nV/√Hz)
GAIN = 2
f = 1kHz
0.01
RL = 600Ω
RL = 2kΩ
RL = 100kΩ
0.001
0
5
10
15
OUTPUT AMPLITUDE (dBu)
20
25
GAIN = 2
100
GAIN = ½
10
06981-050
0.0001
1000
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 37. Voltage Noise Density vs. Frequency, Referred to Output
Figure 34. THD + N vs. Output Amplitude, G = 2
0.1
G=2
0.01
1µV/DIV
0.001
G=½
THIRD HARMONIC ALL LOADS
0.0001
SECOND HARMONIC R L = 600Ω
0.00001
10
100
1k
FREQUENCY (Hz)
10k
100k
06981-051
SECOND HARMONIC R L = 100kΩ, 2kΩ
Figure 38. 0.1 Hz to 10 Hz Voltage Noise, RTO
Figure 35. Harmonic Distortion Products vs. Frequency, G = ½
0.1
0.01
0.001
THIRD HARMONIC ALL LOADS
SECOND HARMONIC R L = 600Ω
SECOND HARMONIC R L = 100kΩ, 2kΩ
0.00001
10
100
1k
FREQUENCY (Hz)
10k
100k
06981-052
AMPLITUDE (% OF FUNDAMENTAL)
GAIN = 2
VOUT = 10V p-p
0.0001
1s/DIV
Figure 36. Harmonic Distortion Products vs. Frequency, G = 2
Rev. B | Page 11 of 16
06981–035
AMPLITUDE (% OF FUNDAMENTAL)
GAIN = ½
VOUT = 10V p-p
06981-034
THD + N (%)
0.1
AD8273
THEORY OF OPERATION
The resistors on the AD8273 are laser trimmed and tightly
matched. Specifications that depend on the resistor matching,
such as gain drift, common-mode rejection, and gain accuracy,
are better than can be achieved with standard discrete resistors.
The positive and negative input terminals of the AD8273 op amp
are not pinned out intentionally. Keeping these nodes internal
means their capacitance is considerably lower than it would be
in discrete designs. Lower capacitance at these nodes means
better loop stability and improved common-mode rejection vs.
frequency.
–IN1
12
6kΩ
12kΩ
2
OUT1
13
+IN1
–IN2
14
6kΩ
12kΩ
3
10
6kΩ
12kΩ
6
9
+IN2
8
6kΩ
12kΩ
OUT2
5
06981-016
The AD8273 has two channels, each consisting of a high
precision, low distortion op amp and four trimmed resistors.
Although such a circuit can be built discretely, placing the
resistors on the chip offers advantages to board designers that
include better dc specifications, better ac specification, and
lower production costs.
VOUT = 2 (VIN+ − VIN−)
Figure 40. Difference Amplifier, G = 2
IN1
The internal resistors of the AD8273 lower production costs.
One part rather than several is placed on the board, which
improves both board build time and reliability.
2 12kΩ
6kΩ
12
13
14
OUT1
6kΩ
3 12kΩ
CONFIGURATIONS
The AD8273 can be configured in several different ways; see
Figure 39 to Figure 46. Because these configurations rely on the
internal, matched resistors, these configurations have excellent
gain accuracy and gain drift.
IN2
6 12kΩ
6kΩ
10
9
8
OUT2
6kΩ
5 12kΩ
Use a stable dc voltage to power the AD8273. Noise on the
supply pins can adversely affect performance. Place a bypass
capacitor of 0.1 μF between each supply pin and ground, as
close to each pin as possible. Also, use a tantalum capacitor of
10 μF between each supply and ground. It can be farther away
from the AD8273 and typically can be shared by other precision
integrated circuits.
The AD8273 is specified at ±15 V, but it can be used with
unbalanced supplies as well, for example, −VS = 0 V, +VS = 20 V.
The difference between the two supplies must be kept below 36 V.
06981-013
POWER SUPPLIES
VOUT = −½ VIN
Figure 41. Inverting Amplifier, G = ½
IN1
12
6kΩ
12kΩ
2
OUT1
13
3 12kΩ
IN2
14
6kΩ
10
6kΩ
12kΩ
6
9
OUT2
5 12kΩ
2 12kΩ
6kΩ
12
8
13
6kΩ
OUT1
VOUT = −2 VIN
–IN2
6kΩ
14
6 12kΩ
6kΩ
10
9
+IN2
5 12kΩ
VOUT = ½ (VIN+ − VIN−)
6kΩ
Figure 42. Inverting Amplifier, G = 2
OUT2
8
06981-012
+IN1
3 12kΩ
Figure 39. Difference Amplifier, G = ½
Rev. B | Page 12 of 16
06981-017
–IN1
AD8273
2 12kΩ
6kΩ
2 12kΩ
12
13
OUT1
3 12kΩ
6kΩ
14
6 12kΩ
6kΩ
10
IN1
3 12kΩ
6 12kΩ
6kΩ
8
8
VOUT = ½ VIN
6kΩ
12kΩ
5 12kΩ
VOUT = 1½ VIN
Figure 45. Noninverting Amplifier, G = 1.5
Figure 43. Noninverting Amplifier, G = ½
12
OUT2
6kΩ
06981-014
IN2
06981-015
IN2
10
9
9
6kΩ
OUT1
6kΩ
OUT2
5 12kΩ
12
13
14
IN1
6kΩ
2
12
6kΩ
12kΩ
2
OUT1
OUT1
13
13
3 12kΩ
IN1
14
6kΩ
12kΩ
3
10
6kΩ
12kΩ
6
IN1
14
6kΩ
10
6kΩ
12kΩ
6
OUT2
9
9
OUT2
5 12kΩ
6kΩ
VOUT = 2 VIN
12kΩ
IN2
5
8
VOUT = 3 VIN
Figure 44. Noninverting Amplifier, G = 2
6kΩ
06981-018
8
06981-019
IN2
Figure 46. Noninverting Amplifier, G = 3
Rev. B | Page 13 of 16
AD8273
OUTLINE DIMENSIONS
8.75 (0.3445)
8.55 (0.3366)
8
14
1
7
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0039)
COPLANARITY
0.10
0.51 (0.0201)
0.31 (0.0122)
6.20 (0.2441)
5.80 (0.2283)
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
SEATING
PLANE
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
060606-A
4.00 (0.1575)
3.80 (0.1496)
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model 1
AD8273ARZ
AD8273ARZ-R7
AD8273ARZ-RL
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
14-Lead SOIC_N
14-Lead SOIC_N, 7" Tape and Reel
14-Lead SOIC_N, 13" Tape and Reel
Z = RoHS Compliant Part.
Rev. B | Page 14 of 16
Package Option
R-14
R-14
R-14
AD8273
NOTES
Rev. B | Page 15 of 16
AD8273
NOTES
©2008–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06981-0-8/10(B)
Rev. B | Page 16 of 16
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