Low Power, Rail-to-Rail Output Precision JFET Amplifier AD8641/AD8642/AD8643
FEATURES
Low supply current: 250 µA max Very low input bias current: 1 pA max Low offset voltage: 750 µV max Single-supply operation: 5 V to 26 V Dual-supply operation: ±2.5 V to ±13 V Rail-to-rail output Unity-gain stable No phase reversal SC70 package
PIN CONFIGURATIONS
OUT 1
5
VCC
AD8641
VEE 2
+IN 3
4
–IN
Figure 1. 5-Lead SC70 (KS-5)
NC 1 –IN 2 +IN 3 VEE 4
8
NC VCC OUT
05072-102
05072-104
AD8641
TOP VIEW (Not to Scale)
7 6 5
NC
APPLICATIONS
Line-/battery-powered instruments Photodiode amplifiers Precision current sensing Medical instrumentation Industrial controls Precision filters Portable audio ATE
NC = NO CONNECT
Figure 2. 8-Lead SOIC (R-8)
OUT A 1 –IN A 2 +IN A 3 V– 4
8
V+ OUT B
05072-105
05072-103
05072-064
AD8642
TOP VIEW (Not to Scale)
7 6 5
–IN B +IN B
Figure 3. 8-Lead SOIC (R-8)
OUT A 1 –IN A 2
8
V+ OUT B –IN B +IN B
AD8642
TOP VIEW (Not to Scale)
7 6 5
GENERAL DESCRIPTION
The AD8641/AD8642/AD8643 are low power, precision JFET input amplifiers featuring extremely low input bias current and rail-to-rail output. The ability to swing nearly rail-to-rail at the input and rail-to-rail at the output enables designers to buffer CMOS DACs, ASICs, and other wide output swing devices in single-supply systems. The outputs remain stable with capacitive loads of more than 500 pF. The AD8641/AD8642/AD8643 are suitable for applications utilizing multichannel boards that require low power to manage heat. Other applications include photodiodes, ATE reference level drivers, batter y management, and industrial controls. The AD8641/AD8642/AD8643 are fully specified over the extended industrial temperature range of –40°C to +125°C. The AD8641 is available in 5-lead SC70 and 8-lead SOIC lead-free packages. The AD8642 is available in 8-lead MSOP and 8-lead SOIC lead-free packages. The AD8643 is available in 14-lead SOIC and 16-lead, 3 mm × 3 mm, LFCSP lead-free packages.
+IN A 3 V– 4
Figure 4. 8-Lead MSOP (RM-8)
OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 –IN B 6 OUT B 7
14 13
OUT D –IN D +IN D
AD8643
12
TOP VIEW 11 V– (Not to Scale) 10 +IN C
9 8
–IN C OUT C
Figure 5. 14-Lead SOIC (R-14)
OUT A OUT D 13 NC NC
16
15
14
–IN A 1 +IN A 2 V+ 3 +IN B 4
PIN 1 INDICATOR
12 11 10 9
–IN D +IN D V– +IN C
AD8643
TOP VIEW
–IN B 5
OUT B 6 OUT C 7
NC = NO CONNECT
Figure 6. 16-Lead LFCSP (CP-16) (Not Drawn to Scale)
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2005 Analog Devices, Inc. All rights reserved.
–IN C 8
05072-101
TOP VIEW (Not to Scale)
AD8641/AD8642/AD8643 TABLE OF CONTENTS
Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Typical Performance Characteristics ............................................. 6 Outline Dimensions ....................................................................... 13 Ordering Guide........................................................................... 14
REVISION HISTORY
4/05—Rev. A to Rev. B Added AD8643 ...................................................................Universal Added 14-Lead SOIC .........................................................Universal Added 16-Lead LFCSP.......................................................Universal Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 14 3/05—Rev. 0 to Rev. A Added AD8642 ...................................................................Universal Changes to General Description .................................................... 1 Added Figure 3 and Figure 4........................................................... 1 Changes to Specifications ................................................................ 3 Changes to Absolute Maximum Ratings ....................................... 5 Changes to Figure 22........................................................................ 8 Changes to Figure 23........................................................................ 9 Changes to Figure 41...................................................................... 12 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 14 10/04—Initial Version: Revision 0
Rev. B | Page 2 of 16
AD8641/AD8642/AD8643 SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
@ VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted. Table 1.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS AD8643 LFCSP only –40°C < TA < +85°C +85°C < TA < +125°C, VCM = 1.5 V Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density IB –40°C < TA < +125°C IOS –40°C < TA < +125°C CMRR AVO ∆VOS/∆T VOH IL = 1 mA, –40°C to +125°C VOL IL = 1 mA, –40°C to +125°C IOUT PSRR ISY VS = 5 V to 26 V –40°C < TA < +125°C SR GBP Øm eN p-p eN iN f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 2 3 2.5 50 4.0 28.5 0.5 90 0.01 ±6 107 195 VCM = 0 V to 2.5 V RL = 10 kΩ, VO = 0.5 to 4.5 V –40°C < TA < +125°C 0 74 80 93 140 2.5 0.25 Conditions Min Typ 50 Max 750 1 1.5 1.6 1 180 0.5 60 3 Unit µV mV mV mV pA pA pA pA V dB V/mV µV/°C V V V V mA dB µA µA V/µs MHz MHz Degrees µV p-p nV/√Hz fA/√Hz
4.95 4.94 0.05 0.05
250 270
AD8641, AD8642 AD8643
Rev. B | Page 3 of 16
AD8641/AD8642/AD8643
@ VS= ±13 V, VCM = 0 V, TA =25°C, unless otherwise noted. Table 2.
Parameter INPUT CHARACTERISTICS Offset Voltage Symbol VOS AD8643 LFCSP only –40° < TA < +125°C Input Bias Current Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Offset Voltage Drift OUTPUT CHARACTERISTICS Output Voltage High Output Voltage Low Output Current POWER SUPPLY Power Supply Rejection Ratio Supply Current/Amplifier DYNAMIC PERFORMANCE Slew Rate Gain Bandwidth Product Phase Margin NOISE PERFORMANCE Voltage Noise Voltage Noise Density Current Noise Density IB –40°C < TA < +125°C IOS –40°C < TA < +125°C CMRR AVO ∆VOS/∆T VOH IL = 1 mA, –40°C to +125°C VOL IL = 1 mA, –40°C to +125°C IOUT PSRR ISY VS = ±2.5 V to ±13 V –40°C < TA < +125°C SR GBP Øm eN p-p eN iN f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz 3 3.5 60 4.2 27.5 0.5 90 ±12 107 200 VCM = −13 V to +10 V RL = 10 kΩ, VO = –11 V to +11 V –40°C < TA < +125°C –13 90 215 107 290 2.5 0.25 Conditions Min Typ 70 Max 750 1 1.5 1 260 0.5 65 +10 Unit µV mV mV pA pA pA pA V dB V/mV µV/°C V V V V mA dB µA µA V/µs MHz Degrees µV p-p nV/√Hz fA/√Hz
+12.95 +12.94 –12.95 –12.94
290 330
Rev. B | Page 4 of 16
AD8641/AD8642/AD8643 ABSOLUTE MAXIMUM RATINGS
Table 3.1
Parameter Supply Voltage Input Voltage Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range KS-5, R-8, RM-8, R-14, CP-16 Packages Operating Temperature Range Junction Temperature Range KS-5, R-8, RM-8, R-14, CP-16 Packages Lead Temperature Range (Soldering, 60 sec) Rating 27.3 V VS– to VS+ ±Supply Voltage Indefinite –65°C to +150°C –40°C to +125°C –65°C to +150°C 300°C
Table 4.
Package Type 5-Lead SC70 (KS) 8-Lead SOIC (R) 8-Lead MSOP (RM) 14-Lead SOIC (R) 16-Lead LFCSP (CP)
1 2
θJA2 331.4 157 206 120 44
θJC 223.9 56 44 36 31.5
Unit °C/W °C/W °C/W °C/W °C/W
Absolute maximum ratings apply at 25°C, unless otherwise noted. θJA is specified for the worst-case conditions, that is, θJA is specified for devices soldered on circuit boards for surface-mounted packages.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only ; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. B | Page 5 of 16
AD8641/AD8642/AD8643 TYPICAL PERFORMANCE CHARACTERISTICS
80
20
VSY = ±13V
70
18 16
VSY = 5V VCM = 1.5V
NUMBER OF AMPLIFIERS
60
14 12 10 8 6 4
FREQUENCY
50 40 30 20 10 0
2
05072-002 05072-005
05072-007
05072-006
–0.60 –0.55 –0.50 –0.45 –0.40 –0.35 –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60
0
0
VOS (mV)
TCVOS (µV/°C)
Figure 7. Input Offset Voltage
Figure 10. Offset Voltage Drift
16
4.5
VSY = ±13V
14
4.0 3.5
VSY = ±13V TA = 25°C
NUMBER OF AMPLIFIERS
12
3.0
10 8 6 4
INPUT BIAS (pA)
2.5 2.0 1.5 1.0 0.5
2 0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5
0
05072-003
–0.5
–15 –13 –11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15
OFFSET VOLTAGE (µV/°C)
10.0
VCM (V)
Figure 8. Offset Voltage Drift
Figure 11. Input Bias Current vs. VCM
70
0.5
VSY = ±2.5V
60
0.4 0.3
VSY = ±13V TA = 25°C
50
0.2
INPUT BIAS (pA)
FREQUENCY
40
0.1
0 –0.1 –0.2 –0.3
30
20
10
–0.4
05072-004
–0.60 –0.55 –0.50 –0.45 –0.40 –0.35 –0.30 –0.25 –0.20 –0.15 –0.10 –0.05 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60
0
–0.5
–15.0 –12.5 –10.0 –7.5 –5.0 –2.5 0 2.5 5.0 7.5 10.0 12.5 15.0
VOS (mV)
VCM (V)
Figure 9. Input Offset Voltage
Figure 12. Input Bias Current vs. VCM
Rev. B | Page 6 of 16
10.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
AD8641/AD8642/AD8643
1000
500
VSY = ±13V
VSY = 5V
400 300
INPUT BIAS CURRENT (pA)
100
200
10
VOS (µV)
05072-008
100 0 –100 –200
1
–300 –400
0
25
50
75
100
125
150
0
0.5
1.0
1.5 VCM (V)
2.0
2.5
TEMPERATURE (°C)
Figure 13. Input Bias Current vs. Temperature
Figure 16. Input Offset Voltage vs. VCM
1.0 0.8 0.6 0.4
10M
VSY = +5V OR ±5V
OPEN-LOOP GAIN (V/V)
INPUT BIAS (pA)
1M VSY = ±13V
0.2 0 –0.2 –0.4 –0.6 –0.8
05072-009
100k
VSY = ±2.5V
–5
–4
–3
–2
–1
0 VCM (V)
1
2
3
4
5
1
10
100
LOAD RESISTANCE (kΩ)
Figure 14. Input Bias Current vs. VCM
Figure 17. Open-Loop Gain vs. Load Resistance
1000 900 800 700 600
VSY = ±13V
1000 A B C 100 D E
500 400 300 200 100 0
05072-010
AVO (V/mV)
VOS (µV)
10 A. VSY = ±13V, VO = ±11V, RL = 10kΩ B. VSY = ±13V, VO = ±11V, RL = 2kΩ C. VSY = +5V, VO = +0.5V/+4.5V, RL = 10kΩ D. VSY = +5V, VO = +0.5V/+4.5V, RL = 2kΩ E. VSY = +5V, VO = +0.5V/+4.5V, RL = 600Ω
–9 –7 –5 –3 –1 0 1 3 5 7 9 11 13 15
–15 –13 –11
–30
–10
10
30
50
70
90
110
130
150
VCM (V)
TEMPERATURE (°C)
Figure 15. Input Offset Voltage vs. VCM
Figure 18. Open-Loop Gain vs. Temperature
Rev. B | Page 7 of 16
05072-013
–100
1 –50
05072-012
–1.0
10k 0.1
05072-011
0.1
–500
AD8641/AD8642/AD8643
600 500 400
10000
VSY = ±13V
SATURATION VOLTAGE (mV)
VSY = ±13V VSY – VOH
1000
OFFSET VOLTAGE (µV)
300 200 100 0 –100 –200 –300 –400 –500
05072-014
100kΩ
100 –VSY – VOL
10kΩ 1kΩ
10
–10
–5
0
5
10
15
0.01
0.1
1
10
100
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
Figure 19. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 22. Output Saturation Voltage vs. Load Current
250 200 150 100 RL = 1kΩ RL = 2kΩ RL = 10kΩ RL = 100kΩ
10000
VSY = ±5V
POS RAIL
VSY = 5V VSY – VOH
SATURATION VOLTAGE (mV)
1000 VOL 100
INPUT VOLTAGE (µV)
50 0 –50 –100 –150 –200 –250 –300 –350 0 50
10
RL = 100kΩ RL = 1kΩ RL = 10kΩ NEG RAIL RL = 2kΩ
05072-015
100
150
200
250
300
350
0.01
0.1
1
10
100
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
LOAD CURRENT (mA)
Figure 20. Input Error Voltage vs. Output Voltage Within 300 mV of Supply Rails
800 700 600 500 400 300 200 –55°C 100 0 4 8 12 16 VSY (V) 20 24 28
–10 –20
05072-016
Figure 23. Output Saturation Voltage vs. Load Current
70 60 50 40 GAIN VSY = ±13V RL = 2kΩ CL = 40pF
315 270 225
GAIN (dB)
ISY (µA)
30 20 10 0 PHASE
135 90 45 0 –45 –90 –135 100k 1M FREQUENCY (Hz) 10M
+25°C +125°C
PHASE (Degrees)
05072-019
180
–30 10k
Figure 21. Quiescent Current vs. Supply Voltage at Different Temperatures
Figure 24. Open-Loop Gain and Phase Margin vs. Frequency
Rev. B | Page 8 of 16
05072-018
1 0.001
05072-017
–600 –15
1 0.001
AD8641/AD8642/AD8643
70 60 50 40
GAIN (dB)
315 VSY = 5V RL = 2kΩ CL = 40pF 270 225
PHASE (Degrees)
140 120 100 80 VSY = ±13V
180 GAIN 135 90 PHASE 45 0 –45 –90 –135 100k 1M FREQUENCY (Hz) 10M
20 10 0 –10 –20 –30 10k
CMRR (dB)
05072-020
30
60 40 20 0 –20 –40 10k 100k FREQUENCY (Hz) 1M 10M
05072-023 05072-025 05072-024
–60 1k
Figure 25. Open-Loop Gain and Phase Margin vs. Frequency
Figure 28. CMRR vs. Frequency
70 60 50 40 G = +100 VSY = ±13V RL = 2kΩ CL = 40pF
140 120 100 80 VSY = 5V
GAIN (dB)
30 20 G = +10 10 0 G = +1 –10 –20
05072-021
CMRR (dB)
60 40 20 0 –20 –40
–30 1k
10k
100k FREQUENCY (Hz)
1M
10M
–60 1k
10k
100k FREQUENCY (Hz)
1M
10M
Figure 26. Closed-Loop Gain vs. Frequency
Figure 29. CMRR vs. Frequency
70 60 50 40 G = +100 VSY = 5V RL = 2kΩ CL = 40pF
140 120 100 80
VSY = ±13V
+PSRR
20 G = +10 10 0 G = +1 –10 –20 10k 100k FREQUENCY (Hz) 1M 10M
05072-022
PSRR (dB)
GAIN (dB)
30
60 40 20 0 –20 –40 –60 1k 10k 100k FREQUENCY (Hz) 1M 10M –PSRR
–30 1k
Figure 27. Closed-Loop Gain vs. Frequency
Figure 30. PSRR vs. Frequency
Rev. B | Page 9 of 16
AD8641/AD8642/AD8643
140 120 100 +PSRR 80 VSY = 5V 1.0 0.8 0.6
1 T
VSY = ±13V
0.4
VIN
PSRR (dB)
60 40 20 0 –20 –40
05072-026
INPUT BIAS (pA)
0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 CH1 –4 10.0V –3 CH2 –2 10.0V–1 –5
2
–PSRR
VOUT
05072-029
10k
100k FREQUENCY (Hz)
1M
10M
M400µ1 s C 0 2 A 3 H1 4 1.00V 5 T 0.00000s VCM (V)
Figure 31. PSRR vs. Frequency
Figure 34. No Phase Reversal
1000
15
VSY = ±13V
G = +100 100
VS = ±13V GAIN = +5 10 TS + (1%)
OUTPUT SWING (V)
5
TS + (0.1%)
ZOUT (Ω)
10 G = +10 1 G = +1 0.1
0
–5 TS – (0.1%) –10 TS – (1%)
05072-027
10k
100k
1M
10M
100M
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
FREQUENCY (Hz)
SETTLING TIME (µs)
Figure 32. Output Impedance vs. Frequency
Figure 35. Output Swing and Error vs. Settling Time
1000
70
VSY = 5V
G = +100 100 50 10 G = +10 1 60
VS = ±13V RL = 10kΩ VIN = 100mV p-p AV = +1
OVERSHOOT (%)
ZOUT (Ω)
40 OS– OS+ 20
30
G = +1
0.1 10 0.01 1k
05072-028
10k
100k
1M
10M
100M
1
10
100
1000
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 33. Output Impedance vs. Frequency
Figure 36. Small Signal Overshoot vs. Load Capacitance
Rev. B | Page 10 of 16
05072-031
0
05072-030
0.01 1k
–15
05072-009
–60 1k
AD8641/AD8642/AD8643
70 VS = ±2.5V RL = 10kΩ VIN = 100mV p-p AV = +1 1k
VSY = ±13V
50
VOLTAGE NOISE DENSITY (nV/ Hz)
60
OVERSHOOT (%)
100
40
OS–
30 OS+
10
20 10
1
10
100
1000
10
100 FREQUENCY (Hz)
1k
10k
CAPACITANCE (pF)
Figure 37. Small Signal Overshoot vs. Load Capacitance
Figure 40. Voltage Noise Density
1.0 0.8 0.6 0.4
1k
VOLTAGE NOISE DENSITY (nV/ Hz)
VS = ±13V G = +1M CH1 p-p = 4.26V
VSY = 5V
INPUT BIAS (pA)
100
0.2
1 0
–0.2 –0.4 –0.6 –0.8 –1.0 1.00V –3 –CH1 –4 5 –2 –1 M1.00s 0 1 VCM (V) 2 A CH1 3 – 4 20.0V 5
05072-033
10
05072-009
10
100 FREQUENCY (Hz)
1k
10k
Figure 38. 0.1 Hz to 10 Hz Noise
Figure 41. Voltage Noise Density
1.0 0.8 0.6
0.004
VS = ±2.5V G = +1M CH1 p-p = 4.06V
0.001
VSY = ±13V LOAD = 100kΩ GAIN = +1
8V p-p INPUT
INPUT BIAS (pA)
0.2
1 0
THD + NOISE (%)
0.4
1V p-p INPUT
0.0001
2V p-p INPUT 4V p-p INPUT
–0.2 –0.4 –0.6 –0.8 –1.0 1.00V –3 –CH1 –4 5 –2 –1 M1.00s 0 1 VCM (V) 2 A CH1 3 – 4 20.0V 5
05072-034
0.00001
05072-009
1
100
1k FREQUENCY (Hz)
10k
20k
Figure 39. 0.1 Hz to 10 Hz Noise
Figure 42. Total Harmonic Distortion + Noise vs. Frequency
Rev. B | Page 11 of 16
05072-037
0.000001
05072-036
1
05072-035
05072-032
0
1
AD8641/AD8642/AD8643
–40 –50 –60 –70 –80 –90 VIN = 18V p-p VIN – + 2kΩ 2kΩ – + 20kΩ 2kΩ
(dB)
–100 –110 –120 –130 –140 –150 –160 20 VIN = 4.5V p-p
100
1k FREQUENCY (Hz)
10k
100k
Figure 43. Channel Separation
05072-041
VIN = 9V p-p
Rev. B | Page 12 of 16
AD8641/AD8642/AD8643 OUTLINE DIMENSIONS
2.20 2.00 1.80 1.35 1.25 1.15 PIN 1 0.65 BSC 1.00 0.90 0.70 1.10 0.80 0.40 0.10
0.15 0.00 0.38 0.22 COPLANARITY 0.10 PIN 1 0.65 BSC 1.10 MAX 8° 0° 0.80 0.60 0.40
5 1 2 4 3
3.00 BSC
2.40 2.10 1.80
8
5
3.00 BSC
1
4.90 BSC
4
0.10 MAX
0.30 0.15 0.10 COPLANARITY
SEATING PLANE
0.22 0.08
0.30 0.10
0.23 0.08 SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-203AA
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 44. 5-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-5) Dimensions shown in millimeters
Figure 46. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters
5.00 (0.1968) 4.80 (0.1890)
8 5
8.75 (0.3445) 8.55 (0.3366)
6.20 (0.2440)
14 1 8 7
4.00 (0.1574) 3.80 (0.1497) 1
4 5.80 (0.2284)
4.00 (0.1575) 3.80 (0.1496)
6.20 (0.2441) 5.80 (0.2283)
1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040)
1.75 (0.0688) 1.35 (0.0532)
0.50 (0.0196) × 45° 0.25 (0.0099)
0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10
1.27 (0.0500) BSC
1.75 (0.0689) 1.35 (0.0531)
0.50 (0.0197) × 45° 0.25 (0.0098)
0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE
8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
0.51 (0.0201) 0.31 (0.0122)
SEATING PLANE
8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N] (R-8) Dimensions shown in millimeters and (inches)
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N] (R-14) Dimensions shown in millimeters and (inches)
Rev. B | Page 13 of 16
AD8641/AD8642/AD8643
3.00 BSC SQ
0.60 MAX
0.50 0.40 0.30
PI N 1 INDICATOR
*1.65 1.50 SQ 1.35
0.45
PIN 1 INDICATOR
13 12
16
1
TOP VIEW
2.75 BSC SQ
EXPOSED PAD
0.50 BSC
12° MAX
0.90 0.85 0.80
9 (BOTTOM VIEW) 4 8 5
0.25 MIN
0.80 MAX 0.65 TYP
0.05 MAX 0.02 NOM
1.50 REF
SEATING PLANE
0.30 0.23 0.18
0.20 REF
*COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 48. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm × 3 mm Body, Very Thin Quad (CP-16-3) Dimensions shown in millimeters
ORDERING GUIDE
Model AD8641AKSZ-R21 AD8641AKSZ-REEL71 AD8641AKSZ-REEL1 AD8641ARZ1 AD8641ARZ-REEL71 AD8641ARZ-REEL1 AD8642ARMZ-R21 AD8642ARMZ-REEL1 AD8642ARZ1 AD8642ARZ-REEL71 AD8642ARZ-REEL1 AD8643ARZ1 AD8643ARZ-REEL71 AD8643ARZ-REEL1 AD8643ACPZ-R21 AD8643ACPZ-REEL71 AD8643ACPZ-REEL1
1
Temperature Range –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C –40°C to +125°C
Package Description 5-Lead SC70 5-Lead SC70 5-Lead SC70 8-lead SOIC_N 8-lead SOIC_N 8-lead SOIC_N 8-lead MSOP 8-lead MSOP 8-lead SOIC_N 8-lead SOIC_N 8-lead SOIC_N 14-lead SOIC_N 14-lead SOIC_N 14-lead SOIC_N 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ 16-Lead LFCSP_VQ
Package Option KS-5 KS-5 KS-5 R-8 R-8 R-8 RM-8 RM-8 R-8 R-8 R-8 R-14 R-14 R-14 CP-16-3 CP-16-3 CP-16-3
Branding A07 A07 A07
A0A A0A
AUA AUA AUA
Z = Pb-free part.
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AD8641/AD8642/AD8643 NOTES
Rev. B | Page 15 of 16
AD8641/AD8642/AD8643 NOTES
©2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05072–0–4/05(B)
Rev. B | Page 16 of 16
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