ADM3485

3.3 V Slew Rate Limited, Half- and Full-Duplex, RS-485/RS-422 Transceivers ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 FEATURES Operate with 3.3 V supply Interoperable with 5 V logic EIA RS-422 and RS-485 compliant over full common-mode range Data rate options ADM3483/ADM3488: 250 kbps ADM3485/ADM3490/ADM3491: 10 Mbps Half- and full-duplex options Reduced slew rates for low EMI (ADM3483 and ADM3488) 2 nA supply current in shutdown mode (ADM3483/ADM3485/ADM3491) Up to 32 transceivers on the bus −7 V to +12 V bus common-mode range Specified over the –40°C to +85°C temperature range 8 ns skew (ADM3485/ADM3490/ADM3491) 8-lead SOIC and 14-lead SOIC (ADM3491 only) packages FUNCTIONAL BLOCK DIAGRAMS VCC ADM3483/ ADM3485 RO RE DE DI D R A B 05524-027 GND Figure 1. VCC A B RO R APPLICATIONS Low power RS-485/RS-422 applications Telecom Industrial process control HVAC DI ADM3488/ ADM3490 Z Y GND 05524-026 05524-025 D Figure 2. GENERAL DESCRIPTION The ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 are low power, differential line transceivers designed to operate using a single 3.3 V power supply. Low power consumption, coupled with a shutdown mode, makes the ADM3483/ADM3485/ADM3488/ ADM3490/ADM3491 ideal for power-sensitive applications. The ADM3488/ADM3490/ADM3491 feature full-duplex communication, while the ADM3483/ADM3485 are designed for half-duplex communication. The ADM3483/ADM3488 feature slew rate limited drivers that minimize EMI and reduce reflections caused by improperly terminated cables, allowing error-free data transmission at data rates up to 250 kbps. The ADM3485/ADM3490/ADM3491 transmit at up to 10 Mbps. The receiver input impedance is 12 kΩ, allowing up to 32 transceivers to be connected on the bus. A thermal shutdown circuit prevents excessive power dissipation caused by bus contention or by output shorting. If a significant temperature increase is detected RO RE DE DI ADM3491 R A B Z D Y Figure 3. in the internal driver circuitry during fault conditions, then the thermal shutdown circuit forces the driver output into a high impedance state. If the inputs are unconnected (floating), the receiver contains a fail-safe feature that results in a logic high output state. The parts are fully specified over the commercial and industrial temperature ranges. The ADM3483/ADM3485/ ADM3488/ADM3490 are available in 8-lead SOIC_N; the ADM3491 is available in a 14-lead SOIC_N. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 4 Timing Specifications—ADM3485/ADM3490/ADM3491.... 5 Timing Specifications—ADM3483/ADM3488........................ 5 Timing Specifications—ADM3483/ADM3485/ADM3488/ ADM3490/ADM3491 .................................................................. 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configurations and Function Descriptions ........................... 8 Test Circuits....................................................................................... 9 Switching Characteristics .............................................................. 11 Typical Performance Characteristics ........................................... 12 Circuit Description......................................................................... 14 Devices with Receiver/Driver Enables— ADM3483/ADM3485/ADM3491............................................ 14 Devices Without Receiver/Driver Enables— ADM3488/ADM3490................................................................ 14 Reduced EMI and Reflections—ADM3483/ADM3488 ....... 14 Low Power Shutdown Mode..................................................... 14 Driver Output Protection.......................................................... 14 Propagation Delay ...................................................................... 14 Typical Applications................................................................... 14 Line Length vs. Data Rate ......................................................... 15 Outline Dimensions ....................................................................... 17 Ordering Guide .......................................................................... 18 REVISION HISTORY 10/06—Rev. A to Rev. B Updated Format..................................................................Universal Added ADM3491................................................................Universal Changes to Specifications Section.................................................. 4 Changes to Typical Applications Section .................................... 14 7/06—Rev. 0 to Rev. A Changes to Applications .................................................................. 1 Changes to General Description .................................................... 1 Changes to Figure 19...................................................................... 10 Changes to Typical Applications Section .................................... 13 Changes to Figure 31 and Figure 32............................................. 14 Updated Outline Dimensions ....................................................... 15 10/05—Revision 0: Initial Version Rev. B | Page 2 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 Table 1. ADM34xx Part Comparison Part No. ADM3483 ADM3485 ADM3488 ADM3490 ADM3491 Guaranteed Data Rate (Mbps) 0.25 10 0.25 10 10 Supply Voltage (V) 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 Half-/FullDuplex Half Half Full Full Full Slew Rate Limited Yes No Yes No No Driver/Receiver Enable Yes Yes No No Yes Shutdown Current (nA) 2 2 N/A N/A 2 Pin Count 8 8 8 8 14 Rev. B | Page 3 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 SPECIFICATIONS VCC = 3.3 V ± 0.3 V, TA = TMIN to TMAX, unless otherwise noted. Table 2. Parameter DRIVER Differential Output Voltage (VOD) Min 2.0 1.5 1.5 0.2 3 0.2 0.8 2.0 ±2 1.0 −0.8 0.1 −0.1 Output Leakage (Y, Z) in Shutdown Mode (IO) 0.01 −0.01 RECEIVER Differential Input Threshold Voltage (VTH) Input Hysteresis (Δ VTH) CMOS Output Voltage High (VOH) CMOS Output Voltage Low (VOL) Three-State Output Leakage Current (IOZR) Input Resistance (RIN) POWER SUPPLY CURRENT Supply Current (ICC) Supply Current in Shutdown Mode (ISHDN) Driver Short-Circuit Output Current (IOSD) Receiver Short-Circuit Output Current (IOSR) 1 Typ Max Unit V V V V V V V V μA mA mA μA μA μA μA Test Conditions/Comments RL = 100 Ω (RS-422), VCC = 3.3 V ± 5% (see Figure 7) RL = 54 Ω (RS-485) (see Figure 7) RL = 60 Ω (RS-485), VCC = 3.3 V (see Figure 8) RL = 54 Ω or 100 Ω (see Figure 7) RL = 54 Ω or 100 Ω (see Figure 7) RL = 54 Ω or 100 Ω (see Figure 7) DE, DI, RE DE, DI, RE DE, DI, RE VIN = 12 V, DE = 0 V, VCC = 0 V or 3.6 V VIN = −7 V, DE = 0 V, VCC = 0 V or 3.6 V VIN = 12 V, DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, ADM3491 only VIN = −7 V, DE = 0 V, RE = 0 V, VCC = 0 V or 3.6 V, ADM3491 only VIN = 12 V, DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, ADM3491 only VIN = −7 V, DE = 0 V, RE = VCC, VCC = 0 V or 3.6 V, ADM3491 only −7 V < VCM < +12 V VCM = 0 V IOUT = −1.5 mA, VID = 200 mV (see Figure 9) IOUT = 2.5 mA, VID = 200 mV (see Figure 9) VCC = 3.6 V, 0 V ≤ VOUT ≤ VCC −7 V < VCM < +12 V DE = VCC, RE = 0 V or VCC, no load, DI = 0 V or VCC DE = 0 V, RE = 0 V, no load, DI = 0 V or VCC DE = 0 V, RE = VCC, DI = VCC or 0 V VOUT = −7 V VOUT = 12 V 0 V < VRO < VCC Δ |VOD| for Complementary Output States 1 Common-Mode Output Voltage (VOC) Δ |VOC| for Common-Mode Output Voltage1 DRIVER INPUT LOGIC CMOS Input Logic Threshold Low (VIH) CMOS Input Logic Threshold High (VIL) CMOS Logic Input Current (IIN1) Input Current—A, B (IIN2) Output Leakage—Y, Z (IO) −0.2 50 VCC – 0.4 +0.2 0.4 ±1 12 1.1 0.95 0.002 2.2 1.9 1 −250 250 ±60 V mV V V μA kΩ mA mA μA mA mA mA ±8 ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when DI input changes state. Rev. B | Page 4 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 TIMING SPECIFICATIONS—ADM3485/ADM3490/ADM3491 VCC = 3.3 V, TA = 25°C, unless otherwise noted. Table 3. Parameter DRIVER Differential Output Delay (tDD) Differential Output Transition Time (tTD) Propagation Delay, Low-to-High Level (tPLH) Propagation Delay, High-to-Low Level (tPHL) |tPLH – tPHL| Propagation Delay Skew 1 (tPDS) DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3485/ ADM3491 ONLY) Output Enable Time to Low Level (tPZL) Output Enable Time to High Level (tPZH) Output Disable Time from High Level (tPHZ) Output Disable Time from Low Level (tPLZ) Output Enable Time from Shutdown to Low Level (tPSL) Output Enable Time from Shutdown to High Level (tPSH) 1 Min 1 3 7 7 Typ 22 8 22 22 Max 35 25 35 35 8 Unit ns ns ns ns ns Test Conditions/Comments RL = 60 Ω (see Figure 10 and Figure 16) RL = 60 Ω (see Figure 10 and Figure 16) RL = 27 Ω (see Figure 11 and Figure 17) RL = 27 Ω (see Figure 11 and Figure 17) RL = 27 Ω (see Figure 11 and Figure 17) 45 45 40 40 650 650 90 90 80 80 900 900 ns ns ns ns ns ns RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 12 and Figure 18) RL = 110 Ω (see Figure 12 and Figure 18) RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 12 and Figure 18) Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|. TIMING SPECIFICATIONS—ADM3483/ADM3488 VCC = 3.3 V, TA = 25°C, unless otherwise noted. Table 4. Parameter DRIVER Differential Output Delay (tDD) Differential Output Transition Time (tTD) Propagation Delay, Low-to-High Level (tPLH) Propagation Delay, High-to-Low Level (tPHL) |tPLH – tPHL| Propagation Delay Skew 1 (tPDS) DRIVER OUTPUT ENABLE/DISABLE TIMES (ADM3483 ONLY) Output Enable Time to Low Level (tPZL) Output Enable Time to High Level (tPZH) Output Disable Time from High Level (tPHZ) Output Disable Time from Low Level (tPLZ) Output Enable Time from Shutdown to Low Level (tPSL) Output Enable Time from Shutdown to High Level (tPSH) 1 Min 600 400 700 700 Typ 900 700 1000 1000 100 900 600 50 50 1.9 2.2 Max 1400 1200 1500 1500 Unit ns ns ns ns ns ns ns ns ns μs μs Test Conditions/Comments RL = 60 Ω (see Figure 10 and Figure 16) RL = 60 Ω (see Figure 10 and Figure 16) RL = 27 Ω (see Figure 11 and Figure 17) RL = 27 Ω (see Figure 11 and Figure 17) RL = 27 Ω (see Figure 11 and Figure 17) RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 12 and Figure 18) RL = 110 Ω (see Figure 12 and Figure 18) RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 13 and Figure 19) RL = 110 Ω (see Figure 12 and Figure 18) 1300 800 80 80 2.7 3.0 Measured on |tPLH (Y) − tPHL (Y)| and |tPLH (Z) − tPHL (Z)|. Rev. B | Page 5 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 TIMING SPECIFICATIONS—ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 VCC = 3.3 V, TA = 25°C, unless otherwise noted. Table 5. Parameter RECEIVER Time to Shutdown (tSHDN) ADM3483/ADM3485/ADM3491 1 Propagation Delay, Low-to-High Level (tRPLH) ADM3485/ADM3490/ADM3491 ADM3483/ADM3488 Propagation Delay, High-to-Low Level (tRPHL) ADM3485/ADM3490/ADM3491 ADM3483/ADM3488 |tPLH – tPHL| Propagation Delay Skew (tRPDS) ADM3485/ADM3490/ADM3491 ADM3483/ADM3488 RECEIVER OUTPUT ENABLE/DISABLE TIMES (ADM3483/ADM3485/ADM3491 ONLY) Output Enable Time to Low Level (tPRZL) Output Enable Time to High Level (tPRZH) Output Disable Time from High Level (tPRHZ) Output Disable Time from Low Level (tPRLZ) Output Enable Time from Shutdown to Low Level (tPRSL) Output Enable Time from Shutdown to High Level (tPRSH) 1 Min Typ Max Unit Test Conditions/Comments 80 25 25 25 25 190 65 75 65 75 300 90 120 90 120 10 20 ns ns ns ns ns ns ns VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20) VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20) VID = 0 V to 3.0 V, CL = 15 pF (see Figure 14 and Figure 20) 25 25 25 25 720 720 50 50 45 45 1400 1400 ns ns ns ns ns ns CL = 15 pF (see Figure 15 and Figure 21) CL = 15 pF (see Figure 15 and Figure 21) CL = 15 pF (see Figure 15 and Figure 21) CL = 15 pF (see Figure 15 and Figure 21) CL = 15 pF (see Figure 15 and Figure 21) CL = 15 pF (see Figure 15 and Figure 21) The transceivers are put into shutdown by bringing the RE high and DE low. If the inputs are in this state for less than 80 ns, the parts are guaranteed not to enter shutdown. If the parts are in this state for 300 ns or more, the parts are guaranteed to enter shutdown. Rev. B | Page 6 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 6. Parameter VCC to GND Digital I/O Voltage (DE, RE, DI) Digital I/O Voltage (RO) Driver Output/Receiver Input Voltage Operating Temperature Range Storage Temperature Range θJA Thermal Impedance 8-Lead SOIC 14-Lead SOIC Lead Temperature Soldering (10 sec) Vapor Phase (60 sec) Infrared (15 sec) Rating 7V −0.3 V to VCC + 0.3 V VCC − 0.5 V to VCC + 0.5 V −7.5 V to +12.5 V −40°C to +85°C −65°C to +125°C 121°C/W 86°C/W 300°C 215°C 220°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. B | Page 7 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS NC 1 RO 2 14 13 VCC VCC A RO 1 RE 2 DE 3 DI 4 ADM3483/ ADM3485 TOP VIEW (Not to Scale) 8 7 6 5 VCC B 05524-028 VCC 1 RO 2 DI 3 GND 4 ADM3488/ ADM3490 TOP VIEW (Not to Scale) 8 7 6 5 A B 05524-029 RE 3 DE 4 GND 6 GND 7 ADM3491 12 A GND Z Y TOP VIEW 11 B (Not to Scale) 10 Z DI 5 9 8 Y 05524-030 NC NC = NO CONNECT Figure 4. ADM3483/ADM3485 Pin Configuration Figure 5. ADM3488/ADM3490 Pin Configuration Figure 6. ADM3491 Pin Configuration Table 7. Pin Function Descriptions ADM3483/ADM3485 Pin No. 1 2 ADM3488/ADM3490 Pin No. 2 N/A ADM3491 Pin No. 2 3 Mnemonic RO RE Description Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low. Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a high impedance state. If RE is high and DE is low, the device enters a low power shutdown mode. Driver Output Enable. A high level enables the driver differential Output A and Output B. A low level places it in a high impedance state. If RE is high and DE is low, the device enters a low power shutdown mode. Driver Input. With a half-duplex part when the driver is enabled, a logic low on DI forces A low and B high while a logic high on DI forces A high and B low. With a full-duplex part when the driver is enabled, a logic low on DI forces Y low and Z high while a logic high on DI forces Y high and Z low. Ground. Noninverting Driver Output. Inverting Driver Output. Noninverting Receiver Input A and Noninverting Driver Output A. Noninverting Receiver Input A. Inverting Receiver Input B and Inverted Driver Output B. Inverting Receiver Input B. Power Supply (3.3 V ± 0.3 V). No Connect. 3 N/A 4 DE 4 3 5 DI 5 N/A N/A 6 N/A 7 N/A 8 N/A 4 5 6 N/A 8 N/A 7 1 N/A 6, 7 9 10 N/A 12 N/A 11 13, 14 1, 8 GND Y Z A A B B VCC NC Rev. B | Page 8 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 TEST CIRCUITS A/Y RL/2 VOD 05524-003 CL D GENERATOR1 VOC RL = OUT 60Ω 50Ω VCC CL = 15pF2 05524-036 RL/2 B/Z 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 7. Differential Output Voltage and Common-Mode Voltage Drivers Figure 10. Driver Differential Output Delay and Transition Times VOM RL = 27Ω S1 D OUT CL = 15pF2 VCC 05524-004 375Ω D VCC VOD RL VCM = –7V TO +12V GENERATOR1 50Ω 375Ω VOM = VOH + VOL 2 ≈ 1.5V 05524-037 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 8. Differential Output Voltage Drivers with Varying Common-Mode Voltage Figure 11. Driver Propagation Delays S1 0V OR 3V D CL = 50pF2 VID R OUT RL = 110Ω GENERATOR1 0 05524-005 50Ω VOM = VOH + VOL 2 ≈ 1.5V 05524-038 VOL IOL (+) VOH IOH (–) 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 9. CMOS Output Voltage High and CMOS Output Voltage Low Receivers Figure 12. Driver Enable and Disable Times (tPZH, tPSH, tPHZ) Rev. B | Page 9 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 VCC +1.5V S3 VID R CL2 GENERATOR1 1kΩ S2 S1 VCC RL = 110Ω S1 0V OR 3V D CL = 50pF2 GENERATOR1 OUT –1.5V 50Ω 50Ω 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 13. Driver Enable and Disable Times (tPZL, tPSL, tPLZ) 05524-039 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 15. Receiver Enable and Disable Times VID GENERATOR1 50Ω R OUT CL = 15pF2 1.5V 0 VOM = VCC 2 05524-040 1PPR = 250kHz, 50% DUTY CYCLE, t ≤ 6.0ns, Z = 50Ω. R O 2C INCLUDES PROBE AND STRAY CAPACITANCE. L Figure 14. Receiver Propagation Delays Rev. B | Page 10 of 20 05524-041 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 SWITCHING CHARACTERISTICS +3V IN 1.5V 1.5V 0 3V IN 1.5V 1.5V 0 tDD 50% 10% 90% 90% tDD ≈ +2V 05524-006 tPZH OUT VOM tPHZ 0.25V VOH 0 05524-008 05524-009 OUT 50% 10% tTD tTD ≈ –2V Figure 16. Driver Differential Output Delay and Transition Times 3V IN 1.5V 1.5V 0V Figure 18. Driver Enable and Disable Times (tPZH, tPSH, tPHZ) 3V IN 1.5V 1.5V 0 tPLH A/Y OUT VOM tPHL VOH VOM VOL tPSL OUT VOM tPLZ VCC 0.25V VOL tPHL B/Z OUT VOM tPLH VOH VOL 05524-007 VOM Figure 17. Driver Propagation Delays Figure 19. Driver Enable and Disable Times (tPZL, tPSL, tPLZ) 3V IN 1.5V 1.5V 0 tRPLH VOM tRPHL VCC VOM 0 OUT Figure 20. Receiver Propagation Delays +3V IN 1.5V +3V IN 1.5V 05524-010 tPRZH tPRSH OUT 1.5V 0 VOH S1 OPEN S2 CLOSED S3 = +1.5V tPRZL tPRSL OUT 1.5V 0 S1 CLOSED S2 OPEN S3 = –1.5V VCC VOL 0 +3V IN 1.5V 0 S1 OPEN S2 CLOSED S3 = +1.5V +3V IN 1.5V 0 S1 CLOSED S2 OPEN S3 = –1.5V tPRHZ OUT +0.25V VOH OUT 0 +0.25V tPRLZ VCC VOL 05524-011 Figure 21. Receiver Enable and Disable Times Rev. B | Page 11 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 TYPICAL PERFORMANCE CHARACTERISTICS 30 0.8 0.7 0.6 20 OUTPUT VOLTAGE (V) 05524-012 25 OUTPUT CURRENT (mA) 0.5 0.4 0.3 0.2 15 10 5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 OUTPUT VOLTAGE (V) TEMPERATURE (°C) Figure 22. Output Current vs. Receiver Output Low Voltage –16 –14 –12 –10 –8 –6 –4 05524-013 Figure 25. Receiver Output Low Voltage vs. Temperature, IRO = 2.5 mA 100 90 80 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) 70 60 50 40 30 20 10 0 0 0.5 1.0 1.5 2.0 2.5 3.0 05524-016 –2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 3.5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 23. Output Current vs. Receiver Output High Voltage 3.30 Figure 26. Driver Output Current vs. Differential Output Voltage 2.6 2.5 3.25 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 2.4 2.3 2.2 2.1 2.0 1.9 1.8 05524-014 3.20 3.15 3.10 3.05 1.7 1.6 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 3.00 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 TEMPERATURE (°C) TEMPERATURE (°C) Figure 24. Receiver Output High Voltage vs. Temperature, IRO = 1.5 mA Figure 27. Driver Differential Output Voltage vs. Temperature, RL = 54 Ω Rev. B | Page 12 of 20 05524-017 05524-015 0.1 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 140 120 1.2 1.1 1.0 OUTPUT CURRENT (mA) 100 80 60 40 20 0 SUPPLY CURRENT (mA) 0.9 0.8 0.7 0.6 0.5 DE = RE = GND 05524-020 05524-021 DE = RE = X* 05524-018 0.4 *X = DON’T CARE 0.3 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 0 2 4 6 8 10 12 OUTPUT VOLTAGE (V) TEMPERATURE (°C) Figure 28. Output Current vs. Driver Output Low Voltage –125 –115 –105 90 80 Figure 30. Supply Current vs. Temperature –85 –75 –65 –55 –45 –35 –25 05524-019 SHUTDOWN CURRENT (nA) 3 OUTPUT CURRENT (mA) –95 70 60 50 40 30 20 10 0 –40 –30 –20 –10 –15 –5 –7 –6 –5 –4 –3 –2 –1 0 1 2 0 10 20 30 40 50 60 70 80 OUTPUT VOLTAGE (V) TEMPERATURE (°C) Figure 29. Output Current vs. Driver Output High Voltage Figure 31. Shutdown Current vs. Temperature Rev. B | Page 13 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 CIRCUIT DESCRIPTION The ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 are low power transceivers for RS-485 and RS-422 communications. The ADM3483/ADM3488 transmit and receive at data rates up to 250 kbps; the ADM3485/ADM3490/ADM3491 transmit at up to 10 Mbps. The ADM3488/ADM3490/ADM3491 are full-duplex transceivers, while the ADM3483/ADM3485 are halfduplex transceivers. Driver enable (DE) and receiver enable (RE) pins are included on the ADM3483/ADM3485/ADM3491. When disabled, the driver and receiver outputs are high impedance. REDUCED EMI AND REFLECTIONS— ADM3483/ADM3488 The ADM3483/ADM3488 are slew rate limited transceivers, minimizing EMI and reducing reflections caused by improperly terminated cables. LOW POWER SHUTDOWN MODE (ADM3483/ADM3485/ADM3491) A low power shutdown mode is initiated by bringing RE high and DE low. The devices do not shut down unless both the driver and receiver are disabled (high impedance). In shutdown mode, the devices typically draw only 2 nA of supply current. For these devices, the tPSH and tPSL enable times assume the part is in the low power shutdown mode; the tPZH and tPZL enable times assume the receiver or driver was disabled, but the part is not shut down. DEVICES WITH RECEIVER/DRIVER ENABLES— ADM3483/ADM3485/ADM3491 Table 8. Transmitting Truth Table Transmitting Input DE DI RE X2 X2 0 1 1 2 Transmitting Output B1 A1 0 1 High-Z3 High-Z3 1 0 High-Z3 High-Z3 1 1 0 0 1 0 X2 X2 Mode Normal Normal Normal Shutdown DRIVER OUTPUT PROTECTION Two methods are implemented to prevent excessive output current and power dissipation caused by faults or by bus contention. Current limit protection on the output stage provides immediate protection against short circuits over the whole common-mode voltage range (see the Typical Performance Characteristics section). In addition, a thermal shutdown circuit forces the driver outputs into a high impedance state if the die temperature rises excessively. A and B outputs are Z and Y respectively, for full-duplex part (ADM3491). X = don’t care. 3 High-Z = high impedance. Table 9. Receiving Truth Table RE 0 0 0 1 1 2 3 Receiving Input DE1 A–B 0 0 0 0 ≥ +0.2 V ≤ −0.2 V Inputs Open X2 Receiving Output RO 1 0 1 High-Z3 Mode Normal Normal Normal Shutdown PROPAGATION DELAY Skew time is the difference between the low-to-high and highto-low propagation delays. Small driver/receiver skew times help maintain a symmetrical mark-space ratio (50% duty cycle). The receiver skew time (|tPRLH − tPRHL|) is under 10 ns (20 ns for ADM3483/ADM3488). The driver skew times are 8 ns for ADM3485/ADM3490/ADM3491 and typically under 100 ns for ADM3483/ADM3488. DE is a don’t care; X for the full-duplex part (ADM3491). X = don’t care. High-Z = high impedance. DEVICES WITHOUT RECEIVER/DRIVER ENABLES— ADM3488/ADM3490 Table 10. Transmitting Truth Table Transmitting Input DI 1 0 Transmitting Output Z Y 0 1 1 0 TYPICAL APPLICATIONS The ADM3483/ADM3485/ADM3491 transceivers are designed for half-duplex bidirectional data communications on multipoint bus transmission lines, Figure 32 and Figure 33 show typical network applications circuits. The ADM3488 and the ADM3490 full-duplex transceivers are designed to be used in a daisy-chain network topology or in a point-to-point application, see Figure 34 and Figure 35. The ADM3491 can be used as line repeat Figure 36. To minimize reflections, the line must be terminated at both ends in its characteristic impedance, and stub lengths off the main line must be kept as short as possible. The slew rate limited ADM3483/ADM3488 are more tolerant of imperfect termination. Table 11. Receiving Truth Table Receiving Input A–B ≥ +0.2 V ≤ −0.2 V Inputs open Receiving Output RO 1 0 1 Rev. B | Page 14 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 LINE LENGTH VS. DATA RATE The RS-485 and RS-422 standards cover line lengths up to 4000 feet. For line lengths greater than 4000 feet, see Figure 36. MAXIMUM NUMBER OF TRANSCEIVERS ON BUS = 32 VCC A RT D B R1 A RT R2 A B A B B D ADM3483/ ADM3485 RO RE DE DI R ADM3483/ ADM3485 R RO RE DE DI ADM3483/ ADM3485 ADM3483/ ADM3485 R D R D NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. Figure 32. ADM3483/ADM3485 Typical Half-Duplex RS-485 Network MASTER A RO RE DE DI D Z Y R B VCC R1 RT MAXIMUM NUMBER OF NODES = 32 SLAVE Y RT VCC D Z B A R2 R DI DE RE RO R2 RT R1 RT ADM3491 A SLAVE B Z Y A B Z Y SLAVE ADM3491 R ADM3491 RO RE DE D R D ADM3491 DI RO RE DE DI 05524-090 NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. Figure 33. ADM3491 Typical Full-Duplex RS-485 Network Rev. B | Page 15 of 20 05524-022 RO RE DE DI RO RE DE DI ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 MASTER SLAVE ADM3488/ ADM3490 RO R A B Z Y Z B ADM3488/ ADM3490 D DI DI D Y A R RO A B Z Y A B Z Y ADM3488/ ADM3490 SLAVE R D R D ADM3488/ ADM3490 SLAVE RO DI RO DI Figure 34. ADM3488/ADM3490 Full-Duplex Daisy-Chain Network MASTER SLAVE ADM3488/ ADM3490 RO R A B Z Y Z B A ADM3488/ ADM3490 D DI Y Figure 35. ADM3488/ADM3490 Full-Duplex Point-to-Point Applications ADM3491 RO RE A R B Z DE DI D Y RT DATA OUT RT DATA IN NOTES 1. RT IS EQUAL TO THE CHARACTERISTIC IMPEDANCE OF THE CABLE. Figure 36. Line Repeater for ADM3491 Rev. B | Page 16 of 20 05524-091 05524-043 DI D R RO 05524-042 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) × 45° 0.25 (0.0099) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 37. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 8.75 (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) 14 1 8 7 6.20 (0.2441) 5.80 (0.2283) 0.25 (0.0098) 0.10 (0.0039) COPLANARITY 0.10 1.27 (0.0500) BSC 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) × 45° 0.25 (0.0098) 0.51 (0.0201) 0.31 (0.0122) SEATING PLANE 8° 0.25 (0.0098) 0° 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 38. 14-Lead Narrow Body Small Outline [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) Rev. B | Page 17 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 ORDERING GUIDE Model ADM3483ARZ 1 ADM3483ARZ–REEL71 ADM3485ARZ ADM3485ARZ–REEL71 ADM3488ARZ ADM3488ARZ–REEL71 ADM3490ARZ ADM3490ARZ–REEL71 ADM3491AR ADM3491AR-REEL ADM3491AR-REEL7 ADM3491ARZ1 ADM3491ARZ-REEL1 ADM3491ARZ-REEL71 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 8-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) 14-Lead Narrow Body Small Outline (SOIC_N) Package Option R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-8 R-14 R-14 R-14 R-14 R-14 R-14 Ordering Quantity 1,000 1,000 1,000 1,000 2,500 1,000 2,500 1,000 1 1 1 Z = Pb-free part. Rev. B | Page 18 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 NOTES Rev. B | Page 19 of 20 ADM3483/ADM3485/ADM3488/ADM3490/ADM3491 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05524-0-10/06(B) Rev. B | Page 20 of 20