ESD-Protected, EMC-Compliant, 3.3 V
20 Mbps, EIA RS-485 Transceiver
ADM3485E
Operates with 3.3 V supply
ESD protection: 8 kV meets IEC1000-4-2
EFT protection: 2 kV meets IEC1000-4-4
EIA RS-422 and RS-485 compliant over full CM range
19 kΩ input impedance
Up to 50 transceivers on bus
20 Mbps data rate
Short-circuit protection
Specified over full temperature range
Thermal shutdown
Interoperable with 5 V logic
1 mA supply current
2 nA shutdown current
8 ns skew
APPLICATIONS
Telecommunications
DTE-DCE interfaces
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
AppleTalk
Industrial controls
FUNCTIONAL BLOCK DIAGRAM
ADM3485E
RO
R
B
RE
A
DE
DI
D
03338-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
The ADM3485E is a low power, differential line transceiver
that operates with a single 3.3 V power supply. Low power
consumption makes it ideal for power-sensitive applications.
It is suitable for communication on multipoint bus transmission
lines. Internal protection against electrostatic discharge (ESD)
and electrical fast transient (EFT) allows operation in electrically harsh environments.
It is intended for balanced data transmission and complies
with both EIA Standards RS-485 and RS-422. It contains a
differential line driver and a differential line receiver, and is
suitable for half-duplex data transfer.
The input impedance is 19 kΩ following up to 50 transceivers to
be connected on the bus.
Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The device is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology.
The ADM3485E is fully specified over the industrial temperature range and is available in 8-lead PDIP and SOIC packages.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
ADM3485E
TABLE OF CONTENTS
Specifications..................................................................................... 3
ESD/EFT Transient Protection Scheme .................................. 11
Timing Specifications....................................................................... 4
ESD Testing ................................................................................. 11
Absolute Maximum Ratings............................................................ 5
Fast Transient Burst Immunity (IEC1000-4-4)...................... 12
ESD Caution.................................................................................. 5
Applications Information .............................................................. 13
Pin Configurations and Pin Function Descriptions .................... 6
Differential Data Transmission ................................................ 13
Test Circuits....................................................................................... 7
Cable and Data Rate................................................................... 13
Switching Characteristics ................................................................ 8
Receiver Open-Circuit Fail-Safe............................................... 13
Typical Performance Characteristics ............................................. 9
Outline Dimensions ....................................................................... 14
Standards and Testing .................................................................... 11
Ordering Guide .......................................................................... 14
REVISION HISTORY
10/04—Data Sheet Changed from Rev. A to Rev. B
Updated Format..................................................................Universal
Changes to Power-Supply Current, Table 1 .................................. 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
5/00—Data Sheet Changed from Rev. 0 to Rev. A
Rev. B | Page 2 of 16
ADM3485E
SPECIFICATIONS
VCC = +3.3 V ± 0.3 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
DRIVER
Differential Output Voltage, VOD
∆|VOD| for Complementary Output States
Common-Mode Output Voltage VOC
∆|VOC| for Complementary Output States
CMOS Input Logic Threshold Low, VINL
CMOS Input Logic Threshold High, VINH
Logic Input Current (DE, DI, RE)
Output Short-Circuit Current
RECEIVER
Differential Input Threshold Voltage, VTH
Input Voltage Hysteresis, ∆VTH
Input Resistance
Input Current (A, B)
Logic Enable Input Current (RE)
Output Voltage Low, VOL
Output Voltage High, VOH
Short-Circuit Output Current
Three-State Output Leakage Current
POWER-SUPPLY CURRENT
ICC
Supply Current in Shutdown
ESD/EFT IMMUNITY
ESD Protection
EFT Protection
Min
Typ
Max
Unit
Test Conditions/Comments
0.2
3
0.2
0.8
V
V
V
V
V
V
V
V
µA
mA
RL= 100 Ω, VCC > 3.1 V; see Figure 3
RL= 54 Ω; see Figure 9
RL= 60 Ω, see Figure 4; –7 V < VTST < +12 V
R = 54 Ω or 100 Ω; see Figure 3
R = 54 Ω or 100 Ω; see Figure 3
R = 54 Ω or 100 Ω; see Figure 3
−7 V < VCM < +12 V
VCM = 0 V
−7 V < VCM < +12 V
VIN = 12 V
VIN = −7 V
±60
±1.0
V
mV
kΩ
mA
mA
µA
V
V
mA
µA
1.5
1.5
1
mA
mA
µA
Outputs unloaded
DE = VCC, RE = 0 V
DE = 0 V, RE = 0 V
DE = 0 V, RE = VCC
kV
kV
IEC1000-4-2 A, B pins contact discharge
IEC1000-4-4, A, B pins
2.0
1.5
1.5
2.0
±1.0
±250
−0.2
12
+0.2
50
19
1
−0.8
±1
0.4
VCC – 0.4 V
1
1
0.002
±8
±2
Rev. B | Page 3 of 16
VO = −7 V or +12 V
IOUT = +2.5 mA
IOUT = −1.5 mA
VOUT = GND or VCC
VCC = 3.6 V, 0 V < VOUT < VCC
ADM3485E
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
DRIVER
Differential Output Delay TDD
Differential Output Transition Time
Propagation Delay Input to Output TPLH, TPHL
Driver Output-to-Output TSKEW
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown
Propagation Delay Input to Output TPLH, TPHL
Skew TPLH–TPHL
Receiver Enable TEN
Receiver Disable TDEN
Receiver Enable from Shutdown
Min
Typ
Max
Unit
Test Conditions/Comments
1
1
7
8
22
35
15
35
8
ns
ns
ns
ns
RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
RL = 27 Ω, CL1 = CL2 = 15 pF; see Figure 9
RL = 54 Ω, CL1 = CL2 = 15 pF; see Figure 5
45
40
650
90
80
110
ns
ns
ns
RL = 110 Ω, CL = 50 pF; see Figure 4
RL = 110 Ω, CL = 50 pF; see Figure 4
RL = 110 Ω, CL = 15 pF; see Figure 4
190
65
300
90
10
50
45
500
ns
ns
ns
ns
ns
ns
CL = 15 pF; see Figure 10
CL = 15 pF; see Figure 10
CL = 15 pF; see Figure 8
CL = 15 pF; see Figure 8
CL = 15 pF; see Figure 8
80
25
25
25
TIMING SPECIFICATIONS
VCC = 3.3 V ± 0.3 V, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
DRIVER
Differential Output Delay TDD
Differential Output Transition Time
Propagation Delay Input to Output TPLH, TPHL
Driver Output-to-Output TSKEW
ENABLE/DISABLE
Driver Enable to Output Valid
Driver Disable Timing
Driver Enable from Shutdown
RECEIVER
Time to Shutdown
Propagation Delay Input to Output TPLH, TPHL
Skew TPLH – TPHL
Receiver Enable TEN
Receiver Disable TDEN
Receiver Enable from Shutdown
Min
Typ
Max
Unit
Test Conditions/Comments
1
2
7
8
22
70
15
70
10
ns
ns
ns
ns
RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
RL = 60 Ω, CL1 = CL2 = 15 pF; see Figure 5
RL = 27 Ω, CL1 = CL2 = 15 pF; see Figure 9
RL = 54 Ω, CL1 = CL2 = 15 pF; see Figure 5
45
40
650
110
110
110
ns
ns
ns
RL = 110 Ω, CL = 50 pF; see Figure 4
RL = 110 Ω, CL = 50 pF; see Figure 4
RL = 110 Ω, CL = 15 pF; see Figure 4
190
65
500
115
20
50
50
600
ns
ns
ns
ns
ns
ns
CL = 15 pF, Figure 10
CL = 15 pF, Figure 10
CL = 15 pF, Figure 8
CL = 15 pF, Figure 8
CL = 15 pF, Figure 8
50
25
25
25
Rev. B | Page 4 of 16
ADM3485E
ABSOLUTE MAXIMUM RATINGS
TA = +25°C, unless otherwise noted.
Table 4.
Parameter
VCC
Inputs
Driver Input (DI)
Control Inputs (DE, RE)
Receiver Inputs (A, B)
Outputs
Driver Outputs
Receiver Output
Power Dissipation 8-Lead PDIP
θJA, Thermal Impedance
Power Dissipation 8-Lead SOIC
θJA, Thermal Impedance
Operating Temperature Range
Industrial (A Version)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
ESD Rating: Air
(Human Body Model,All Pins)
ESD Rating: IEC1000-4-2 Contact
(A, B Pins)
EFT Rating: IEC1000-4-4 (A, B Pins)
Values
7V
−0.3 V to VCC + 0.3 V
−0.3 V to VCC + 0.3 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum ratings for extended periods of time may affect
device reliability.
−7.5 V to +12.5 V
−7.5 V to +12.5 V
−0.5 V to VCC + 0.5 V
800 mW
140°C/W
650 mW
115°C/W
−40°C to +85°C
−65°C to +150°C
300°C
215°C
220°C
> 4 kV
> 8 kV
> 2 kV
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. B | Page 5 of 16
ADM3485E
PIN CONFIGURATIONS AND PIN FUNCTION DESCRIPTIONS
RE 2
8
ADM3485E
VCC
B
TOP VIEW
6 A
(Not to Scale)
DI 4
5 GND
7
DE 3
03338-002
RO 1
Figure 2. PDIP/SOIC Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic
RO
RE
DIP/SOIC
1
2
DE
3
DI
4
GND
A
B
VCC
5
6
7
8
Description
Receiver Output. High when A > B by 200 mV or low when A < B by 200 mV.
Receiver Output Enable. With RE low, the receiver output RO is enabled. With RE high, the output goes high
impedance. If RE is high and DE low, the ADM3485E enters a shutdown state.
Driver Output Enable. A high level enables the driver differential outputs A and B. A low level places it in a
high impedance state.
Driver Input. When the driver is enabled, a logic low on DI forces A low and B high, while a logic high on DI
forces A high and B low.
Ground Connection, 0 V.
Noninverting Receiver Input A/Driver Output A.
Inverting Receiver Input B/Driver Output B.
Power Supply, 3.3 V ± 0.3 V.
Rev. B | Page 6 of 16
ADM3485E
TEST CIRCUITS
375Ω
R/2
VOC
VOD3
375Ω
Figure 3. Driver Voltage Measurement Test Circuit
Figure 7. Driver Voltage Measurement Test Circuit 2
VCC
S1
RL
–1.5V
S2
CL
VOUT
DE IN
S2
RE
03338-004
S1
DE
VCC
+1.5V
RL
0V OR 3V
VTST
RL
03338-008
R/2
VCC
03338-007
03338-003
VOD
CL
VOUT
RE IN
Figure 4. Driver Enable/Disable Test Circuit
Figure 8. Receiver Enable/Disable Test Circuit
VOM
DI
CL1
VOUT
CL2
RL
IN
VOUT
S1
DE
CL
03338-009
RLDIFF
03338-005
D
VCC
Figure 9. Driver Propagation Delay Test Circuit
CL1
D
RLDIFF
A
B
CL2
0V
RO
3V
VOUT
R
VID
RE
03338-006
DI
1.5V
Figure 6. Driver/Receiver Propagation Delay Test Circuit
RE
CL
03338-010
Figure 5. Driver Differential Output Delay Test Circuit
Figure 10. Receiver Propagation Delay Test Circuit
Rev. B | Page 7 of 16
ADM3485E
SWITCHING CHARACTERISTICS
3V
3V
1.5V
1.5V
0V
1.5V
tZL
tPLH
tLZ
1/2VO
1.5V
D
A
tSKEW
tSKEW
90% POINT
tZH
90% POINT
D
1.5V
03338-011
10% POINT
–VO
tR
tF
VOL + 0.25V
VOL
tHZ
0V
10% POINT
O/P
LOW
VOH
O/P
HIGH
VOH – 0.25V
03338-013
VO
VO
1.5V
0V
tPLH
B
DE
0V
Figure 13. Driver Enable/Disable Timing
Figure 11. Driver Propagation Delay, Rise/Fall Timing
3V
A–B
0V
RE
0V
1.5V
1.5V
0V
tZL
tPLH
1.5V
R
VOH
tZH
1.5V
VOL + 0.25V
VOL
tHZ
1.5V
VOL
03338-012
RO
O/P
LOW
R
1.5V
O/P
HIGH
VOH
VOH – 0.25V
0V
Figure 12. Receiver Propagation Delay
Figure 14. Receiver Enable/Disable Timing
Rev. B | Page 8 of 16
03338-014
tPLH
tLZ
ADM3485E
TYPICAL PERFORMANCE CHARACTERISTICS
12
14
10
OUTPUT CURRENT (mA)
10
8
6
4
6
4
03338-015
0
0
0.5
2.0
1.0
1.5
2.5
OUTPUT LOW VOLTAGE (V)
3.0
0
3.5
0
Figure 15. Output Current vs. Receiver Output Low Voltage
0.7
3.25
RECEIVER O/P HIGH VOLTAGE (V)
3.30
0.6
0.5
0.4
0.3
–10
10
30
50
70
TEMPERATURE (°C)
90
3.0
3.5
3.20
3.15
3.10
3.05
3.00
2.95
03338-016
0.2
–30
1.0
2.0
1.5
2.5
OUTPUT HIGH VOLTAGE (V)
0.5
Figure 18. Output Current vs. Receiver Output High Voltage
0.8
0.1
–50
03338-018
2
2
RECEIVER OUTPUT LOW VOLTAGE (V)
8
2.90
–50
110
Figure 16. Receiver Output Low Voltage vs. Temperature
03338-019
OUTPUT CURRENT (mA)
12
–30
–10
10
30
50
70
TEMPERATURE (°C)
90
110
Figure 19. Receiver Output High Voltage vs. Temperature
2.6
120
2.4
2.3
80
VOD (V)
2.2
60
2.1
2.0
40
1.9
0
0
0.5
2.0
1.5
2.5
1.0
DIFFERENTIAL OUTPUT VOLTAGE (V)
03338-020
1.8
20
03338-017
DRIVER OUTPUT CURRENT (mA)
2.5
100
1.7
1.6
–50
3.0
Figure 17. Driver Output Current vs. Differential Output Voltage
–30
–10
70
10
30
50
TEMPERATURE (°C)
90
110
Figure 20. Driver Differential Output Voltage vs. Temperature
Rev. B | Page 9 of 16
ADM3485E
1.20
100
1.15
90
1.10
80
70
ICC (mA) DE = VCC, RE = X
ICC (nA)
0.95
0.90
60
50
40
ICC (mA) RE = LO, DE = LO
0.85
30
0.80
20
0.75
0.70
–50
–30
–10
70
10
30
50
TEMPERATURE (°C)
90
ICC (mA)
10
0
–40
110
Figure 21. Supply Current vs. Temperature
–20
0
20
40
TEMPERATURE (°C)
60
Figure 22. Shutdown Current vs. Temperature
Rev. B | Page 10 of 16
03338-022
1.00
03338-021
ICC (mA)
1.05
80
ADM3485E
STANDARDS AND TESTING
Table 6 compares RS-422 and RS-485 interface standards, while
Table 7 and Table 8 show transmitting and receiving truth tables.
Table 6.
Specification
Transmission Type
Maximum Data Rate
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
No. of Drivers/Receivers Per Line
RS-422
Differential
10 MB/s
4000 ft.
±2 V
100 Ω
4 kΩ min
±200 mV
−7 V to +7 V
1/10
RS-485
Differential
10 MB/s
4000 ft.
±1.5 V
54 Ω
12 kΩ min
±200 mV
−7 V to +12 V
32/32
DI
Transmitting Outputs
B
A
X
X
0
1
1
0
X
X
0
1
Hi-Z
Hi-Z
1
1
0
0
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or completely destroy the interface
product connected to the I/O port. It is extremely important,
therefore, to have high levels of ESD protection on the I/O lines.
The ESD discharge could induce latch-up in the device under
test, so it is important that ESD testing on the I/O pins be
carried out while device power is applied. This type of testing is
more representative of a real-world I/O discharge where the
equipment is operating normally when the discharge occurs.
Table 7. Transmitting Truth Table
Transmitting Inputs
DE
RE
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
destruction can occur immediately as a result of arcing or
heating. Even if catastrophic failure does not occur immediately,
the device may suffer from parametric degradation, which may
result in degraded performance. The cumulative effects of
continuous exposure can eventually lead to complete failure.
1
0
Hi-Z
Hi-Z
Table 9. ESD Test Results
ESD Test Method
IEC1000-4-2: Contact
I/O Pins
±8 kV
Table 8. Receiving Truth Table
Receiving Inputs
DE
RE
Receiving Outputs
A–B
RO
0
0
0
1
> +0.2 V
< –0.2 V
Inputs O/C
X
90%
1
0
1
Hi-Z
IPEAK
X
X
X
X
100%
36.8%
ESD/EFT TRANSIENT PROTECTION SCHEME
The ADM3485E uses protective clamping structures on its
inputs and outputs that clamp the voltage to a safe level and
dissipate the energy present in ESD (electrostatic) and EFT
(electrical fast transients) discharges. This protection structure
achieves ESD protection up to 8 kV according to IEC1000-4-2,
and EFT protection up to 2 kV on all input/output (I/O) lines.
TIME t
tDL
tRL
03338-023
10%
Figure 23. Human Body Model Current Waveform
100%
ESD TESTING
10%
0.1 TO 1ns
Rev. B | Page 11 of 16
TIME t
30ns
60ns
Figure 24. IEC1000-4-2 ESD Current Waveform
03338-024
Two coupling methods are used for ESD testing, contact
discharge and air-gap discharge. Contact discharge calls for a
direct connection to the unit being tested. Air-gap discharge
uses a higher test voltage but does not make direct contact with
the unit under test. With air discharge, the discharge gun is
moved toward the unit under test, developing an arc across the
air gap, hence the term air-discharge. This method is influenced
by humidity, temperature, barometric pressure, distance, and
rate of closure of the discharge gun. The contact-discharge
method, while less realistic, is more repeatable and is gaining
acceptance and preference over the air-gap method.
IPEAK
90%
ADM3485E
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
IEC1000-4-4 (previously 801-4) covers electrical fast-transientburst (EFT) immunity. Electrical fast transients occur as a result
of arcing contacts in switches and relays. The tests simulate the
interference generated when, for example, a power relay disconnects an inductive load. A spark is generated due to the wellknown back EMF effect. This spark consists of a burst of sparks
as the relay contacts separate. The voltage appearing on the line
consists of a burst of extremely fast transient impulses. A
similar effect occurs when turning on fluorescent lights.
The fast transient burst test, defined in IEC1000-4-4, simulates
this arcing and its waveform is illustrated in Figure 25. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at
300 ms intervals. It is specified for both power and data lines.
Table 10 shows the peak voltages for each of the environments.
Table 10. Peak Voltages
Level
Well-Protected
Protected
Typical Industrial
Severe Industrial
VPEAK (kV) PSU
0.5
1
2
4
VPEAK (kV) I/O
0.25
0.5
1
2
A simplified circuit diagram of the actual EFT generator is
illustrated in Figure 26.
HIGH
VOLTAGE
SOURCE
RC
L
CC
RM
CD
50Ω
OUTPUT
ZS
03338-026
V
Figure 26. EFT Generator
t
Four severity levels are defined in terms of an open-circuit
voltage as a function of the installation environment. The
installation environments are defined as
These transients are coupled onto the signal lines using an
EFT coupling clamp. The clamp is 1 m long and completely
surrounds the cable, providing maximum coupling capacitance
(50 pF to 200 pF, typ) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns), as specified by the standard, result in very
effective coupling. This test is severe because high voltages are
coupled onto the signal lines. The repetitive transients can cause
problems, where single pulses do not. Destructive latch-up may
be induced due to the high energy content of the transients.
Note that this stress is applied while the interface products are
powered up and are transmitting data. The EFT test applies
hundreds of pulses with higher energy than ESD. The worstcase transient current on an I/O line can be as high as 40 A.
•
Well-Protected
Test results are classified according to the following:
•
Protected
•
Normal performance within specification limits.
•
Typical Industrial
•
•
Severe Industrial
Temporary degradation or loss of performance that is
self-recoverable.
•
Temporary degradation or loss of function or performance that requires operator intervention or system reset.
•
Degradation or loss of function that is not recoverable due
to damage.
300ms
16ms
V
5ns
50ns
0.2/0.4ms
03338-025
t
Figure 25. IEC1000-4-4 Fast Transient Waveform
Rev. B | Page 12 of 16
ADM3485E
APPLICATIONS INFORMATION
DIFFERENTIAL DATA TRANSMISSION
Differential data transmission is used to reliably transmit data
at high rates over long distances and through noisy environments. Differential transmission nullifies the effects of ground
shifts and noise signals that appear as common-mode voltages
on the line.
The ADM3485E is designed for bidirectional data communications on multipoint transmission lines. A typical application
showing a multipoint transmission network is illustrated in
Figure 27. Only one driver can transmit at a particular time,
but multiple receivers may be enabled simultaneously.
Two main standards are approved by the Electronics Industries
Association (EIA) which specify the electrical characteristics of
transceivers used in differential data transmission. The RS-422
standard specifies data rates up to 10 MBaud and line lengths
up to 4000 feet. A single driver can drive a transmission line
with up to 10 receivers.
As with any transmission line, it is important that reflections are
minimized. This may be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic
impedance of the line. Stub lengths of the main line should also
be kept as short as possible. A properly terminated transmission
line appears purely resistive to the driver.
The RS-485 standard was defined to cater to true multipoint
communications. This standard meets or exceeds all the
requirements of RS-422, but also allows multiple drivers and
receivers to be connected to a single bus. An extended
common-mode range of −7 V to +12 V is defined.
RECEIVER OPEN-CIRCUIT FAIL-SAFE
The most significant difference between RS-422 and RS-485 is
the fact that the drivers may be disabled, thereby allowing more
than one to be connected to a single line. Only one driver
should be enabled at a time, but the RS-485 standard contains
additional specifications to guarantee device safety in the event
of line contention.
Specification
Transmission Type
Maximum Cable Length
Minimum Driver Output Voltage
Driver Load Impedance
Receiver Input Resistance
Receiver Input Sensitivity
Receiver Input Voltage Range
CABLE AND DATA RATE
The receiver input includes a fail-safe feature that guarantees
a logic high on the receiver when the inputs are open circuit
or floating.
Table 11. RS-422 and RS-485 Interface Standards
RS-422
Differential
4000 ft.
±2 V
100 Ω
4 kΩ min
±200 mV
−7 V to +7 V
RS-485
Differential
4000 ft.
±1.5 V
54 Ω
12 kΩ min
±200 mV
−7 V to +12 V
The transmission line of choice for RS-485 communications is
a twisted pair. Twisted-pair cable tends to cancel commonmode noise and also causes cancellation of the magnetic fields
generated by the current flowing through each wire, thereby
reducing the effective inductance of the pair.
ADM3485E
ADM3485E
R
RO
A
A
R
RO
RE
RE
DE
DE
D
B
B
A
A
B
R
R
D
RE
DI
ADM3485E
ADM3485E
RO
D
B
DE
D
RO
DI
RE
DE
MAXIMUM NUMBER OF TRANSCEIVERS ON BUS: 50
Figure 27. Multipoint Transmission Network
Rev. B | Page 13 of 16
DI
03338-027
DI
ADM3485E
OUTLINE DIMENSIONS
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 28. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and( millimeters)
5.00 (0.1968)
4.80 (0.1890)
8
5
4.00 (0.1574)
3.80 (0.1497) 1
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
6.20 (0.2440)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
0.50 (0.0196)
× 45°
0.25 (0.0099)
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 29. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
ADM3485EAN
ADM3485EAR
ADM3485EAR-REEL
ADM3485EAR-REEL7
ADM3485EARZ1
ADM3485EARZ-REEL1
ADM3485EARZ-REEL71
1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Plastic DIP
Small Outline (SOIC)
Small Outline (SOIC)
Small Outline (SOIC)
Small Outline (SOIC)
Small Outline (SOIC)
Small Outline (SOIC)
Z = Pb-free part.
Rev. B | Page 14 of 16
Package Options
N-8
R-8
R-8
R-8
R-8
R-8
R-8
ADM3485E
NOTES
Rev. B | Page 15 of 16
ADM3485E
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
C03338–0–11/04(B)
Rev. B | Page 16 of 16
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