0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
EVAL-AD7492SDZ

EVAL-AD7492SDZ

  • 厂商:

    AD(亚德诺)

  • 封装:

    -

  • 描述:

    BOARD EVAL FOR AD7492

  • 数据手册
  • 价格&库存
EVAL-AD7492SDZ 数据手册
EVAL-AD7492SDZ User Guide UG-371 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7492 1.25 MSPS, 16 mW Internal REF and CLK, 12-Bit Parallel ADC FEATURES allows the evaluation board to be controlled via the USB port of a PC using the AD7492 evaluation software. On-board components include the AD8597 ultralow distortion, ultralow noise operational amplifier (single); the AD8021 low noise, high speed amplifier for 16-bit systems; the ADP1613 650 kHz/1.3 MHz step-up PWM dc-to-dc switching converter with 2.0 A current limit; the ADP3303-5 high accuracy anyCAP™ 200 mA low dropout linear regulator; and the ADP2301 1.2 A, 20 V, 1.4 MHz nonsynchronous step-down switching regulator. Full-featured evaluation board for the AD7492 PC control in conjunction with the System Demonstration Platform (EVAL-SDP-CB1Z) PC software for control and data analysis (time and frequency domain) Standalone capability (when designing boards ensure that digital lines can be disconnected from everything else on the board to ensure operation) EVAL-AD7492SDZ CONTENTS The evaluation board features analog bias-up circuitry. Bipolar signals are input via the SK3 SMB connector and are biased up by the on-board bias-up buffer circuit. The biased up signal is available at the VIN SMB and can be applied to the VIN input of the AD7492 device by placing the LK10 link in Position A. Various link options are described in the Evaluation Board Hardware section. The Parallel Interface section of this user guide should be consulted when configuring the board for standalone operation. Complete specifications for the AD7492 are provided in the AD7492 data sheet, available from Analog Devices, Inc., which should be consulted in conjunction with this user-guide when using the AD7492 evaluation board. EVAL-AD7492SDZ evaluation board Evaluation software CD for the AD7492 9 V mains power supply adapter ADDITIONAL EQUIPMENT NEEDED System demonstration platform (EVAL-SDP-CB1Z) Precision analog signal source SMB cable USB cable EVALUATION BOARD DESCRIPTION The EVAL-AD7492SDZ is a full-featured evaluation board, designed to allow the user to easily evaluate all features of the AD7492. The evaluation board can be controlled via the system demonstration platform (SDP) connector (J1). The SDP board FUNCTIONAL BLOCK DIAGRAM DVDD GND ON-BOARD POWER SUPPLIES AVDD + AM1185 POWER SEQUENCER GND – VSS ADP1613 ±5V ADP2301 SDP5V GND ADP3303 +5V ADP1720 3.3V OP AMP SUPPLIES DC INPUT JACK 5V VDD VDRIVE GND AVDD DVDD UNIPOLAR INPUT SIGNAL VDRIVE VIN INPUT BUFFER AD7492 CS RD CONVST BUSY AD8597 BIPOLAR INPUT SIGNAL DATA BUS D0 TO D11 REFOUT BIAS UP CIRCUITRY BF527DSP ADG330X LEVEL SHIFTERS PARALLEL PORT AVDD AD8021 ADR431 REF EVAL-AD7492SDZ Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 24 SDP BOARD 10493-001 PS/FS EXTERNAL OFFSET UG-371 EVAL-AD7492SDZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 External Connectors .....................................................................6 EVAL-AD7492SDZ Contents ......................................................... 1 EVAL-AD7492SDZ Basic Hardware Setup................................7 Additional Equipment Needed ....................................................... 1 Evaluation Board Software ...............................................................8 Evaluation Board Description......................................................... 1 Software Installation .....................................................................8 Functional Block Diagram .............................................................. 1 Launching the Software ................................................................9 Revision History ............................................................................... 2 Software Operation .................................................................... 10 EVAL-AD7492SDZ Quick Start Guide ......................................... 3 User Software Panel Description.............................................. 10 Recommended Quick Start Guide ............................................. 3 Data Capture/Waveform Tab .................................................... 11 Evaluation Board Hardware ............................................................ 4 AC Testing—Data Capture/Histogram Tab ............................ 12 Device Description ....................................................................... 4 DC Testing—Data Capture/Histogram Tab ........................... 12 Hardware Link Options ............................................................... 4 AC Testing—Data Capture/FFT Tab ....................................... 13 Power Supplies .............................................................................. 5 Data Capture/Summary Tab ..................................................... 14 Parallel Interface ........................................................................... 5 Save File ....................................................................................... 15 Analog Inputs ................................................................................ 6 Load File ...................................................................................... 15 Reference Options ........................................................................ 6 Evaluation Board Schematics and Artwork ................................ 16 REVISION HISTORY 10/12—Revision 0: Initial Version Rev. 0 | Page 2 of 24 EVAL-AD7492SDZ User Guide UG-371 EVAL-AD7492SDZ QUICK START GUIDE RECOMMENDED QUICK START GUIDE 4. To install the software, do the following: 5. 2. 3. Install the AD7492 software from the enclosed CD. When installing the software, ensure that the EVAL-SDP-CB1Z board is disconnected from the USB port of the PC. Restart the PC after installation. Connect the EVAL-SDP-CB1Z board to the EVALAD7492SDZ board, as shown in Figure 2. Screw the two boards together with the enclosed nylon screw-nut set because it ensures that the boards connect firmly together. 6. 9V POWER ADSPBF527 BLACKFINDSP SDP BOARD Figure 2. Hardware Configuration, Setting Up the EVAL-AD7492SDZ Rev. 0 | Page 3 of 24 USB TO PC 10493-002 1. Connect the 9 V power supply adapter included in the kit to the J2 connecter on the EVAL-AD7492SDZ board. Connect the EVAL-SDP-CB1Z board to the PC via the USB cable. For Windows® XP, users may need to search for the EVAL-SDP-CB1Z drivers. If prompted by the operating system, choose to automatically search for the drivers for the EVAL-SDP-CB1Z board. Launch the EVAL-AD7492SDZ software from the Analog Devices subfolder in the All Programs menu. UG-371 EVAL-AD7492SDZ User Guide EVALUATION BOARD HARDWARE DEVICE DESCRIPTION The AD7492 is a 12-bit high speed, low power, successive approximation ADC. The part operates from a single 2.7 V to 5.25 V power supply and features a maximum throughput rate of 1 MSPS. It contains a low noise, wide bandwidth track-andhold amplifier that can handle bandwidths up to 10 MHz. The conversion process and data acquisition are controlled using standard control inputs allowing for easy interface to microprocessors or DSPs. The input signal is sampled on the falling edge of CONVST, and conversion is also initiated at this point. The BUSY pin goes high at the start of conversion and goes low 880 ns later to indicate that the conversion is complete. There are no pipeline delays associated with the part. The conversion result is accessed via the standard CS and RD signals over a high speed parallel interface. The AD7492 uses advanced design techniques to achieve very low power dissipation at high throughput rates. The part offers flexible power/throughput rate management. It is also possible to operate the part in full sleep mode and partial sleep mode, where the part wakes up to do a conversion and automatically enters a sleep mode at the end of conversion. The type of sleep mode is hardware selected by the PS/FS pin. Using these sleep modes allows very low power dissipation numbers at lower throughput rates. The analog input range for the part is 0 V to the reference voltage. The 2.5 V reference is supplied internally and is available for external referencing. HARDWARE LINK OPTIONS Before using the evaluation board, 13 link options must be set for the required operating setup. Table 1 outlines the function of these options. Table 1 shows the position in which all the links are set when the evaluation board is packaged. Jumper and solder link (LKx) options must be set correctly to select the appropriate operating setup before using the evaluation board. The default link positions are shown in Table 2, and the functions of these options are outlined in Table 1 Table 1. Link Options Link No. LK1 LK2 LK3 LK6 LK8 LK9 LK10 LK14 LK15 LK20 LK701 LK801 LK802 Function This link determines the value of VDRIVE. When in Position A, VDRIVE is tied to AVDD. When in Position B, VDRIVE is supplied externally via the J3 connector. When in Position C, VDRIVE is set to 3.3 V. This link option selects the source of the CONVST input. When this link is in Position A, the CONVST input is provided by the SK2 external socket. When this link is in Position B, the CONVST input is provided by the EVAL-SDP-CB1Z board. This link option determines whether the REF OUT signal from the AD7492 (Position A) or the voltage generated by the ADR431 reference (Position B) is connected to the positive input of U4. This link option selects the source of the RD input. When this link is in Position A, the RD input is provided by the EVAL-SDP-CB1Z board. When this link is in Position B, it is tied to ground. This link option selects the source of the CS signal. When this link is in Position A, the CS signal is provided by the EVAL-SDP-CB1Z. When this link is in Position B, it is tied to ground. When inserted, the buffered REF OUT voltage is divided by a factor of 3 and used as the bias input for U6. In Position A, the biased up output of U6 is applied to the VIN pin of the AD7492. In Position B, the buffered unipolar signal input that is applied to SK1 is connected to the VIN pin of the AD7492. This link option selects the sleep mode that the AD7492 can be put into. Then, this link is in Position A, and the part goes into full sleep when low power operation is selected. When this link is in Position B, the part goes into partial sleep when low power operation is selected. When inserted, the unipolar VIN impedance matching resistor is connected into the circuit. This link option selects the voltage applied to the positive input of U6. When in Position A, an external offset can be applied via the EXT_OFFSET SMB connector. When in Position B, it is tied to ground. When in Position C, it is a buffered reference voltage. This link option selects the source of the AVDD signal. In Position A, the 5 V signal generated on-board is selected. In Position B, the signal externally connected via J703 is selected. This link option selects the source of the VSS_−5V signal. In Position A, the VSS_−5V signal generated on-board is selected. In Position B, the external VSS signal is connected to J800-1. This link option selects the source of the + VDD_+5V signal. In Position A, the VDD_+5V signal generated on-board is selected. In Position B, the external VDD signal connected to J800-3 is selected. Rev. 0 | Page 4 of 24 EVAL-AD7492SDZ User Guide UG-371 Table 2. Link Options—Setup Condition Link No. LK1 LK2 LK3 LK6 LK8 LK9 LK10 LK14 LK15 LK20 LK801 LK802 LK701 Position A B A A A Inserted B B Inserted A A A A Function VDRIVE is set to AVDD. The CONVST signal is provided by the EVAL-SDP-CB1Z. The REFOUT pin of the AD7492 is connected to the bias circuitry. The RD signal is provided by the EVAL-SDP-CB1Z. The CS signal is provided by the EVAL-SDP-CB1Z. The buffered REF OUT voltage is divided by a factor of 3, and it is used as the bias input for U6. The VIN pin of AD7492 is connected to the buffered unipolar signal input that is applied to SK1. The AD7492 goes into partial sleep mode if low power operation is selected. The unipolar VIN impedance matching resistor is connected into the circuit. The buffered internal reference is used as the bias input for U6. It selects the VSS_−5V signal generated on the board as opposed to the externally connected VSS (J800-1) signal. It selects the VDD_+5V signal generated on the board as opposed to the externally connected VDD (J800-3) signal. It selects the AVDD signal generated on the board as opposed to being externally connected via J703. POWER SUPPLIES PARALLEL INTERFACE Take care before applying power and signals to the evaluation board to ensure that all link positions are as required by the operating mode. The EVAL-AD7492SDZ communicates with the EVAL-SDP-CB1Z board using level shifters. The EVAL-SDP-CB1Zoperates at a 3.3 V logic level. This allows VDRIVE voltages to exceed 3.3 V. An external CONVST signal can be supplied to the board via the SK2 SMB. Parallel data can only be monitored via the EVAL-SDP-CB1Z board and software. A break out board ADZS-BRKOUT-EX3 is available that allows access to the digital lines. When using the EVAL-AD7492SDZ in conjunction with the EVAL-SDP-CB1Z board, connect the dc transformer to the J700 connector. AVDD, DVDD, and VDRIVE are generated on-board. Each supply is decoupled on the EVAL-AD7492SDZ using 10 µF and 0.1 µF capacitors. A single ground plane is used on this board to minimize the effect of high frequency noise interference. Table 3. External Power Supply Required Power Supply Terminal VIN1 Voltage Range (V) +7 to +9 VDD VSS AVDD2 +5.5 −5.5 +2.7 to +5.25 VDRIVE +2.7 to +5.25 Purpose Supplies all the on-board power supplies that generate all the required supplies to run the evaluation board Amplifier +VDD Amplifier −VSS ADC analog and digital supply rails Supply voltage for the output drivers and digital input circuitry 1 When this is supplied, all other power supplies are available on-board. If this supply is not used, all other supplies must be sourced from an external source. 2 Analog supply voltage. This is the only supply voltage for all the analog circuitry on the AD7492. The AVDD and DVDD voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. Decouple this supply to AGND. Rev. 0 | Page 5 of 24 UG-371 EVAL-AD7492SDZ User Guide VDD_+5V C11 10µF R12 130Ω C2 0.1µF C10 22pF U3 2 R2 130Ω LK15 R5 51Ω C8 10µF 10493-003 SK1 UNIPOLAR INPUT SIGNAL VIN AD7492 7 V+ 6 B VIN OP 3 + V– AD8597ARZ 4 A VIN LK10 C16 0.1µF VIN_BIASED – VDD_–5V 10493-004 Figure 3. Unipolar Input Buffer Circuitry Figure 4. Bipolar Input Buffer Circuitry ANALOG INPUTS REFERENCE OPTIONS The analog input to the evaluation board can be either the SK1 SMB (push on) connector with a unipolar signal source or the SK3 SMB (push on) connector when using a bipolar signal source. The reference source can be from the AD7492 REF OUT pin or the ADR431 ultralow noise XFET® voltage reference device (U5). The unipolar input is buffered with dedicated circuitry (U3) and discrete components, as shown in Figure 3. Table 4 lists the connector functions of the evaluation board. LK15 can be used to put a 50 Ω impedance matching load on the input. LK10 is placed in Position B to connect the output of U3 to the AD7492. The bipolar signal is buffered with dedicated circuitry (U4, U6, and U9) along with the discreet components shown in Figure 4. The circuit shown in Figure 4 allows for different configurations, and an external source can be applied to bias the input voltage. The analog input buffer amplifier (U3) is set as a unity gain buffer. The amplifier positive rail is driven from ±5 V (from ADP1613, U801, that is used to drive a dual rail, power supply, SEPIC Cuk configuration), which can be changed to a different value, as required, by using the external terminals on J800. LK801 and LK802 must be set to Position B to drive the amplifiers from an external source. For dynamic performance, an FFT test can be done by applying a very low distortion ac source. EXTERNAL CONNECTORS Table 4. Connector Functions Connector EXT_OFFSET J3 J700 J702 J703 J800 SK1 SK2 SK3 Rev. 0 | Page 6 of 24 Function SMB socket for external bias input, which provided that LK20 is correctly configured, can be applied to U6 External VDRIVE screw terminal connector 7 V to 9 V bench supply screw terminal connector 7 V to 9 V dc transformer power connector AVCC screw terminal connector VSS and VDD screw terminal connectors Unipolar signal input SMB socket CONVST signal input SMB socket Bipolar signal input SMB socket EVAL-AD7492SDZ User Guide UG-371 EVAL-AD7492SDZ BASIC HARDWARE SETUP The AD7492 evaluation board connects to the EVAL-SDP-CB1Z. The EVAL-SDP-CB1Z board is a controller board that is the communication link between the PC and the main evaluation board. Figure 2 shows a photograph of the connections made between the AD7492 daughter board and the EVAL-SDP-CB1Z board. Before connecting power, connect the EVAL-AD7492SDZ board to Connector A or Connector B on the EVAL-SDP-CB1Z board. Nylon screws are included in the EVAL-AD7492SDZ evaluation kit and can be used to ensure that the EVAL-AD7492SDZ and the EVAL-SDP-CB1Z boards are connected firmly together. Once the EVAL-AD7492SDZ and the EVAL-SDP-CB1Z boards are connected securely, connect the power supplies on the EVAL-AD7492SDZ board. The EVAL-AD7492SDZ requires an external power supply that is included in the evaluation board kit. Connect this power supply to the J702 connector on the EVALAD7492SDZ board. Alternatively, a bench power supply can be used to power the EVAL-AD7492SDZ via J700. Further details on the required power supply connections and options are detailed in the Power Supplies section. Before connecting the EVAL-SDP-CB1Z board to the PC, ensure that the AD7492 software has been installed from the enclosed CD. The full software installation procedure is detailed in the Evaluation Board Software section. Finally, connect the EVAL-SDP-CB1Z board to the PC via the USB cable enclosed in the EVAL-SDP-CB1Z kit. If using the Windows XP platform, users may need to search for the EVALSDP-CB1Z drivers. If prompted by the operating system, choose to automatically search for the drivers for the EVAL-SDP-CB1Z. Rev. 0 | Page 7 of 24 UG-371 EVAL-AD7492SDZ User Guide EVALUATION BOARD SOFTWARE SOFTWARE INSTALLATION The EVAL-AD7492SDZ evaluation kit includes software on a CD. Click the setup.exe file from the CD to run the installation. The default location for the software is C:\Program Files\Analog Devices\AD7492. Install the evaluation software before connecting the evaluation board and the EVAL-SDP-CB1Z board to the USB port of the PC to ensure that the evaluation system is correctly recognized when connected to the PC. There are two parts to the installation: EVAL-AD7492SDZ evaluation board software install EVAL-SDP-CB1Z SDP board drivers install 10493-007 1. 2. Figure 7. Install Window 3 (I accept the License Agreement. Next >>) 10493-008 Figure 5 to Figure 9 show the steps to take to install the EVALAD7492SDZ evaluation software. Figure 10 to Figure 13 show the steps to take to install the EVAL-SDP-CB1Z drivers. Proceed through all of the installation steps allowing the software and drivers to be placed in the appropriate locations. Until the software and drivers have been installed, do not connect the EVAL-SDPCB1Z board to the PC. 10493-005 Figure 8. AD7492 Install Window 4 (Next >>) 10493-009 Figure 5. AD7492 Install Window 1 (Yes) 10493-006 Figure 9. AD7492 Install Window 5 (Next >>) Figure 6. AD7492 Install Window 2 (Choose Destination) Rev. 0 | Page 8 of 24 EVAL-AD7492SDZ User Guide UG-371 After installation from the CD is complete, connect the EVALAD7492SDZ to the EVAL-SDP-CB1Z as described in the Evaluation Board Hardware section. 10493-011 When the EVAL-SDP-CB1Z board is first plugged in via the USB cable provided, allow the Found New Hardware Wizard to run. Once the drivers are installed, verify that the board has connected correctly by looking at the Device Manager of the PC. Right-click My Computer/Manage/System Tools/Device Manager, as shown in Figure 14, to find the Device Manager. Analog Devices System Development Platform (32MB) should appear under ADI Development Tools. This now completes the installation. 10493-012 10493-015 Figure 10. EVAL-SDP-CB1Z Drivers Setup Window 2 (Choose Install Location) Figure 11. EVAL-SDP-CB1Z Drivers Setup Window 3 (Install) Figure 14. Device Manager LAUNCHING THE SOFTWARE Once the EVAL-AD7492SDZ and EVAL-SDP-CB1Z are correctly connected to the PC, the AD7492 software can be launched. 10493-013 To launch the software, complete the following steps: 1. From the Start menu, select Programs/Analog Devices/ AD7492. The main window of the software then displays. 2. If the AD7492 evaluation system is not connected to the USB port via the EVAL-SDP-CB1Z when the software is launched, a connectivity error displays (see Figure 15). Connect the evaluation board to the USB port of the PC, wait a few seconds, click Rescan, and follow the instructions. 10493-014 10493-016 Figure 12. EVAL-SDP-CB1Z Drivers Setup Window 4 (Finish) Figure 15. Connectivity Error Alert Figure 13. EVAL-SDP-CB1Z Drivers Setup Window 5 (Restart) Rev. 0 | Page 9 of 24 UG-371 EVAL-AD7492SDZ User Guide 1 4 2 6 7 5 10493-017 3 Figure 16. Setup Screen SOFTWARE OPERATION 2. When the software is launched, the panel opens, and the software looks for hardware connected to the PC. The software detects the generic attached to the PC and returns this in a user dialog box. The user software panel then launches, as shown in Figure 16. 3. USER SOFTWARE PANEL DESCRIPTION The user software panel, as shown in Figure 16, has the following features: 1. File menu with a+ choice of the following: a. Load Data: load previously captured data in tab separated values (.tsv) format for analysis b. Save Data as .tsv: Save captured data in .tsv format for future analysis c. Print Front Panel Picture: use to print the front panel to default printer. d. Save Picture: use to save the current screen capture e. Exit Rev. 0 | Page 10 of 24 When hardware is connected to the USB port, the software automatically detects which generic is connected and displays in here. Without the hardware, the software can operate in standalone mode for data analysis, and the part information notes the part number pulled from the saved data file. Sampling frequency (fig says Sampling Rate?). The default sampling frequency matches the maximum sample rate of the ADC connected to the board. Users can adjust the sampling frequency; however, there are limitations around the sample frequency, where unusable sample frequencies are input, the software automatically adjusts the sample frequency accordingly. Units can be entered, such as 10k for 10,000 Hz. Because the maximum sample frequency possible is device dependent, with some of the ADCs capable of operating up to 250 kSPS, while others can run to 1.3 MSPS, the software matches the particular ADC ability. If the user enters a value larger than the ability of the existing device, the software indicates this and reverts to the maximum sample frequency. EVAL-AD7492SDZ User Guide 6. 7. Sample: to perform a single capture. Continuous: to perform a continuous capture from the ADC. Press a second time to stop sampling. Select the number of samples to analyze. There are four tabs available that display the data in different formats. These are listed here and described in more detail in the Data Capture/Waveform, AC Testing—Data Capture/Histogram, DC Testing—Data Capture/Histogram, AC Testing—Data Capture/FFT, and Data Capture/Summary sections. a. Waveform b. Histogram c. FFT d. Summary To exit the software, go to File/Exit. Within any of the chart panels, the following tools allow user control of the different chart displays: • is used for controlling the cursor, if present. • is used for zooming in and out. • is used for panning. To save plots, click on File > Save plot. DATA CAPTURE/WAVEFORM TAB Figure 17 shows the Data Capture/Waveform tab. The input signal here is a 1 kHz sine wave. The waveform analysis reports back the amplitudes recorded from the captured signal in addition to the frequency of the signal tone. 1 10493-018 4. 5. UG-371 Figure 17. Data Capture/Waveform Tab Rev. 0 | Page 11 of 24 UG-371 EVAL-AD7492SDZ User Guide 10493-019 1 Figure 18. Data Capture/Histogram Tab AC TESTING—DATA CAPTURE/HISTOGRAM TAB DC TESTING—DATA CAPTURE/HISTOGRAM TAB Figure 18 shows the Data Capture/Histogram tab. This tests the ADC for the code distribution for ac input and computes the mean and standard deviation, or transition noise of the converter, and displays the results. Raw data is captured and passed to the PC for statistical computations. To perform a histogram test, select Histogram from the test selection window and click Sample. An ac histogram needs a quality signal source applied to the input of the SK1 and SK3 connectors. Figure 18 shows the histogram for a 10 kHz sine wave applied to the ADC input, and the results calculated. More commonly, the Data Capture/Histogram tab is used for dc testing. This is where user can test the ADC for the code distribution for dc input and compute the mean and standard deviation, or transition noise of the converter, and display the results. Raw data is captured and passed to the PC for statistical computations. To perform a histogram test, select Histogram from the test selection window and click Sample. A histogram test can be performed without an external source because the evaluation board has a buffered VREF/2 source at the ADC input. To test other dc values, apply a source to the SK1 and SK3 inputs. It may be required to filter the signal to make the dc source noise compatible with that of the ADC. Number 1 in Figure 18 shows the different measured values for the data captured. Rev. 0 | Page 12 of 24 EVAL-AD7492SDZ User Guide 2 3 10493-020 1 UG-371 Figure 19. Data Capture/FFT Tab AC TESTING—DATA CAPTURE/FFT TAB Figure 19 shows the Data Capture/FFT tab This tests the traditional ac characteristics of the converter and displays a Fast Fourier Transform (FFT) of the results. As in the histogram test, raw data is captured and passed to the PC, where the FFT is performed displaying the signal-to-noise ratio (SNR), signal-tonoise-and-distortion ratio (SINAD), total harmonic distortion (THD), and spurious-free dynamic range (SFDR). To perform an ac test, apply a sinusoidal signal to the evaluation board at the SMB inputs, SK1/SK3. Low distortion, better than 100 dB, is required to allow true evaluation of the part. One possibility is to filter the input signal from the ac source. There is no suggested band-pass filter; however, take consideration in this choice. Furthermore, if using a low frequency band-pass filter when the full-scale input range is more than a few volts peak-to-peak, it is recommended to use the on-board amplifiers to amplify the signal, thus preventing the filter from distorting the input signal. Figure 19 displays the following results of the captured data: 1. 2. 3. Rev. 0 | Page 13 of 24 Shows the input signal information Displays the fundamental frequency (Fund) and amplitude in addition to the second (2nd) to fifth (5th) harmonics Displays the performance data: SNR, THD, SINAD, Peak Spurious Noise, Pk Noise Freq, and Bin Width EVAL-AD7492SDZ User Guide 10493-021 UG-371 Figure 20. Data Capture/Summary Tab DATA CAPTURE/SUMMARY TAB Figure 20 shows the Data Capture/Summary tab. The Data Capture/Summary tab captures all the display information and provides them in one panel with a synopsis of the information including key performance parameters, such as SNR and THD. Rev. 0 | Page 14 of 24 EVAL-AD7492SDZ User Guide UG-371 LOAD FILE The software can save the current captured data for later analysis to a .tsv file. In the Choose file to Write. Window, users are prompted to save to an appropriate folder location (see Figure 21). In the Choose file to Read. Window, users are prompted to load the file (see Figure 22). User may have to navigate to find these example files. The default location for the example files is: C:\Program Files\Analog Devices\AD7492\examples. 10493-022 SAVE FILE 10493-023 Figure 21. Save File Dialog Box Figure 22. Load File Dialog Box Rev. 0 | Page 15 of 24 UG-371 EVAL-AD7492SDZ User Guide 10493-024 EVALUATION BOARD SCHEMATICS AND ARTWORK 10493-025 Figure 23. Schematic Page 1 Figure 24. Schematic Page 2 Rev. 0 | Page 16 of 24 UG-371 10493-026 EVAL-AD7492SDZ User Guide Figure 25. Schematic Page 3 Rev. 0 | Page 17 of 24 EVAL-AD7492SDZ User Guide 10493-027 UG-371 10493-028 Figure 26. Schematic Page 4 Figure 27. Schematic Page 5 Rev. 0 | Page 18 of 24 UG-371 10493-029 EVAL-AD7492SDZ User Guide 10493-030 Figure 28. Schematic Page 6 Figure 29. Top Printed Circuit Board (PCB) Silkscreen Rev. 0 | Page 19 of 24 EVAL-AD7492SDZ User Guide 10493-031 UG-371 10493-032 Figure 30. Bottom PCB Silkscreen Figure 31. Layer 1 Component Side View Rev. 0 | Page 20 of 24 UG-371 10493-033 EVAL-AD7492SDZ User Guide 10493-034 Figure 32. Layer 2 Component Side View Figure 33. Layer 3 Component Side View Rev. 0 | Page 21 of 24 EVAL-AD7492SDZ User Guide 10493-035 UG-371 Figure 34. Layer 4 Component Side View Rev. 0 | Page 22 of 24 EVAL-AD7492SDZ User Guide UG-371 NOTES Rev. 0 | Page 23 of 24 UG-371 EVAL-AD7492SDZ User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG10493-0-10/12(0) Rev. 0 | Page 24 of 24
EVAL-AD7492SDZ 价格&库存

很抱歉,暂时无法提供与“EVAL-AD7492SDZ”相匹配的价格&库存,您可以联系我们找货

免费人工找货