19-4663; Rev 0; 5/09
KIT
ATION
EVALU
E
L
B
A
IL
AVA
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
The MAX8896 dual step-down converter is optimized
for powering the power amplifier (PA) and RF transceiver in WCDMA handsets. This device integrates a highefficiency PWM step-down converter (OUT1) for
medium and low-power transmission, and a 140mΩ
(typ) bypass FET to power the PA directly from the battery during high-power transmission. A second highefficiency PWM step-down converter (OUT2) supplies
power directly to a high PSRR, low output noise, 200mA
low-dropout linear regulator (LDO) to power the RF
transceiver.
Fast switching allows the use of small ceramic input and
output capacitors while maintaining low ripple voltage.
The feedback network is integrated reducing external
component count and total solution size. OUT1 uses an
analog input driven by an external DAC to control the
output voltage linearly for continuous PA power adjustment. At high duty cycle, OUT1 automatically switches to
bypass mode, connecting the input to the output through
a low-impedance (140mΩ, typ) MOSFET.
OUT2 is a 2MHz fixed-frequency, step-down converter
capable of operating at 100% duty cycle. Output accuracy is ±2% over load, line, and temperature. The output of OUT2 is preset to 3.1V to provide power to a
200mA, 2.8V LDO designed for low noise (16µVRMS,
typ), high PSRR (65dB, typ) operation. This configuration provides noise attenuation for the RF transceiver
power supply in the 100Hz to 100kHz range.
Other features include separate output enables, lowsupply current shutdown, output overcurrent, and
overtemperature protection. The MAX8896 is available
in a 16-bump, 2mm x 2mm UCSP™ package (0.7mm
max height).
Features
o PA Step-Down Converter (OUT1)
7.5µs (typ) Settling Time for 0.5V to 1V Output
Voltage Change
Dynamic Output Voltage Setting from 0.5V to
VBATT
140mΩ Bypass PFET and 100% Duty Cycle
for Low Dropout
2MHz Switching Frequency
Low Output Voltage Ripple
700mA (min) Output Drive Capability
2% Gain Accuracy
Tiny External Components
o RF Step-Down Converter (OUT2)
2MHz Fixed Switching Frequency
94% Peak Efficiency
100% Duty Cycle
2% Output Accuracy Over Load, Line, and
Temperature
200mA (min) Output Drive Capability
Tiny External Components
o Low-Noise LDO
Guaranteed 200mA Output
High 65dB (typ) PSRR
Fixed Output Voltage
Low Noise (16µVRMS, typ)
o Simple Logic ON/OFF Controls
o Low 0.1µA Shutdown Current
o 2.7V to 5.5V Supply Voltage Range
o Thermal Shutdown
o 2mm x 2mm UCSP Package (4 x 4 Grid)
Applications
Ordering Information
WCDMA/NCDMA Cellular Handsets
Smartphones
PART
MAX8896EREE+T
PIN-PACKAGE
LDO
VOLTAGE
16 UCSP (0.5mm pitch)
2.80V
Note: Device operates over the -40°C to +85°C temperature
range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
UCSP is a trademark of Maxim Integrated Products, Inc.
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
For information on other Maxim products, visit Maxim’s website at www.maxim-ic.com.
1
MAX8896
General Description
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
ABSOLUTE MAXIMUM RATINGS
VCC, IN1, IN2, PAEN, RFEN1, RFEN2,
REFIN, OUT2, REFBP to AGND .........................-0.3V to +6.0V
PAOUT to AGND........................................-0.3V to (VIN1 + 0.3V)
LDO to AGND .........................................-0.3V to (VOUT2 + 0.3V)
IN1, IN2 to VCC ......................................................-0.3V to +0.3V
IN1 to IN2 ..............................................................-0.3V to +0.3V
PGND1, PGND2 to AGND.....................................-0.3V to +0.3V
LX1 Current .......................................................................1ARMS
LX2 Current .......................................................................1ARMS
IN1 and PAOUT Current....................................................1ARMS
PAOUT, OUT2, LDO Short Circuit to PGND1,
PGND2 ....................................................................Continuous
Continuous Power Dissipation (TA = +70°C)
16-Bump UCSP (derate 12.5mW/°C above +70°C) ............1W
Junction-to-Ambient Thermal Resistance (θJA) (Note 1)...96°C/W
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Bump Temperature (soldering, reflow) ...........................+260°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a fourlayer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = VIN1 = VIN2 = VPAEN = VRFEN1 = VRFEN2 = 3.6V, VREFIN = 0.72V, TA = -40°C to +85°C, typical values are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Voltage
VCC, VIN1, VIN2
2.7
Input Undervoltage Threshold
VCC rising, 180mV typical hysteresis
2.52
5.5
V
2.63
2.70
V
Shutdown Supply Current
VPAEN = VRFEN1 = VRFEN2 = 0
TA = +25°C
0.1
4
TA = +85°C
0.1
INPUT SUPPLY
µA
LOGIC CONTROL
PAEN, RFEN1, RFEN2 Logic
Input High Voltage
2.7V ≤ VCC ≤ 5.5V
PAEN, RFEN1, RFEN2 Logic
Input Low Voltage
2.7V ≤ VCC ≤ 5.5V
1.3
0.4
V
800
1600
kΩ
TA = +25°C
0.01
1
TA = +85°C
0.1
PAEN, RFEN1, RFEN2 Internal
Pulldown Resistor
PAEN, RFEN1, RFEN2 Logic
Input Current
400
VIL = 0
V
µA
REFBP
REFBP Output Voltage
0µA ≤ IREFBP ≤ 1µA
1.237
1.250
1.263
V
THERMAL PROTECTION
Thermal Shutdown
TA rising, 20°C typical hysteresis
+160
°C
VRFEN1 = VRFEN2 = 0V, IPA = 0A,
no switching
155
µA
p-channel MOSFET switch, ILX1 = -200mA
0.16
0.40
n-channel MOSFET rectifier, ILX1 = 500mA
0.17
0.40
RL is the inductor resistance
RL/2
OUT1
Quiescent Supply Current
On-Resistance
Load Regulation
LX1 Leakage Current
2
VIN1 = 5.5V, VLX1 = 0V
TA = +25°C
0.1
TA = +85°C
1
_______________________________________________________________________________________
Ω
V/A
5
µA
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
(VCC = VIN1 = VIN2 = VPAEN = VRFEN1 = VRFEN2 = 3.6V, VREFIN = 0.72V, TA = -40°C to +85°C, typical values are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Peak Current Limit (p-Channel
MOSFET)
1200
1450
1700
mA
Valley Current Limit (n-Channel
MOSFET)
1100
1350
1600
mA
Minimum On-Time
70
Minimum Off-Time
ns
50
Power-Up Delay
From VPAEN rising to VLX1 rising
ns
50
75
µs
1.7
V
2.5
2.55
OUT1 REFIN
Common-Mode Range
REFIN-to-PAOUT Gain
0.2
VREFIN = 0.32V or 1.32V, ILX1 = 0A
2.45
Input Resistance
320
kΩ
0.396
xVCC
V
BYPASS
Bypass Mode Threshold
VREFIN falling, 150mV hysteresis
On-Resistance
p-channel MOSFET
IOUT = -90mA
Bypass Current Limit
VPAOUT = 1.5V
TA = +25°C
0.14
TA = +85°C
0.3
700
1000
1400
mA
1200
1450
1700
mA
1900
2450
3100
mA
TA = +25°C
0.01
5
TA = +85°C
1
Step-Down Current Limit in
Bypass
Total Bypass Current Limit
VPAOUT = VLX1 = 1.5V
Bypass Off-Leakage Current
VCC = VIN1 = 5.5V,
VPAOUT = 0V
Ω
µA
OUT2
Output Voltage
IOUT2 = 0 to 150mA,
VIN2 = VCC = 3.2V to 4.5V
OUT2 Leakage Current
VRFEN1 = VRFEN2 = 0
No-Load Supply Current
VPAEN = 0V, IOUT2 = 0A, switching
2.5
mA
p-channel MOSFET switch, ILX2 = -40mA
300
mΩ
n-channel MOSFET rectifier, ILX2 = 40mA
300
mΩ
On-Resistance
3.038
3.1
3.162
TA = +25°C
0.01
5
TA = +85°C
0.1
p-Channel Current-Limit
Threshold
400
450
500
V
µA
mA
n-Channel Negative Current Limit
400
mA
Maximum Duty Cycle
100
%
Minimum Duty Cycle
16.5
%
PWM Frequency
Power-Up Delay
1.8
From VRFEN1 or VRFEN2 rising to VLX2 rising
2.0
2.2
MHz
35
75
µs
_______________________________________________________________________________________
3
MAX8896
ELECTRICAL CHARACTERISTICS (continued)
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
ELECTRICAL CHARACTERISTICS (continued)
(VCC = VIN1 = VIN2 = VPAEN = VRFEN1 = VRFEN2 = 3.6V, VREFIN = 0.72V, TA = -40°C to +85°C, typical values are at TA = +25°C,
unless otherwise noted.) (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
2.744
2.800
2.856
V
250
420
750
mA
LDO
Output Voltage, VLDO
VOUT2 = 3.1V, ILDO = 1mA to 200mA
Current Limit
VOUT2 = 3.1V, VLDO = 0V
Dropout Voltage
VOUT2 = 3.1V, ILDO = 100mA
70
mV
Line Regulation
VOUT2 stepped from 3.5V to 5.5V, ILDO = 100mA
2.4
mV
Load Regulation
VOUT2 = 3.1V, ILDO stepped from 50µA to 200mA
25
mV
Power-Supply Rejection
∆VLDO/∆VOUT2
VOUT2 = 3.1V, 10Hz to 10kHz,
CLDO = 1µF, ILDO = 100mA
65
dB
Output Noise
100Hz to 100kHz,
CLDO = 1µF, ILDO = 100mA
16
µVRMS
Minimum Output Capacitance for
Stable Operation
0 < ILDO < 200mA
1
µF
Output Leakage Current
VOUT2 = 3.1V, VRFEN1 = VRFEN2 = 0V
25
nA
Power-Up Delay
From VRFEN1 or VRFEN2 rising to VLDO rising
50
µs
Note 2: All devices are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by
design.
4
_______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
OUT1 PA BYPASS MODE DROPOUT
VOLTAGE vs. PA LOAD CURRENT
40
VIN1 = 4.2V
30
95
VIN1 = 4.2V
70
EFFICIENCY (%)
50
BYPASS MODE
VIN1 = 3.6V
60
VIN1 = 3.2V
50
40
30
20
20
10
100
200
300
400
500
600
1.0
1.5
2.0
2.5
3.0
3.5
4.0
100
4.5
400
500
600
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 1.58V
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 1.18V
80
90
85
80
250
350
450
550
650
85
80
70
70
150
90
75
75
70
MAX8896 toc06
95
EFFICIENCY (%)
EFFICIENCY (%)
95
700
100
MAX8896 toc05
100
MAX8896 toc04
85
50
150
250
350
50
450
150
250
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 0.77V
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 0.56V
OUT1 PA STEP-DOWN CONVERTER
OUTPUT VOLTAGE vs. LOAD CURRENT
85
80
75
85
80
75
70
70
65
65
60
60
75
125
175
LOAD CURRENT (mA)
225
RL = 0.09Ω
1.88
1.86
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
90
MAX8896 toc09
95
90
1.90
MAX8896 toc08
100
MAX8896 toc07
95
25
300
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 2.58V
90
100
200
LOAD CURRENT (mA)
75
EFFICIENCY (%)
70
0.5
OUTPUT VOLTAGE (V)
95
50
80
LOAD CURRENT (mA)
100
EFFICIENCY (%)
700
85
75
0
0
90
RPA = 7.5Ω
10
0
MAX8896 toc03
80
VIN1 = 3.6V
100
MAX8896 oc02
VIN1 = 3.2V
60
90
EFFICIENCY (%)
DROPOUT VOLTAGE (mV)
70
100
MAX8896 toc01
80
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. LOAD CURRENT
VPA = 3.18V
OUT1 PA STEP-DOWN CONVERTER
EFFICIENCY vs. OUTPUT VOLTAGE
1.84
1.82
1.80
1.78
1.76
1.74
1.72
1.70
25
75
125
175
LOAD CURRENT (mA)
225
0
100
200
300
400
500
600
700
LOAD CURRENT (mA)
_______________________________________________________________________________________
5
MAX8896
Typical Operating Characteristics
(VCC = VIN1 = VIN2 = 3.6V, VREFIN = 0.72V, circuit of Figure 3, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VCC = VIN1 = VIN2 = 3.6V, VREFIN = 0.72V, circuit of Figure 3, TA = +25°C, unless otherwise noted.)
OUT1 PA STEP-DOWN CONVERTER OUTPUT
VOLTAGE vs. REFIN VOLTAGE
OUTPUT VOLTAGE ERROR
vs. LOAD CURRENT
VOUT = 0.56V
3
OUTPUT VOLTAGE ERROR (%)
3.5
3.0
2.5
2.0
1.5
1.0
MAX8896 toc11
4
MAX8896 toc10
4.0
OUTPUT VOLTAGE (V)
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
2
1
0
-1
VOUT = 3.18V
-2
-3
-4
0.5
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0
100 200 300 400 500 600 700 800
REFIN VOLTAGE (V)
LOAD CURRENT (mA)
OUT1 LIGHT-LOAD SWITCHING
WAVEFORMS
OUT1 HEAVY-LOAD SWITCHING
WAVEFORMS
MAX8896 toc13
MAX8896 toc12
500mA LOAD
5mA LOAD
200mA/div
ILX1
200mA/div
20mV/div
(AC-COUPLED)
VPA
20mV/div
(AC-COUPLED)
IL1
VPA
VLX1
2V/div
VLX1
2V/div
200ns/div
200ns/div
OUT1 STARTUP AND SHUTDOWN
MAX8896 toc14
VPAEN
5V/div
1V/div
VPA
IL1
500mA/div
20µs/div
6
_______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
OUT1 LINE TRANSIENT RESPONSE
OUT1 LOAD TRANSIENT RESPONSE
MAX8896 toc15
MAX8896 toc16
4.0V
500mV/div
VIN
500mA
3.5V
IOUT
VPA
10mV/div
(AC-COUPLED)
IL1
200mA/div
200mA/div
0mA
100mV/div
(AC-COUPLED)
VPA
50mA LOAD
20µs/div
10µs/div
OUT1 REFIN TRANSIENT RESPONSE
OUT1 REFIN TRANSIENT RESPONSE
WITH BYPASS EVENT
MAX8896 toc18
MAX8896 toc17
VREFIN
1.8V
0.72V
1.8V
0.2V
VREFIN
500mV/div
1V/div
0.6V
3.3V
VPA
1V/div
500mV/div
VPA
0.5V
IL1
IL1
1A/div
1A/div
2.5Ω LOAD
10µs/div
10µs/div
OUT2 EFFICIENCY
vs. LOAD CURRENT
OUT2 VOLTAGE
vs. LOAD CURRENT
VCC = 4.2V
VCC = 3.2V
60
50
40
30
20
VCC = 4.2V
3.11
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
VCC = 3.6V
70
MAX8896 toc20
90
80
3.12
MAX8896 toc19
100
3.10
3.09
VCC = 3.6V
3.08
3.07
VCC = 3.2V*
3.06
*OUT2 IN DROPOUT
3.05
10
0
3.04
0
50
100
150
LOAD CURRENT (mA)
200
0
50
100
150
200
LOAD CURRENT (mA)
_______________________________________________________________________________________
7
MAX8896
Typical Operating Characteristics (continued)
(VCC = VIN1 = VIN2 = 3.6V, VREFIN = 0.72V, circuit of Figure 3, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VCC = VIN1 = VIN2 = 3.6V, VREFIN = 0.72V, circuit of Figure 3, TA = +25°C, unless otherwise noted.)
OUT2 LIGHT-LOAD SWITCHING
WAVEFORMS
OUT2 HEAVY-LOAD SWITCHING
WAVEFORMS
MAX8896 toc21
VLX2
MAX8896 toc22
VLX2
5V/div
10mV/div
(AC-COUPLED)
VOUT2
5V/div
10mV/div
(AC-COUPLED)
VOUT2
200mA/div
IL2
200mA/div
IL2
20mA LOAD
200mA LOAD
200ns/div
200ns/div
OUT2 LINE TRANSIENT RESPONSE
OUT2 STARTUP WAVEFORM
MAX8896 toc24
MAX8896 toc23
4.0V
2V/div
VIN
500mV/div
3.5V
VOUT2
VOUT2
IL2
50mV/div
(AC-COUPLED)
200mA/div
IL2
5V/div
VRFEN_
200mA/div
20mA LOAD
10µs/div
20µs/div
OUT2 LOAD TRANSIENT RESPONSE
OUT2 DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX8896 toc25
MAX8896 toc26
0.20
VIN = 2.7V
RL = 0.3Ω
0.18
0.16
150mA
IOUT2
100mA/div
0mA
100mV/div
(AC-COUPLED)
VOUT2
DROPOUT VOLTAGE (V)
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
10µs/div
0
50
100
150
200
LOAD CURRENT (mA)
8
_______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
LDO DROPOUT VOLTAGE
vs. LOAD CURRENT
LDO OUTPUT VOLTAGE
vs. LOAD CURRENT
MAX8896 toc28
VOUT2 = 2.7V
0.18
0.16
DROPOUT VOLTAGE (V)
2.81
2.80
2.79
2.78
0.14
0.12
0.10
0.08
0.06
0.04
2.77
0.02
2.76
0
0
50
100
150
200
0
250
50
100
150
200
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LDO LOAD TRANSIENT RESPONSE
LDO STARTUP WAVEFORM
MAX8896 toc29
MAX8896 toc30
80mA
2V/div
ILDO
VRFEN1
50mA/div
10mA
2V/div
VOUT2
20mV/div
(AC-COUPLED)
VLDO
VLDO
2V/div
200mA LOAD ON LDO
4µs/div
400µs/div
LDO OUTPUT-NOISE SPECTRAL
DENSITY vs. FREQUENCY
(OUT1, OUT2, AND LDO ENABLED)
LDO OUTPUT NOISE
(OUT1, OUT2, AND LDO ENABLED)
MAX8896 toc31
10µV/div
VLDO
MAX8896 toc32
10E+3
NOISE DENSITY (nV/√Hz)
OUTPUT VOLTAGE (V)
0.20
MAX8896 toc27
2.82
1E+3
100E+0
10E+0
30mA LOAD
1E+0
400µs/div
0.01
0.1
1
10
100
1,000 10,000
FREQUENCY (kHz)
_______________________________________________________________________________________
9
MAX8896
Typical Operating Characteristics (continued)
(VCC = VIN1 = VIN2 = 3.6V, VREFIN = 0.72V, circuit of Figure 3, TA = +25°C, unless otherwise noted.)
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
MAX8896
Pin Description
PIN
10
NAME
FUNCTION
A1
REFBP
Reference Noise Bypass. Bypass REFBP to AGND with a 0.033µF ceramic capacitor to reduce noise
on the LDO output. REFBP is internally pulled down through a 1kΩ resistor during shutdown.
A2
AGND
Low-Noise Analog Ground. Connect AGND to the ground plane at a single point away from high
switching currents. See the PCB Layout section.
A3
REFIN
DAC-Controlled Input. The output of the PA step-down converter is regulated to 2.5 x VREFIN. When
VREFIN reaches 0.396 x VCC, bypass mode is enabled.
A4
PGND1
Power Ground for OUT1. Connect PGND1 to the ground plane near the input and output capacitor
grounds. See the PCB Layout section.
B1
LDO
200mA LDO Regulator Output. Bypass LDO with a 1µF ceramic capacitor as close as possible to
LDO and ground. Leave LDO unconnected if not used.
B2
PAEN
OUT1 Enable Input. Connect PAEN to IN1 or logic-high for normal operation. Connect to ground or
logic-low to shut down OUT1. Internally connected to ground through an 800kΩ resistor.
B3
RFEN2
OUT2 and LDO Enable Input. Connect RFEN1 or RFEN2 to IN2 or logic-high for normal operation.
Connect RFEN1 and RFEN2 to ground or logic-low to shut down OUT2 and the LDO. Internally
connected to ground through an 800kΩ resistor.
B4
LX1
C1
OUT2
Output of OUT2. OUT2 is also the supply voltage input for the LDO. Bypass OUT2 with a 2.2µF
ceramic capacitor as close as possible to OUT2 and PGND2.
C2
RFEN1
OUT2 and LDO Enable Input. Connect RFEN1 or RFEN2 to IN2 or logic-high for normal operation.
Connect RFEN1 and RFEN2 to ground or logic-low to shut down OUT2 and the LDO. Internally
connected to ground through an 800kΩ resistor.
C3
VCC
Supply Voltage Input for Internal Reference and Control Circuitry. Connect VCC to a battery or supply
voltage from 2.7V to 5.5V. Bypass VCC with a 0.1µF ceramic capacitor as close as possible to VCC
and AGND. Connect VCC, IN1, and IN2 to the same source.
C4
IN1
Supply Voltage Input for OUT1. Connect IN1 to a battery or supply voltage from 2.7V to 5.5V. Bypass
IN1 with a 4.7µF ceramic capacitor as close as possible to IN1 and PGND1. Connect IN1, VCC, and
IN2 to the same source.
D1
PGND2
D2
LX2
Inductor Connection. Connect an inductor from LX2 to the output of OUT2.
D3
IN2
Supply Voltage Input for OUT2. Connect IN2 to a battery or supply voltage from 2.7V to 5.5V. Bypass
IN2 with a 2.2µF ceramic capacitor as close as possible to IN2 and PGND2. Connect IN2, VCC, and
IN1 to the same source.
D4
PAOUT
Inductor Connection. Connect an inductor from LX1 to the output of OUT1.
Power Ground for OUT2. Connect PGND2 to the ground plane near the input and output capacitor
grounds. See the PCB Layout section.
PA Connection for Bypass Mode. Internally connected to IN1 using the internal bypass MOSFET
during bypass mode. PAOUT is internally connected to the feedback network for OUT1. Bypass
PAOUT with a 4.7µF ceramic capacitor as close as possible to PAOUT and PGND1.
______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
BYPASS FET
R5
R4
PA OUT
C1
VCC
MAX8896
IN1
R3
CURRENT-LIMIT
CONTROL
BIAS
PWM ERROR
COMPARATOR
AGND
R7
REFIN
OUT1
PWM LOGIC
R6
LX1
C2
EN
OUT1
EN
PGND1
STEP DOWN
CURRENT LIMIT
R2
R1
VCC
OUT2
BANDGAP
REFBP
1.25V
REFERENCE
LDO
CURRENT LIMIT
OUT1
EN
ERROR
AMP
BANDGAP
LDO
R9
PAEN
CONTROL
LOGIC
RFEN1
RFEN2
R7
IN2
EN
OUT2
PWM LOGIC
LX2
PGND2
BANDGAP
FB NETWORK/
COMPENSATION
OUT2
Figure 1. Block Diagram
______________________________________________________________________________________
11
The MAX8896 dual step-down converter is optimized
for powering the power amplifier (PA) and RF transceiver in WCDMA handsets. This device integrates a highefficiency PWM step-down converter (OUT1) for
medium and low-power transmission, and a 140mΩ
(typ) bypass FET to power the PA directly from the battery during high power transmission. A second highefficiency PWM step-down converter (OUT2) supplies
power directly to a high PSRR, low-output noise, 200mA
low-dropout linear regulator (LDO) to power the RF
transceiver.
OUT1 Step-Down Converter
A hysteretic PWM control scheme ensures high efficiency, fast switching, fast transient response, low output
ripple, and physically tiny external components. The
control scheme is simple: when the output voltage is
below the regulation threshold, the error comparator
begins a switching cycle by turning on the high-side
switch. This high-side switch remains on until the minimum on-time expires and output voltage is within regulation, or the inductor current is above the current-limit
threshold. Once off, the high-side switch remains off
until the minimum off-time expires and the output voltage falls again below the regulation threshold. During
the off period, the low-side synchronous rectifier turns
on and remains on until the high-side switch turns on
again. The internal synchronous rectifier eliminates the
need for an external Schottky diode.
Voltage-Positioning Load Regulation
The MAX8896 step-down converter utilizes a unique
feedback network. By taking DC feedback from the LX
node through R1 of Figure 1, the usual phase lag due
to the output capacitor is removed, making the loop
exceedingly stable and allowing the use of very small
ceramic output capacitors. To improve the load regulation, resistor R3 is included in the feedback. This configuration yields load regulation equal to half the
inductor’s series resistance multiplied by the load current. This voltage-positioning load regulation greatly
reduces overshoot during load transients or when
changing the output voltage from one level to another.
However, when calculating the required REFIN voltage,
the load regulation should be considered. Because
inductor resistance is typically well specified and the
typical PA is a resistive load, the VREFIN to VOUT1 gain
is slightly less than 2.5V/V. The output voltage is
approximately:
1
VOUT1 = 2.5 × VREFIN − × RL × ILOAD
2
12
Automatic Bypass Mode
During high-power transmission, the bypass mode connects IN1 directly to PAOUT with the internal 140mΩ
(typ) bypass FET, while the step-down converter is
forced into 100% duty-cycle operation. The low onresistance in this mode provides low dropout, long battery life, and high output current capability. OUT1
enters bypass mode automatically when V REFIN >
0.396 x VCC (see Figure 2). Current-limit circuitry continuously limits current through the bypass FET to
1000mA (typ). The bypass FET opens up if the voltage
at PAOUT drops below 1.25V (typ) in current limit.
OUT2 Step-Down Converter
OUT2 is a high-efficiency, 2MHz current-mode stepdown DC-DC converter that outputs 200mA with efficiency up to 94%. The output voltage of the MAX8896
is a fixed 3.1V for powering the LDO. RFEN1 and
RFEN2 are dedicated enable inputs for OUT2. Drive
RFEN1 or RFEN2 high to enable OUT2, or drive RFEN1
and RFEN2 low to disable OUT2. RFEN1 and RFEN2
have hysteresis so that an RC may be used to implement manual sequencing with respect to other inputs.
OUT2 operates with a constant 2MHz switching frequency regardless of output load. The MAX8896 regulates the output voltage by modulating the switching
duty cycle. An internal n-channel synchronous rectifier
eliminates the need for an external Schottky diode and
improves efficiency. The synchronous rectifier turns on
during the second half of each switching cycle (offtime). During this time, the voltage across the inductor
is reversed, and the inductor current ramps down. The
synchronous rectifier turns off at the end of the switching cycle.
2.5
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
1.5
1.0
VCC VOLTAGE
PAOUT
REFIN
0.5
0
0
5
10 15 20 25 30 35 40 45 50
TIME (ms)
Figure 2. Automatic Bypass
______________________________________________________________________________________
REFIN VOLTAGE (V)
Detailed Description
VCC AND PAOUT VOLTAGE
(V)
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
RP = internal p-channel MOSFET switch on-resistance
(see Electrical Characteristics)
RL = external inductor DC resistance
LDO
The LDO provides 200mA at 2.8V and is designed for
low noise (16µVRMS, typ) and high PSRR (65dB, typ).
The LDO is powered from OUT2 (3.1V) and is enabled
or disabled at the same time as OUT2 using RFEN1 or
RFEN2.
LDO Dropout Voltage
The regulator’s minimum input/output differential (or
dropout voltage) determines the lowest usable supply
voltage. In battery-powered systems, this determines
the useful end-of-life battery voltage. Because the LDO
uses a p-channel MOSFET pass transistor, the dropout
voltage is drain-to-source on-resistance (RDS(ON)) multiplied by the load current (see the Typical Operating
Characteristics).
Shutdown Mode
Connect PAEN to GND or logic-low to place OUT1 in
shutdown mode. In shutdown, the control circuitry,
internal switching MOSFET, and synchronous rectifier
turn off and LX1 becomes high impedance. Connect
PAEN to IN1, VCC, or logic-high for normal operation.
Either RFEN1 or RFEN2 enable OUT2 and the LDO.
Connect RFEN1 and RFEN2 to GND or logic-low to
place OUT2 and the LDO in shutdown mode. In shutdown, the control circuitry, internal switching MOSFET,
and synchronous rectifier turn off and LX2 and the LDO
output become high impedance. Connect RFEN1 or
RFEN2 to IN2, VCC, or logic-high for normal operation.
When PAEN, RFEN1, and RFEN2 are all logic-low, the
MAX8896 enter a very low power state, where the input
current drops to 0.1µA (typ).
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation
in the MAX8896. If the junction temperature exceeds
+160°C, the MAX8896 turn off, allowing the IC to cool.
The IC turns on and begins soft-start after the junction
temperature cools by 20°C. This results in a pulsed output during continuous thermal-overload conditions.
Applications Information
Inductor Selection
OUT1 operates with a switching frequency of 2MHz and
utilizes a 2.2µH to 4.7µH inductor. OUT2 operates with a
switching frequency of 2MHz and utilizes a 2.2µH inductor. This operating frequency allows the use of physically
small inductors while maintaining high efficiency.
The OUT1 inductor’s DC current rating only needs to
match the maximum load of the application because
OUT1 features zero current overshoot during startup and
load transients. For optimum transient response and high
efficiency, choose an inductor with DC series resistance
in the 50mΩ to 150mΩ range. See Table 1 for suggested
inductors and manufacturers.
Using a larger inductance value reduces the ripple current, therefore providing higher efficiency at light load.
Output Capacitor Selection
For OUT1 and OUT2, the output capacitor keeps the
output voltage ripple small and ensures regulation loop
stability. COUT must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R
temperature characteristics are highly recommended
due to their small size, low ESR, and small temperature
coefficients. A 4.7µF capacitor is recommended for
COUT1 and 2.2µF is recommended for COUT2. For optimum load-transient performance and very low output
ripple, the output capacitor value can be increased.
For the LDO, the minimum output capacitance required
is dependent on the load currents. For loads lighter
than 10mA, it is sufficient to use a 0.1µF capacitor for
stable operation over the full temperature range. With
rated maximum load currents, a minimum of 1µF is recommended. Larger value output capacitors further
reduce output noise and improve load-transient
response, stability, and power-supply rejection.
Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature and DC bias.
Ceramic capacitors with Z5U or Y5V temperature characteristics should be avoided. These regulators are
optimized for ceramic capacitors. Tantalum capacitors
are not recommended.
______________________________________________________________________________________
13
MAX8896
The OUT2 step-down DC-DC converter operates with
100% duty cycle when the supply voltage approaches
the output voltage. This allows this converter to maintain regulation until the input voltage falls below the
desired output voltage plus the dropout voltage specification of the converter. During 100% duty cycle operation, the high-side p-channel MOSFET turns on
constantly, connecting the input to the output through
the inductor. The dropout voltage (VDO) is calculated
as follows:
VDO = ILOAD x (RP + RL)
where:
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
2.7V TO 5.5V
VCC
MAX8896
0.1µF
IN1
4.7µF
REFIN
ANALOG
CONTROL
LX1
2MHz
OUT1
1000pF
4.7µH*
VPA
PAOUT
4.7µF
PGND1
PA ENABLE
RF ENABLE 1
RF ENABLE 2
PAEN
RFEN1
CONTROL
RFEN2
REFBP
REF
AGND
0.033µF
VRF (2.8V)
LDO
LDO
OUT2
1µF
IN2
2.2µF
2MHz
OUT2
2.2µH
BRL2012T 2R2M
LX2
OUT2
VOUT2 (3.1V)
2.2µF
PGND2
*DE2818C
Figure 3. Typical Applications Circuit
Input Capacitor Selection
The input capacitor (CIN) reduces the current peaks
drawn from the battery or input power source and
reduces switching noise in the MAX8896. The impedance of CIN at the switching frequency should be kept
very low. Ceramic capacitors with X5R or X7R temperature characteristics are highly recommended due to
their small size, low ESR, and small temperature coefficients. A 4.7µF capacitor is recommended for CIN1 and
2.2µF for CIN2. For optimum noise immunity and low
input ripple, the input capacitor value can be
increased.
14
Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature and DC bias.
Ceramic capacitors with Z5U or Y5V temperature characteristics should be avoided.
Thermal Considerations
In most applications, the MAX8896 does not dissipate
much heat due to its high efficiency. But in applications
where the MAX8896 runs at high ambient temperature
with heavy loads, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately +160°C, the thermaloverload protection is activated.
______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
PCB Layout
High switching frequencies and relatively large peak
currents make the PCB layout a very important part of
design. Good design minimizes excessive EMI on the
feedback paths and voltage gradients in the ground
plane, resulting in a stable and well regulated output.
Connect CIN1 close to IN1 and PGND1 and connect
CIN2 close to IN2 and PGND2. Connect the inductor
and output capacitor as close as possible to the IC and
keep their traces short, direct, and wide. Keep noisy
traces, such as the LX node, as short as possible. Refer
to the MAX8896EVKIT for an example layout.
______________________________________________________________________________________
15
MAX8896
The MAX8896 maximum power dissipation depends on
the thermal resistance of the IC package and circuit
board, the temperature difference between the die
junction and ambient air, and the rate of airflow. The
power dissipated in the device is:
PD = POUT1 x (1/ηOUT1 - 1) + POUT2 x (1/ηOUT2 - 1) +
ILDO x (VOUT2 - VLDO)
where η is the efficiency of the step-down converter and
POUT_ is the output power of the step-down converter.
The maximum allowed power dissipation is:
PMAX = (TJMAX - TA)/θJA
where (T JMAX - T A ) is the temperature difference
between the MAX8896 die junction and the surrounding
air, θJA is the thermal resistance of the junction through
the PCB, copper traces, and other materials to the surrounding air.
MAX8896
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
Table 1. Suggested Inductors
MANUFACTURER
SERIES
INDUCTANCE
(µH)
ESR
(Ω)
CURRENT RATING (mA)
DIMENSIONS
CB2016T
1.0
2.2
0.09
0.13
600
510
2.0mm x 1.6mm x 1.8mm
= 5.8mm3
CB2518T
2.2
4.7
0.09
0.13
510
340
2.5mm x 1.8mm x 2.0mm
= 9mm3
BRL2012T
2.2
0.30
550
2.0mm x 1.25mm x 1.0mm
= 2.5mm3
CKP2520
2.2
0.09
1300
2.5mm x 2.0mm x 1.0mm
= 5mm3
MIPF2520
1.0
1.5
2.2
0.05
0.07
0.08
1500
1500
1300
2.5mm x 2.0mm x 1.0mm
= 5mm3
MIPF2016
2.2
0.11
1100
2.0mm x 1.6mm x 1.0mm
= 3.2mm3
LQH32C_53
1.0
2.2
0.06
0.10
1000
790
3.2mm x 2.5mm x 1.7mm
= 14mm3
D3010FB
1.0
0.20
1170
3.0mm x 3.0mm x 1.0mm
= 9mm3
D2812C
1.2
2.2
0.09
0.15
860
640
3.0mm x 3.0mm x 1.2mm
= 11mm3
D310F
1.5
2.2
0.13
0.17
1230
1080
3.6mm x 3.6mm x 1.0mm
= 13mm3
D312C
1.5
2.2
0.10
0.12
1290
1140
3.6mm x 3.6mm x 1.2mm
= 16mm3
DE2818C
4.7
72
950
3.2mm x 3.0mm x 1.8mm
= 17.3mm3
CDRH2D09
1.2
1.5
2.2
0.08
0.09
0.12
590
520
440
3.0mm x 3.0mm x 1.0mm
= 9mm3
CDRH2D11
1.5
2.2
3.3
0.05
0.08
0.10
680
580
450
3.2mm x 3.2mm x 1.2mm
= 12mm3
LPO3310
1.0
1.5
2.2
0.07
0.10
0.13
1600
1400
1100
3.3mm x 3.3mm x 1.0mm
= 11mm3
XPL2010
4.7
0.284
740
1.9mm x 2.0mm x 1.0mm
= 3.8mm3
ELC3FN
1.0
2.2
0.08
0.12
1400
1000
3.2mm x 3.2mm x 1.2mm
= 12mm3
ELL3GM
1.0
2.2
0.07
0.10
1400
1100
3.2mm x 3.2mm x 1.5mm
= 15mm3
Taiyo Yuden
FDK
Murata
TOKO
Sumida
Coilcraft
Panasonic
16
______________________________________________________________________________________
Dual PWM Step-Down Converter in a 2mm x
2mm Package for WCDMA PA and RF Power
Chip Information
PROCESS: BiCMOS
TOP VIEW
(BUMPS ON BOTTOM)
MAX8896
A
B
C
D
1
2
REFBP
AGND
3
REFIN
4
Package Information
PGND1
A1
A2
A3
A4
LDO
PAEN
RFEN2
LX1
B1
B2
B3
B4
OUT2
RFEN1
VCC
IN1
C1
C2
C3
C4
PGND2
LX2
IN2
PAOUT
D1
D2
D3
D4
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
16 UCSP
R162A2+1
21-0226
16-BUMP UCSP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX8896
Pin Configuration
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