SSM2305-EVALZ

Filterless High Efficiency Mono 2.8 W Class-D Audio Amplifier SSM2305 FEATURES Filterless Class-D amplifier with Σ-Δ modulation No sync necessary when using multiple Class-D amplifiers from Analog Devices, Inc. 2.8 W into 4 Ω load and 1.6 W into 8 Ω load at 5.0 V supply with 98 dB signal-to-noise ratio (SNR) Single-supply operation from 2.5 V to 5.5 V 20 nA ultralow shutdown current Short-circuit and thermal protection Available in 8-lead, 3 mm × 3 mm LFCSP and MSOP Pop-and-click suppression Built-in resistors reduce board component count Fixed and user-adjustable gain configurations The SSM2305 features a high efficiency, low noise modulation scheme that does not require external LC output filters. The modulation provides high efficiency even at low output power. The SSM2305 operates with 90% efficiency at 1.3 W into 8 Ω or 83% efficiency at 2.2 W into 4 Ω from a 5.0 V supply and has an SNR of >98 dB. Spread-spectrum pulse density modulation is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The SSM2305 has a micropower shutdown mode with a maximum shutdown current of 30 nA. Shutdown is enabled by applying a Logic 0 to the SD pin. The device also includes pop-and-click suppression circuitry. This minimizes voltage glitches at the output during turn-on and turn-off, thus reducing audible noise on activation and deactivation. The fully differential input of the SSM2305 provides excellent rejection of common-mode noise on the input. Input coupling capacitors can be omitted if the dc input common-mode voltage is approximately VDD/2. The SSM2305 has excellent rejection of power supply noise, including noise caused by GSM transmission bursts and RF rectification. PSRR is typically 60 dB at 217 Hz. The default gain of the SSM2305 is 18 dB, but users can reduce the gain by using a pair of external resistors. The SSM2305 is specified over the commercial temperature range (−40°C to +85°C). It is available in both an 8-lead, 3 mm × 3 mm lead frame chip scale package (LFCSP) and an 8-lead mini small outline package (MSOP). APPLICATIONS Mobile phones MP3 players Portable gaming Portable electronics Educational toys GENERAL DESCRIPTION The SSM2305 is a fully integrated, high efficiency, Class-D audio amplifier designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a single 2.5 V to 5.5 V supply. It is capable of delivering 2.2 W of continuous output power with less than 1% THD + N driving a 4 Ω load from a 5.0 V supply. It has built-in thermal shutdown and output shortcircuit protection. FUNCTIONAL BLOCK DIAGRAM 10µF 0.1µF VBATT 2.5V TO 5.5V VDD OUT+ MODULATOR (Σ-Δ) FET DRIVER OUT– SSM2305 47nF* AUDIO IN+ AUDIO IN– 47nF* IN+ IN– 20kΩ 20kΩ 160kΩ 160kΩ SD BIAS INTERNAL OSCILLATOR POP/CLICK SUPPRESSION SHUTDOWN GND *INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2. Figure 1. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. 07243-001 SSM2305 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution .................................................................................. 4 Pin Configurations and Function Descriptions ........................... 5 Typical Performance Characteristics ............................................. 6 Applications Information .............................................................. 11 Overview ..................................................................................... 11 Gain .............................................................................................. 12 Pop-and-Click Suppression ...................................................... 12 Output Modulation Description .............................................. 12 Layout .......................................................................................... 12 Input Capacitor Selection .......................................................... 12 Proper Power Supply Decoupling ............................................ 13 Outline Dimensions ....................................................................... 14 Ordering Guide .......................................................................... 14 REVISION HISTORY 3/08—Revision 0: Initial Version Rev. 0 | Page 2 of 16 SSM2305 SPECIFICATIONS VDD = 5.0 V, TA = 25oC, RL = 8 Ω + 33 μH, unless otherwise noted. Table 1. Parameter DEVICE CHARACTERISTICS Output Power Symbol PO Conditions RL = 8 Ω, THD = 1%, f = 1 kHz, BW = 20 kHz, VDD = 5.0 V RL = 8 Ω, THD = 1%, f = 1 kHz, BW = 20 kHz, VDD = 3.6 V RL = 8 Ω, THD = 10%, f = 1 kHz, BW = 20 kHz, VDD = 5.0 V RL = 8 Ω, THD = 10%, f = 1 kHz, BW = 20 kHz, VDD = 3.6 V RL = 4 Ω, THD = 1%, f = 1 kHz, BW = 20 kHz, VDD = 5.0 V RL = 4 Ω, THD = 1%, f = 1 kHz, BW = 20 kHz, VDD = 3.6 V RL = 4 Ω, THD = 10%, f = 1 kHz, BW = 20 kHz, VDD = 5.0 V RL = 4 Ω, THD = 10%, f = 1 kHz, BW = 20 kHz, VDD = 3.6 V PO = 1.3 W, 8 Ω, VDD = 5.0 V PO = 1 W into 8 Ω, f = 1 kHz, VDD = 5.0 V PO = 0.5 W into 8 Ω, f = 1 kHz, VDD = 3.6 V 1.0 VCM = 2.5 V ± 100 mV at 217 Hz, output referred G = 18 dB Guaranteed from PSRR test VDD = 2.5 V to 5.0 V, dc input floating VRIPPLE = 100 mV at 217 Hz, inputs ac GND, CIN = 0.1 μF VIN = 0 V, no load, VDD = 5.0 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 5.0 V VIN = 0 V, no load, VDD = 3.6 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 3.6 V VIN = 0 V, no load, VDD = 2.5 V VIN = 0 V, load = 8 Ω + 33 μH, VDD = 2.5 V SD = GND 2.5 70 55 280 2.0 5.5 85 60 3.2 3.3 2.8 2.9 2.4 2.4 20 18 20 1.2 0.5 30 5 >100 40 98 Min Typ 1.34 0.68 1.67 0.85 2.22 1.1 2.8 1.3 89 0.02 0.02 VDD − 1 Max Unit W W W W W W W W % % % V dB kHz mV V dB dB mA mA mA mA mA mA nA dB kΩ V V ms μs kΩ μV dB Efficiency Total Harmonic Distortion + Noise Input Common-Mode Voltage Range Common-Mode Rejection Ratio Average Switching Frequency Differential Output Offset Voltage POWER SUPPLY Supply Voltage Range Power Supply Rejection Ratio Supply Current η THD + N VCM CMRRGSM fSW VOOS VDD PSRR PSRRGSM ISY Shutdown Current GAIN CONTROL Closed-Loop Gain Differential Input Impedance SHUTDOWN CONTROL Input Voltage High Input Voltage Low Wake-Up Time Shutdown Time Output Impedance NOISE PERFORMANCE Output Voltage Noise Signal-to-Noise Ratio ISD Av ZIN VIH VIL tWU tSD ZOUT en SNR SD = VDD ISY ≥ 1 mA ISY ≤ 300 nA SD rising edge from GND to VDD SD falling edge from VDD to GND SD = GND VDD = 3.6 V, f = 20 Hz to 20 kHz, inputs are ac grounded, AV = 18 dB, A weighting PO = 1.4 W, RL = 8 Ω Rev. 0 | Page 3 of 16 SSM2305 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings apply at TA = 25°C, unless otherwise noted. Table 2. Parameter Supply Voltage Input Voltage Common-Mode Input Voltage Storage Temperature Range Operating Temperature Range Junction Temperature Range Lead Temperature (Soldering, 60 sec) Rating 6V VDD VDD −65°C to +150°C −40°C to +85°C −65°C to +165°C 300°C THERMAL RESISTANCE θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. Table 3. Package Type 8-Lead, 3 mm × 3 mm LFCSP 8-Lead MSOP θJA 62 210 θJC 20.8 45 Unit °C/W °C/W ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 4 of 16 SSM2305 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS SD 1 NC 2 IN+ 3 IN– 4 PIN 1 INDICATOR SD 1 8 8 OUT– 7 GND 6 VDD 5 OUT+ 07243-002 SSM2305 TOP VIEW (Not to Scale) NC 2 IN+ 3 IN– 4 SSM2305 TOP VIEW (Not to Scale) OUT– GND OUT+ 07243-103 7 6 5 VDD NC = NO CONNECT NC = NO CONNECT Figure 2. LFSCP Pin Configuration Figure 3. MSOP Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic SD NC IN+ IN− OUT+ VDD GND OUT− Description Shutdown Input. Active low digital input. No Connect. This pin has no function, tie it to GND. Noninverting Input. Inverting Input. Noninverting Output. Power Supply. Ground. Inverting Output. Rev. 0 | Page 5 of 16 SSM2305 TYPICAL PERFORMANCE CHARACTERISTICS 100 RL = 4Ω + 33µH GAIN = 18dB 100 RL = 8Ω + 33µH GAIN = 6dB VDD = 2.5V 10 VDD = 2.5V 10 THD + N (%) THD + N (%) 1 VDD = 3.6V 0.1 1 VDD = 3.6V 0.1 VDD = 5V 0.01 VDD = 5V 07243-004 07243-007 07243-009 07243-008 0.01 0.0001 0.001 0.01 0.1 OUTPUT POWER (W) 1 10 0.001 0.0001 0.001 0.01 0.1 OUTPUT POWER (W) 1 10 Figure 4. THD + N vs. Output Power into 4 Ω + 33 μH, AV = 18 dB 100 RL = 4Ω + 33µH GAIN = 6dB 10 VDD = 2.5V Figure 7. THD + N vs. Output Power into 8 Ω + 33 μH, AV = 6 dB 100 VDD = 5V GAIN = 18dB RL = 4Ω + 33µH 2W 10 THD + N (%) THD + N (%) 1 VDD = 3.6V 1 0.1 0.1 1W 0.01 VDD = 5V 0.01 0.5W 07243-005 0.001 0.0001 0.001 0.01 0.1 OUTPUT POWER (W) 1 10 0.001 10 100 1000 FREQUENCY (Hz) 10000 100000 Figure 5. THD + N vs. Output Power into 4 Ω + 33 μH, AV = 6 dB 100 RL = 8Ω + 33µH GAIN = 18dB 10 Figure 8. THD + N vs. Frequency, VDD = 5 V, RL = 4 Ω + 33 μH, AV = 18 dB 100 100 VDD = 5V GAIN = 18dB RL = 8Ω + 33µH VDD = 2.5V 10 VDD = 3.6V THD + N (%) THD + N (%) 1 1 0.1 0.1 0.5W 1W 0.01 VDD = 5V 0.01 0.25W 0.001 0.01 0.1 OUTPUT POWER (W) 1 10 07243-006 0.001 0.0001 0.001 10 100 1000 FREQUENCY (Hz) 10000 100000 Figure 6. THD + N vs. Output Power into 8 Ω + 33 μH, AV = 18 dB Figure 9. THD + N vs. Frequency, VDD = 5 V, RL = 8 Ω + 33 μH, AV = 18 dB Rev. 0 | Page 6 of 16 SSM2305 100 VDD = 3.6V GAIN = 18dB RL = 4Ω + 33µH 100 VDD = 2.5V GAIN = 18dB RL = 8Ω + 33µH 10 10 THD + N (%) THD + N (%) 1 1W 1 0.25W 0.1 0.5W 0.1 0.01 0.25W 0.01 0.075W 0.125W 07243-010 100 1000 FREQUENCY (Hz) 10000 100000 100 1000 FREQUENCY (Hz) 10000 100000 Figure 10. THD + N vs. Frequency, VDD = 3.6 V, RL = 4 Ω + 33 μH, AV = 18 dB 100 VDD = 3.6V GAIN = 18dB RL = 8Ω + 33µH Figure 13. THD + N vs. Frequency, VDD = 2.5 V, RL = 8 Ω + 33 μH, AV = 18 dB 3.8 3.6 3.4 SUPPLY CURRENT (mA) 10 3.2 3.0 2.8 2.6 2.4 2.2 THD + N (%) 1 RL = 4Ω + 33µH RL = 8Ω + 33µH NO LOAD 0.1 0.5W 0.01 0.25W 100 1000 FREQUENCY (Hz) 10000 100000 07243-011 0.25W 0.001 10 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 SUPPLY VOLTAGE (V) Figure 11. THD + N vs. Frequency, VDD = 3.6 V, RL = 8 Ω + 33 μH, AV = 18 dB 100 VDD = 2.5V GAIN = 18dB RL = 4Ω + 33µH 0.5W THD + N (%) Figure 14. Supply Current vs. Supply Voltage 12 10 10 SHUTDOWN CURRENT (µA) 8 VDD = 5V 6 VDD = 3.6V 4 VDD = 2.5V 2 07243-015 1 0.1 0.25W 0.01 0.125W 100 1000 FREQUENCY (Hz) 10000 100000 07243-012 0.001 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 SHUTDOWN VOLTAGE (V) Figure 12. THD + N vs. Frequency, VDD = 2.5 V, RL = 4 Ω + 33 μH, AV = 18 dB Figure 15. Shutdown Current vs. Shutdown Voltage Rev. 0 | Page 7 of 16 07243-014 07243-013 0.001 10 0.001 10 SSM2305 3.0 f = 1kHz GAIN = 18dB RL = 4Ω + 33µH 1.8 1.6 1.4 f = 1kHz GAIN = 6dB RL = 8Ω + 33µH 2.5 OUTPUT POWER (W) OUTPUT POWER (W) 2.0 10% 1.2 1.0 0.8 1% 0.6 0.4 10% 1.5 1.0 1% 0.5 07243-016 07243-019 0.2 0 2.5 3.0 3.5 4.0 4.5 0 2.5 3.0 3.5 4.0 4.5 5.0 5.0 SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) Figure 16. Maximum Output Power vs. Supply Voltage, RL = 4 Ω + 33 μH, AV = 18 dB 3.0 f = 1kHz GAIN = 6dB RL = 4Ω + 33µH EFFICIENCY (%) Figure 19. Maximum Output Power vs. Supply Voltage, RL = 8 Ω + 33 μH, AV = 6 dB 100 90 80 70 VDD = 2.5V 60 50 40 30 20 07243-017 RL = 4Ω + 33µH GAIN = 18dB VDD = 5V 2.5 OUTPUT POWER (W) VDD = 3.6V 2.0 10% 1.5 1% 1.0 0.5 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 2.5 3.0 3.5 4.0 4.5 5.0 2.0 SUPPLY VOLTAGE (V) OUTPUT POWER (W) Figure 17. Maximum Output Power vs. Supply Voltage, RL = 4 Ω + 33 μH, AV = 6 dB 1.8 1.6 1.4 f = 1kHz GAIN = 18dB RL = 8Ω + 33µH EFFICIENCY (%) Figure 20. Efficiency vs. Output Power into 4 Ω + 33 μH 100 90 80 70 60 50 40 30 20 07243-018 RL = 8Ω + 33µH GAIN = 18dB VDD = 5V VDD = 3.6V VDD = 2.5V OUTPUT POWER (W) 1.2 1.0 0.8 1% 0.6 0.4 0.2 0 2.5 3.0 3.5 4.0 4.5 10% 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 5.0 SUPPLY VOLTAGE (V) OUTPUT POWER (W) Figure 18. Maximum Output Power vs. Supply Voltage, RL = 8 Ω + 33 μH, AV = 18 dB Figure 21. Efficiency vs. Output Power into 8 Ω + 33 μH Rev. 0 | Page 8 of 16 07243-021 07243-020 SSM2305 0.6 VDD = 5.0V RL = 4Ω + 33µH POWER DISSIPATION (W) 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 VDD = 3.6V RL = 8Ω + 33µH 0.5 POWER DISSIPATION (W) 0.4 0.3 0.2 0.1 07243-022 0 0 0.5 1.0 1.5 2.0 2.5 3.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 OUTPUT POWER (W) OUTPUT POWER (W) Figure 22. Power Dissipation vs. Output Power into 4 Ω + 33 μH at VDD = 5.0 V 0.20 0.18 0.16 POWER DISSIPATION (W) Figure 25. Power Dissipation vs. Output Power into 8 Ω + 33 μH at VDD = 3.6 V 800 RL = 4Ω + 33µH VDD = 5.0V RL = 8Ω + 33µH SUPPLY CURRENT (mA) 700 600 500 400 300 200 VDD = 5V 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 07243-023 VDD = 3.6V VDD = 2.5V 1.8 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 OUTPUT POWER (W) OUTPUT POWER (W) Figure 23. Power Dissipation vs. Output Power into 8 Ω + 33 μH at VDD = 5.0 V 0.40 0.35 VDD = 3.6V RL = 8Ω + 33µH Figure 26. Supply Current vs. Output Power into 4 Ω + 33 μH 450 400 350 RL = 8Ω + 33µH VDD = 5V POWER DISSIPATION (W) SUPPLY CURRENT (mA) 0.30 0.25 0.20 0.15 0.10 07243-024 VDD = 3.6V 300 250 VDD = 2.5V 200 150 100 07243-027 0.05 0 50 0 0 0.2 0.6 0.8 1.0 1.2 1.4 1.6 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.4 1.8 OUTPUT POWER (W) OUTPUT POWER (W) Figure 24. Power Dissipation vs. Output Power into 4 Ω + 33 μH at VDD = 3.6 V Figure 27. Supply Current vs. Output Power into 8 Ω + 33 μH Rev. 0 | Page 9 of 16 07243-026 100 07243-025 SSM2305 0 –10 –20 –30 PSSR (dB) 8 7 6 5 VOLTAGE (V) OUTPUT –40 –50 –60 –70 –80 –90 07243-028 4 3 2 1 0 –1 SD INPUT –100 10 100 1000 FREQUENCY (Hz) 10000 100000 –2 –10 0 10 20 30 40 50 60 70 80 90 TIME (ms) Figure 28. Power Supply Rejection Ratio vs. Frequency 0 –10 –20 –30 CMRR (dB) Figure 30. Turn-On Response 8 7 6 5 VOLTAGE (V) OUTPUT –40 –50 –60 –70 –80 –90 100 1000 FREQUENCY (Hz) 10000 100000 07243-029 4 3 2 1 0 –1 –2 –500 –400 –300 –200 –100 0 100 200 300 400 SD INPUT –100 10 500 TIME (µs) Figure 29. Common-Mode Rejection Ratio vs. Frequency Figure 31. Turn-Off Response Rev. 0 | Page 10 of 16 07243-031 07243-030 SSM2305 APPLICATIONS INFORMATION OVERVIEW The SSM2305 mono Class-D audio amplifier features a filterless modulation scheme that greatly reduces the external components count that, in turn, conserves board space thereby reducing systems cost. The SSM2305 does not require an output filter, relying instead on the inherent inductance of the speaker coil and the natural filtering of the speaker and human ear to recover fully the audio component of the square wave output. Most Class-D amplifiers use some variation of pulse-width modulation (PWM), but the SSM2305 uses Σ-Δ modulation to determine the switching pattern of the output devices resulting in EXTERNAL GAIN SETTINGS = 160kΩ/(20kΩ + REXT ) 10µF 0.1µF VBATT 2.5V TO 5.5V VDD OUT+ MODULATOR (Σ-Δ) FET DRIVER OUT– a number of important benefits. Σ-Δ modulators do not produce a sharp peak with many harmonics in the AM frequency band, as pulse-width modulators often do. Σ-Δ modulation provides the benefits of reducing the amplitude of spectral components at high frequencies, that is, reducing EMI emission that might otherwise be radiated by speakers and long cable traces. Due to the inherent spread spectrum nature of Σ-Δ modulation, the need for oscillator synchronization is eliminated for designs incorporating multiple SSM2305 amplifiers. The SSM2305 also offers protection circuits for overcurrent and temperature protection. SSM2305 AUDIO IN+ AUDIO IN– 47nF* 47nF* R EXT REXT IN+ IN– 20kΩ 20kΩ 160kΩ 160kΩ SD INTERNAL OSCILLATOR POP/CLICK SUPPRESSION SHUTDOWN BIAS GND *INPUT CAPACITORS ARE OPTIONAL IF INPUT DC COMMON-MODE VOLTAGE IS APPROXIMATELY VDD/2. Figure 32. Differential Input Configuration, User-Adjustable Gain EXTERNAL GAIN SETTINGS = 160kΩ/(20kΩ + REXT ) 10µF 0.1µF VBATT 2.5V TO 5.5V VDD OUT+ MODULATOR (Σ-Δ) FET DRIVER OUT– SSM2305 AUDIO IN+ 47nF R EXT REXT 47nF IN+ IN– 20kΩ 20kΩ 160kΩ 160kΩ SD BIAS INTERNAL OSCILLATOR POP/CLICK SUPPRESSION SHUTDOWN GND 07243-033 Figure 33. Single-Ended Input Configuration, User-Adjustable Gain Rev. 0 | Page 11 of 16 07243-032 SSM2305 GAIN The SSM2305 has a default gain of 18 dB that can be reduced by using a pair of external resistors with a value calculated as follows: External Gain Settings = 160 kΩ/(20 kΩ + REXT) LAYOUT As output power continues to increase, care needs to be taken to lay out PCB traces and wires properly between the amplifier, load, and power supply. A good practice is to use short, wide PCB tracks to decrease voltage drops and minimize inductance. Ensure that track widths are at least 200 mil for every inch of track length for lowest dc resistance (DCR), and use 1 oz or 2 oz of copper PCB traces to further reduce IR drops and inductance. A poor layout increases voltage drops, consequently affecting efficiency. Use large traces for the power supply inputs and amplifier outputs to minimize losses due to parasitic trace resistance. Proper grounding guidelines help improve audio performance, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. To maintain high output swing and high peak output power, the PCB traces that connect the output pins to the load and supply pins should be as wide as possible to maintain the minimum trace resistances. It is also recommended that a large ground plane be used for minimum impedances. In addition, good PCB layouts isolate critical analog paths from sources of high interference. Separate high frequency circuits (analog and digital) from low frequency circuits. Properly designed multilayer PCBs can reduce EMI emission and increase immunity to the RF field by a factor of 10 or more, compared with double-sided boards. A multilayer board allows a complete layer to be used for the ground plane, whereas the ground plane side of a double-sided board is often disrupted with signal crossover. If the system has separate analog and digital ground and power planes, place the analog ground plane underneath the analog power plane, and, similarly, place the digital ground plane underneath the digital power plane. There should be no overlap between analog and digital ground planes or analog and digital power planes. POP-AND-CLICK SUPPRESSION Voltage transients at the output of audio amplifiers can occur when shutdown activates or deactivates. Voltage transients as low as 10 mV can be heard as audio pops in the speaker. Clicks and pops can also be classified as undesirable audible transients generated by the amplifier system and, therefore, as not coming from the system input signal. Such transients can be generated when the amplifier system changes its operating mode. For example, the following can be sources of audible transients: system power-up/ power-down, mute/unmute, input source change, and sample rate change. The SSM2305 has a pop-and-click suppression architecture that reduces these output transients resulting in noiseless activation and deactivation. OUTPUT MODULATION DESCRIPTION The SSM2305 uses 3-level, Σ-Δ output modulation. Each output is able to swing from GND to VDD and vice versa. Ideally, when no input signal is present, the output differential voltage is 0 V because there is no need to generate a pulse. In a real-world situation, there are always noise sources present. Due to this constant presence of noise, a differential pulse generates when it is required in response to this stimulus. A small amount of current flows into the inductive load when the differential pulse is generated. However, most of the time, output differential voltage is 0 V, due to the Analog Devices patented 3-level, Σ-Δ output modulation. This feature ensures that the current flowing through the inductive load is small. When the user wants to send an input signal, an output pulse is generated to follow the input voltage. The differential pulse density is increased by raising the input signal level. Figure 34 depicts 3-level, Σ-Δ output modulation with and without input stimuli. OUTPUT = 0V +5V OUT+ 0V +5V INPUT CAPACITOR SELECTION The SSM2305 does not require input coupling capacitors if the input signal is biased from 1.0 V to VDD − 1.0 V. Input capacitors are required if the input signal is not biased within this recommended input dc common-mode voltage range, if high-pass filtering is needed, or if using a single-ended source. If high-pass filtering is needed at the input, the input capacitor, together with the input resistor of the SSM2305, form a high-pass filter whose corner frequency is determined by the following equation: fC = 1/(2π × RIN × CIN) OUT– 0V +5V VOUT OUTPUT > 0V 0V –5V +5V OUT+ 0V +5V OUT– 0V +5V VOUT 0V OUTPUT < 0V +5V OUT+ 0V +5V OUT– 0V 0V VOUT –5V Figure 34. 3-Level Σ-Δ Output Modulation With and Without Input Stimuli Rev. 0 | Page 12 of 16 07243-003 The input capacitor can significantly affect the performance of the circuit. Not using input capacitors degrades both the output offset of the amplifier and the dc PSRR performance. SSM2305 PROPER POWER SUPPLY DECOUPLING To ensure high efficiency, low total harmonic distortion (THD), and high PSRR, proper power supply decoupling is necessary. Noise transients on the power supply lines are short duration voltage spikes. Although the actual switching frequency can range from 10 kHz to 100 kHz, these spikes can contain frequency components that extend into the hundreds of megahertz. The power supply input needs to be decoupled with a good quality low ESL, low ESR capacitor, usually of around 4.7 μF. This capacitor bypasses low frequency noises to the ground plane. For high frequency transient noise, use a 0.1 μF capacitor as close as possible to the VDD pin of the device. Placing the decoupling capacitor as close as possible to the SSM2305 helps maintain efficient performance. Rev. 0 | Page 13 of 16 SSM2305 OUTLINE DIMENSIONS 3.25 3.00 SQ 2.75 0.60 MAX 0.60 MAX 5 8 0.50 BSC PIN 1 INDICATOR TOP VIEW 2.95 2.75 SQ 2.55 EXPOSED PAD (BOT TOM VIEW) 1.60 1.45 1.30 PIN 1 INDICATOR 4 1 0.90 MAX 0.85 NOM SEATING PLANE 12° MAX 0.70 MAX 0.65 TYP 0.50 0.40 0.30 0.05 MAX 0.01 NOM 1.89 1.74 1.59 Figure 35. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm × 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters 3.20 3.00 2.80 3.20 3.00 2.80 PIN 1 8 5 1 5.15 4.90 4.65 4 0.65 BSC 0.95 0.85 0.75 0.15 0.00 0.38 0.22 SEATING PLANE 1.10 MAX 8° 0° 0.80 0.60 0.40 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 36. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model SSM2305CPZ-R2 1 SSM2305CPZ-REEL1 SSM2305CPZ-REEL71 SSM2305RMZ-R21 SSM2305RMZ-REEL1 SSM2305RMZ-REEL71 SSM2305-EVALZ1 1 Temperature Range −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C −40°C to +85°C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] Evaluation Board with LFCSP Model Package Option CP-8-2 CP-8-2 CP-8-2 RM-8 RM-8 RM-8 061507-B 0.30 0.23 0.18 0.20 REF Branding Y10 Y10 Y10 Y10 Y10 Y10 Z = RoHS Compliant Part. Rev. 0 | Page 14 of 16 SSM2305 NOTES Rev. 0 | Page 15 of 16 SSM2305 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07243-0-3/08(0) Rev. 0 | Page 16 of 16