3973

3973 PRELIMINARY INFORMATION (Subject to change without notice) December 1, 2000 CHARGE PUMP DUAL DMOS FULL-BRIDGE MICROSTEPPING PWM MOTOR DRIVER Designed for pulse-width modulated (PWM) current control of bipolar microstepping stepper motors, the A3973SB and A3973SLB are capable of continuous output currents to ±1 A and operating voltages to 35 V. Internal fixed off-time PWM current-control timing circuitry can be programmed via a serial interface to operate in slow, fast, and mixed current-decay modes. The A3973SB (DIP) and the A3973SLB (SOIC) are electrically identical and differ only in package style. The desired load-current level is set via the serial port with two 6-bit linear DACs in conjunction with a reference voltage. The six bits of control allow maximum flexibility in torque control for a variety of step methods, from microstepping to full-step drive. Load current is set in 1.56% increments of the maximum value. Synchronous rectification circuitry allows the load current to flow through the low rDS(on) of the DMOS output driver during the current decay. This feature will eliminate the need for external clamp diodes in most applications, saving cost and external component count, while minimizing power dissipation. Internal circuit protection includes thermal shutdown with hysteresis, transient-suppression diodes, and crossover-current protection. Special power-up sequencing is not required. The A3973SB is supplied in a 24-lead plastic DIP with a copper batwing power tab; the A3973SLB is supplied in a 24-lead plastic SOIC with a copper batwing power tab for surface-mount applications. The power tabs are at ground potential and need no electrical isolation. Data Sheet 29319.34 VCP CP1 CP2 OUT1B LOAD SUPPLY1 GROUND GROUND SENSE1 OUT1A STROBE CLOCK DATA 1 2 3 4 5 6 7 8 9 9 10 11 12 24 23 22 21 20 19 18 17 16 OSC SLEEP VREG OUT2B LOAD SUPPLY2 GROUND GROUND SENSE2 OUT2A LOGIC SUPPLY MUX REF 6-BIT DAC & LOGIC 6-BIT DAC & LOGIC VBB1 VBB2 SERIAL PORT VDD 15 14 13 Dwg. PP-069-3 ABSOLUTE MAXIMUM RATINGS at TA = +25°C Load Supply Voltage, VBB ................ 35 V Output Current, IOUT ...................... ±1.0 A Logic Supply Voltage, VDD .............. 7.0 V Logic Input Voltage Range, VIN ................ -0.3 V to VDD + 0.3 V Reference Voltage, VREF ..................... 3 V Sense Voltage (dc), VS ................ 500 mV Package Power Dissipation, PD A3973SB ............................... 3.1 W A3973SLB ............................ 2.2 W Operating Temperature Range, TA .......................... -20°C to +85°C Junction Temperature, TJ ............. +150°C Storage Temperature Range, TS ......................... -55°C to +150°C Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150°C. FEATURES I I I I I I I I I I I I ±1 A, 35 V Continuous Output Rating Low rDS(on) DMOS Output Drivers Optimized Microstepping via 6-Bit Linear DACs Programmable Mixed, Fast, and Slow Current-Decay Modes 4 MHz Internal Oscillator for Digital Timing Serial-Interface Controls Chip Functions Synchronous Rectification for Low Power Dissipation Internal UVLO and Thermal Shutdown Circuitry Crossover-Current Protection Precision 2 V Reference Inputs Compatible with 3.3 V or 5 V Control Signals Sleep and Idle Modes Always order by complete part number, e.g., A3973SB . 3 973 DUAL DMOS FULL-BRIDGE MICROSTEPPING PWM MOTOR DRIVER FUNCTIONAL BLOCK DIAGRAM 0.22 µF 0.22 µF 22 VREG 3 CP2 2 CP1 LOGIC SUPPLY 2V 15 VDD UVLO AND FAULT DETECT REGULATOR BANDGAP VCP LOAD SUPPLY CHARGE PUMP 1 VBB1 MUX 14 5 0.22 µF 6-BIT LINEAR DAC + 6 DMOS H-BRIDGE SENSE1 VCP OUT1A 9 OSCILATOR OSC 24 PROGRAMMABLE PWM TIMER FIXED-OFF BLANK MIXED DECAY OUT1B 4 OSC SELECT/ DIVIDER SENSE1 8 CLOCK 11 DATA 12 STROBE 10 SERIAL PORT CONTROL LOGIC PHASE 1/2 SYNC. RECT. MODE SYNC. RECT. DISABLE MODE 1/2 GATE DRIVE DMOS H-BRIDGE 0.1 µF 20 VBB2 SLEEP 23 OUT2A 16 PROGRAMMABLE PWM TIMER 2V 6 FIXED-OFF BLANK MIXED DECAY OUT2B 21 REF 13 BUFFER + 6-BIT LINEAR DAC SENSE2 17 0.1 µF 6 GROUND 7 18 19 Dwg. FP-050-1 2 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright © 2000, Allegro MicroSystems, Inc. 3 973 DUAL DMOS FULL-BRIDGE MICROSTEPPING PWM MOTOR DRIVER ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 35 V, VDD = 5.0 V, VS = 0.5 V, fPWM < 50 kHz (unless otherwise noted). Limits Characteristic Load Supply Voltage Range Symbol VBB VDD IBB Test Conditions Operating During sleep mode Logic Supply Voltage Range Load Supply Current Operating fPWM < 50 kHz Operating, outputs disabled Sleep or idle mode Logic Supply Current IDD fPWM < 50 kHz Outputs off Idle mode (D0 = 1, D18 = 0) Sleep mode Output Drivers Output Leakage Current IDSS rDS(on) VF VOUT = VBB VOUT = 0 V Output On Resistance Source driver, IOUT = –1.0 A Sink driver, IOUT = 1.0 A Body Diode Forward Voltage Source diode, IF = 1.0 A Sink diode, IF = 1.0 A Control Logic Logic Input Voltage VIN(1) VIN(0) Logic Input Current OSC Input Frequency Range IIN(1) IIN(0) fOSC — ∆VIN VIN = 2.0 V VIN = 0.8 V Divide by one (D0 =1, D13 = 0, D14 = 1) OSC Input Duty Cycle Input Hysterisis 40 0.20 — — 60 0.40 % V 2.0 — — — 2.5 — —