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AOZ1342PI-1

AOZ1342PI-1

  • 厂商:

    AOSMD(美国万代)

  • 封装:

    SOIC8

  • 描述:

    IC PWR SWITCH N-CHANNEL 1:2 8SO

  • 数据手册
  • 价格&库存
AOZ1342PI-1 数据手册
AOZ1342 Dual Channel USB Switch General Description Features The AOZ1342 power-distribution switches is intended for applications where heavy capacitive loads and short-circuits are likely to be encountered. This device incorporates N-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V. z Typical 70 mΩ (NFET) z 1.5 A maximum continuous current z Two enable options: EN or EN z Vin range: 2.7 V to 5.5 V z Open Drain Fault Flag z Fault Flag deglitched (blanking time) z Thermal shutdown z Reverse current blocking z Exposed pad SO-8 package Applications The AOZ1342 offers 1.5 A of maximum continuous current. z Notebook Computers z Desktop Computers The AOZ1342 is available in an Exposed Pad SO-8 package and is rated over a -40 °C to +85 °C ambient temperature range. Typical Application VIN OUT1 IN Rx Rx LOAD Cx 0.1μF AOZ1342 Cx Vout Cx 22μF OC1 EN1/EN1 OUT2 Vout Cx 0.1μF OC2 LOAD Cx 22μF EN2/EN2 GND Rev. 1.5 July 2011 www.aosmd.com Page 1 of 12 AOZ1342 Ordering Information Maximum Continuous Current Part Number Typical Short-circuit Current Limit Channel 1 Channel 2 Channel 1 Channel 2 AOZ1341AI AOZ1341EI AOZ1341AI-1 Active Low 1A 1A 1.5 A 1.5 A Active High AOZ1341EI-1 AOZ1342PI AOZ1342PI-1 1.5 A 1.5A 2A 2A AOZ1343AI* AOZ1343EI* AOZ1343AI-1* 1.5 A 0.5A 2A AOZ1312AI-1 AOZ1310CI-1 Package SO-8 EPAD MSOP-8 EPAD SO-8 EPAD SO-8 Active High 1.5 A None 2A None Active High 0.5 A None 0.75 A None Active High Environmental EPAD MSOP-8 Active Low 0.75 A Output Discharge SO-8 Active High Active Low AOZ1343EI-1* AOZ1312EI-1 Enable Setting SO-8 No Green Product RoHS Compliant EPAD MSOP-8 SO-8 EPAD MSOP-8 SO-8 EPAD MSOP-8 SOT23-5 *Contact factory for availability AOS Green Products use reduced levels of Halogens, and are also RoHS compliant. Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information. Pin Configuration GND 1 8 OC1 IN 2 7 OUT1 EN1/EN1 3 6 OUT2 EN2/EN2 4 5 OC2 PAD Exposed Pad SO-8 (Top View) Pin Description Pin Name Pin Number GND 1 Pin Function Ground IN 2 Input voltage EN1/EN1 3 Enable input, logic high/logic low turns on power switch IN-OUT1 EN2/EN2 4 Enable input, logic high/logic low turns on power switch IN-OUT2 OC2 5 Overcurrent, open-drain output, active low, IN-OUT1 OUT2 6 Power-switch output, IN-OUT1 OUT1 7 Power-switch output, IN-OUT2 OC1 8 Overcurrent, open-drain output, active low, IN-OUT2 Rev. 1.5 July 2011 www.aosmd.com Page 2 of 12 AOZ1342 Absolute Maximum Ratings Recommended Operating Conditions Exceeding the Absolute Maximum Ratings may damage the device. The device is not guaranteed to operate beyond the Recommended Operating Conditions. Parameter Rating Parameter Input Voltage (VIN) 6V Input Voltage (VIN) Enable Voltage (VEN) 6V Junction Temperature (TJ) Storage Temperature (TS) -55 °C to +150 °C Maximum Continuous Current +2.7 V to +5.5 V -40 °C to +125 °C Package Thermal Resistance 1.5 A (1) Rating Exposed Pad SO-8 (ΘJA) 45 °C/W 2 kV ESD Rating Note: 1. Devices are inherently ESD sensitive, handling precautions are required. Human body model is a 100 pF capacitor discharging through a 1.5 kΩ resistor. Electrical Characteristics TA = 25 °C, VIN = VEN = 5.5 V, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 70 135 mΩ 0.6 1.5 ms 0.4 1 POWER SWITCH RDS(ON) tr Switch On-Resistance VIN = 2.7 V to 5 V, IO = 0.5 A/1.5 A Rise Time, Output VIN = 5.5 V CL = 1 μF, RL = 5 Ω VIN = 2.7 V tf Fall time, Output VIN = 5.5 V VIN = 2.7 V FET Leakage Current Out connect to ground, 2.7 V ≤ VIN ≤ 5.5 V, V(ENx) = VIN or V(ENx) = 0 V -40 °C ≤ TJ ≤ 125 0.05 0.5 0.05 0.5 °C(2) ms μA 1 ENABLE INPUT EN OR EN VIH High-level Input Voltage 2.7 V ≤ VIN ≤ 5.5 V VIL Low-level Input Voltage 2.7 V ≤ VIN ≤ 5.5 V 2.0 V 0.8 V II Input Current 0.5 μA ton Turn-on Time CL = 100 μF, RL = 5 Ω 3 ms toff Turn-off Time CL = 100 μF, RL = 5 Ω 10 -0.5 CURRENT LIMIT IOS IOC_TRIP Short-circuit Output Current (per Channel) V(IN) = 2.7 V to 5.5 V, OUT connected to GND, device enable into short-circuit, Channel 1 or 2 1.6 2.0 2.4 A Overcurrent Trip Threshold (per Channel) V(IN) = 5 V, current ramp (≤ 100 A/s) on OUT, Channel 1 or 2 1.6 2.2 2.5 A μA SUPPLY CURRENT TJ = 25°C Supply Current, Low-level Output No load on OUT, 2.7 V ≤ VIN ≤ 5.5 V, V(ENx) = VIN or V(ENx) = 0 V 0.5 1 (2) 0.5 5 Supply current, High-level Output TJ = 25 °C No load on OUT, V(ENx) = 0 V or V(ENx) = 5.5 V -40 °C ≤ T ≤ 125 °C(2) J 65 81 65 90 Reverse Leakage Current V(OUTx) = 5.5 V, IN = ground 0.2 Rev. 1.5 July 2011 -40 °C ≤ TJ ≤ 125 °C www.aosmd.com μA μA Page 3 of 12 AOZ1342 Electrical Characteristics (Continued) TA = 25 °C, VIN = VEN = 5.5 V, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Units 2.5 V UNDERVOLTAGE LOCKOUT Low-level voltage, IN 2.0 Hysteresis, IN 200 mV OVERCURRENT OC1 AND OC2 Output Low Voltage VOL(OCx) IO(OCx) = 5 mA Off-state Current VO(OCx) = 5 V or 3.3 V OC_L Deglitch OCx assertion or deassertion 4 8 0.4 V 1 μA 15 ms THERMAL SHUTDOWN Thermal Shutdown Threshold 135 °C Recovery from Thermal Shutdown 105 °C Hysteresis 30 °C Note: 2. Parameters are guaranteed by design only and not production tested. Rev. 1.5 July 2011 www.aosmd.com Page 4 of 12 AOZ1342 Functional Block Diagram OC1 Deglitch Thermal Shutdown EN1/EN1 Enable 1 Current Limit Gate Driver OUT1 IN OUT2 UVLO Comparator Gate Driver Current Limit 2.2 V EN2/EN2 Thermal Shutdown Enable 2 OC2 Deglitch AOZ1342 Rev. 1.5 July 2011 www.aosmd.com Page 5 of 12 AOZ1342 Functional Characteristics Figure 2. Turn-Off Delay and Fall Time with 1μF Load (Active High) Figure 1. Turn-On Delay and Rise Time with 1μF Load (Active High) RL = 5Ω CL = 1μF TA = 25°C RL = 5Ω CL = 1μF TA = 25°C EN 5V/div EN 5V/div VOUT 2V/div VOUT 2V/div 400μs/div 400μs/div Figure 4. Turn-Off Delay and Fall Time with 100μF Load (Active High) Figure 3. Turn-On Delay and Rise Time with 100μF Load (Active High) RL = 5Ω CL = 100μF TA = 25°C EN 5V/div RL = 5Ω CL = 100μF TA = 25°C EN 5V/div VOUT 2V/div VOUT 2V/div 400μs/div 400μs/div Figure 5. Short-circuit Current, Device Enable to Short (Active High) Figure 6. 0.6Ω Load Connected to Enable to Device (Active High) EN 2V/div OC 2V/div IOUT 1A/div IOUT 1A/div 400μs/div Rev. 1.5 July 2011 2ms/div www.aosmd.com Page 6 of 12 AOZ1342 Typical Characteristics Figure 7. Supply Current, Output Enabled vs. Junction Temperature Figure 8. Supply Current, Output Disabled vs. Junction Temperature 0.5 70 Supply Current (μA) 60 Supply Current (μA) Vin=5.5V Vin=5V Vin=3.3V Vin=2.5V 0.45 50 40 30 Vin=5.5V Vin=5V Vin=3.3V Vin=2.5V 20 10 0 -50 0 50 100 Junction Temperature (°C) 0.4 0.35 0.3 0.25 0.2 0.15 0.1 0.05 0 -50 150 0 50 100 Junction Temperature (°C) 150 Figure 10. UVLO Threshold vs. Junction Temperature Figure 9. Rds(on) vs. Ambient Temperature 2.30 160 2.28 140 Rising Falling 2.26 Threshold (V) Rdson (mΩ) 120 100 80 60 Vin=2.5V Vin=3.3V Vin=5V Vin=5.5V 40 20 0 -40 2.24 2.22 2.2 2.18 2.16 2.14 2.12 2.10 -20 Rev. 1.5 July 2011 0 20 40 60 Ambient Temperature (°C) 80 www.aosmd.com -50 0 50 100 Junction Temperature (°C) 150 Page 7 of 12 AOZ1342 Detailed Description The AOZ1342 family of power-distribution switches are intended for applications where heavy capacitive loads and short-circuits are likely to be encountered. This device incorporates 70 mΩ N-channel MOSFET power switches for power-distribution systems that require multiple power switches in a single package. Each switch is controlled by a logic enable input. Gate drive is provided by an internal charge pump designed to control the power-switch rise times and fall times to minimize current surges during switching. The charge pump requires no external components and allows operation from supplies as low as 2.7 V. Thermal Shut-down Protection When the output load exceeds the current-limit threshold or a short is present, the device limits the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OC) logic output low. During current limit or short circuit conditions, the increasing power dissipation in the chip causes the die temperature to rise. When the die temperature reaches a certain level, the thermal shutdown circuitry will shutdown the device. The thermal shutdown will cycle repeatedly until the short circuit condition is resolved. Applications Information Input Capacitor Selection Power Dissipation Calculation The input capacitor prevents large voltage transients from appearing at the input, and provides the instantaneous current needed each time the switch turns on and to also limit input voltage drop. The input capacitor also prevents high-frequency noise on the power line from passing through the output of the power side. The choice of input capacitor is based on its ripple current and voltage ratings rather than its capacitor value. The input capacitor should be located as close as possible to the VIN pin. A 0.1 μF ceramic cap is recommended. However, a higher value capacitor will reduce the voltage drop at the input. Calculate the power dissipation for normal load condition using the following equation: The worst case power dissipation occurs when the load current hits the current limit due to over-current or short circuit faults. The power dissipation under these conditions can be calculated using the following equation: PD = (VIN – VOUT) x ILIMIT Layout Guidelines Output Capacitor Selection The output capacitor acts in a similar way. A small 0.1 μF capacitor prevents high-frequency noise from going into the system. Also, the output capacitor has to supply enough current for the large load that it may encounter during system transients. This bulk capacitor must be large enough to supply a fast transient load in order to prevent the output from dropping. Rev. 1.5 July 2011 PD = RON x (IOUT)2 Good PCB layout is important for improving the thermal and overall performance of AOZ1342. To optimize the switch response time to output short-circuit conditions, keep all traces as short as possible to reduce the effect of unwanted parasitic inductance. Place the input and output bypass capacitors as close as possible to the IN and OUT pins. The input and output PCB traces should be as wide as possible for the given PCB space. Use a ground plane to enhance the power dissipation capability of the device. www.aosmd.com Page 8 of 12 AOZ1342 USB Power Distribution Application D+ DVBUS Cx 0.1μF Cx 22μF GND D+ DVBUS Cx 0.1μF Cx 22μF GND D+ DPower Supply 10kΩ 10kΩ Cx 0.1μF AOZ1342 0.1μF VBUS OUT1 IN Cx 22μF GND OC1 USB Controller EN1/EN1 D+ OC2 DVBUS OUT2 EN2/EN2 GND Cx 0.1μF Cx 22μF GND D+ DVBUS Cx 0.1μF Cx 22μF GND D+ DVBUS Cx 0.1μF Cx 22μF GND Figure 11. Typical Six-Port USB Host/Self-Powered Hub Applications Circuitry Rev. 1.5 July 2011 www.aosmd.com Page 9 of 12 AOZ1342 Package Dimensions, Exposed Pad SO-8 Gauge plane 0.2500 D0 C L L1 E2 E1 E3 E L1' D1 Note 5 D θ 7 (4x) A2 e B A A1 Dimensions in millimeters RECOMMENDED LAND PATTERN 3.70 2.20 5.74 2.71 2.87 0.80 1.27 0.635 UNIT: mm Symbols A Min. 1.40 Nom. 1.55 A1 A2 B 0.00 1.40 0.31 0.05 1.50 0.406 C D 0.17 4.80 — 4.96 D0 D1 E e E1 E2 E3 L y θ | L1–L1' | L1 3.20 3.10 5.80 — 3.80 2.21 Max. 1.70 0.10 1.60 0.51 0.25 5.00 3.60 3.50 6.20 — 4.00 2.61 3.40 3.30 6.00 1.27 3.90 2.41 0.40 REF 1.27 0.40 0.95 0.10 — — 0° — 8° 3° 0.04 0.12 1.04 REF Dimensions in inches Symbols A A1 A2 B C D D0 D1 E e E1 E2 E3 L y θ | L1–L1' | L1 Min. 0.055 0.000 0.055 0.012 0.007 0.189 Nom. 0.061 0.002 Max. 0.067 0.004 0.059 0.016 — 0.063 0.020 0.010 0.195 0.197 0.134 0.142 0.130 0.138 0.236 0.244 0.050 — 0.153 0.157 0.095 0.103 0.016 REF 0.016 0.037 0.050 — 0.004 — 0.126 0.122 0.228 — 0.150 0.087 0° — 3° 8° 0.002 0.005 0.041 REF Notes: 1. Package body sizes exclude mold flash and gate burrs. 2. Dimension L is measured in gauge plane. 3. Tolerance 0.10mm unless otherwise specified. 4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 5. Die pad exposure size is according to lead frame design. 6. Followed from JEDEC MS-012 Rev. 1.5 July 2011 www.aosmd.com Page 10 of 12 AOZ1342 Tape and Reel Dimensions, Exposed Pad SO-8 Carrier Tape P1 D1 P2 T E1 E2 E B0 K0 A0 D0 P0 Feeding Direction UNIT: mm Package A0 B0 K0 D0 D1 E E1 E2 P0 P1 P2 T SO-8 (12mm) 6.40 ±0.10 5.20 ±0.10 2.10 ±0.10 1.60 ±0.10 1.50 ±0.10 12.00 ±0.10 1.75 ±0.10 5.50 ±0.10 8.00 ±0.10 4.00 ±0.10 2.00 ±0.10 0.25 ±0.10 Reel W1 S G N M K V R H W UNIT: mm W N Tape Size Reel Size M 12mm ø330 ø330.00 ø97.00 13.00 ±0.10 ±0.30 ±0.50 W1 17.40 ±1.00 H K ø13.00 10.60 +0.50/-0.20 S 2.00 ±0.50 G — R — V — Leader/Trailer and Orientation Trailer Tape 300mm min. or 75 empty pockets Rev. 1.5 July 2011 Components Tape Orientation in Pocket www.aosmd.com Leader Tape 500mm min. or 125 empty pockets Page 11 of 12 AOZ1342 Part Marking AOZ1342PI AOZ1342PI-1 (Exposed Pad SO-8) (Exposed Pad SO-8) Z1342PI FAYWLT Fab Code & Assembly Location Code Z1342PI1 FAYWLT Part Number Code Assembly Lot Code Fab Code & Assembly Location Code Year & Week Code Part Number Code Assembly Lot Code Year & Week Code LEGAL DISCLAIMER Applications or uses as critical components in life support devices or systems are not authorized. AOS does not assume any liability arising out of such applications or uses of its products. AOS reserves the right to make changes to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the product for their intended application. Customer shall comply with applicable legal requirements, including all applicable export control rules, regulations and limitations. AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at: http://www.aosmd.com/terms_and_conditions_of_sale LIFE SUPPORT POLICY ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. Rev. 1.5 July 2011 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.aosmd.com Page 12 of 12
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