AOZ6662DI/DI-01
EZBuckTM 2A Synchronous Buck Regulator
General Description
Features
The AOZ6662DI and AOZ6662DI-01 are high efficiency,
easy to use, 2A synchronous buck regulators at fixed
switching frequency for small form factor solution. Both
AOZ6662DI and AOZ6662DI-01 work from 4.5V to 18V
input voltage range, and provides up to 2A of continuous
output current with an output voltage adjustable down to
0.6V.
4.5V to 18V operating input voltage range
The AOZ6662DI features fixed frequency operation at
heavy load and Pulse Energy Mode (PEM) at light load,
providing best efficiency across whole load range.
AOZ6662DI light load mode:
2A continuous output current
Low on-resistance:
- 145mΩ high-side
- 90mΩ low-side
Up to 95% efficiency
- Pulse Energy Mode (PEM)
AOZ6662DI-01 light load mode:
- Fixed frequency if VOUT < 4V
The AOZ6662DI-01 features fixed frequency operation at
any load when output voltage is set to be lower than 4V.
This makes it a perfect fit for low noise audio application.
When output is set to be higher than 4V, Pulse Energy
Mode (PEM) is automatically enabled to achieve high
efficiency at standby light load. This allows flexible
solution to use a single product for multiple power rails
with different requirement.
- Pulse Energy Mode (PEM) if VOUT > 4V
87% light load efficiency at 10mA with PEM
Minimum output voltage at 0.6V
750kHz PWM operation
Fixed internal soft start
Capable to handle pre-bias start-up
Cycle-by-cycle current limit
Both AOZ6662DI and AOZ6662DI-01 come in a DFN
3mm x 3mm 8-lead package and is rated over a -40°C to
+85°C operating ambient temperature range.
Short-circuit protection
Thermal shutdown
Applications
High reliable DC/DC converters
High performance LCD TV
High performance cable modems
Typical Application
VIN
CIN
VIN
BST
CBST
EN
L1
AOZ6662DI LX
AOZ6662DI-01
COMP
R1
C2
FB
RC
GND
VCC
CC
VOUT
R2
C1
Figure 1. 2A Synchronous Buck Regulator
Rev. 1.2 January 2021
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Page 1 of 16
AOZ6662DI/AOZ6662DI-01
Ordering Information
Part Number
Temperature Range
Light Load Mode
Package
Environmental
AOZ6662DI
-40°C to +85°C
PEM
DFN3x3-8L
RoHS
AOZ6662DI-01
-40°C to +85°C
DFN3x3-8L
RoHS
PEM (VOUT > 4V)
DCM (VOUT < 4V)
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/media/AOSGreenPolicy.pdf for additional information.
Pin Configuration
GND
1
LX
2
VIN
COMP
8
BST
7
EN
3
6
FB
4
5
VCC
Thermal
PAD (9)
8-Pin 3mm x 3mm DFN
(Top View)
Pin Description
Pin Number
Pin Name
1
GND
2
LX
Switching node. Connect to main inductor terminal.
3
VIN
Supply voltage input. When VIN rises above the UVLO threshold and EN is logic high, the
device will start up.
4
COMP
5
VCC
6
FB
Feedback input. The FB pin is used to set the output voltage via a resistor voltage divider
between the output and GND.
7
EN
Enable input. Pull up EN to logic high will enable the device. Pull EN to logic low will
disable the device. If no enable control signal is available, this pin can be connected
directly to VIN to enable the part. Do not leave it open.
8
BST
Bootstrap input for high-side driver. Connect a capacitor to LX. Typical value is 0.1µF.
9
Thermal PAD
Rev. 1.2 January 2021
Pin Function
System ground.
External loop compensation pin. Connect RC network between COMP and GND to
compensate the control loop.
The output of LDO. Connect 1µF decoupling capacitor to GND.
This thermal pad must be connected to GND for normal operation.
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Page 2 of 16
AOZ6662DI/AOZ6662DI-01
Absolute Maximum Ratings(1)
Maximum Operating Ratings(3)
Exceeding the Absolute Maximum Ratings may damage
the device.
The device is not guaranteed to operate beyond the
Maximum Operating ratings.
Parameter
Rating
Supply Voltage (VIN)
Parameter
20V
EN to GND
-0.3V to VIN+0.3V
LX to GND
-0.7V to VIN+0.3V
LX to GND Transient (20ns)
-5V to 22V
VCC, FB to GND
-0.3V to 6V
BST to LX
+150°C
Storage Temperature (TS)
-65°C to +150°C
ESD Rating
Supply Voltage (VIN)
(2)
4.5V to 18V
Output Voltage Range
0.6V to 6V
Ambient Temperature (TA)
-40°C to +85°C
Package Thermal Resistance
DFN 3x3 (θJA)(4)
6V
Junction Temperature (TJ)
Rating
50°C/W
Notes:
3. The device is not guaranteed to operate beyond the Maximum
Operating ratings.
4. The value of θJA is measured with the device mounted on a 1-in2
FR-4 four layer board with 2oz copper and Vias, in a still air
environment with TA = 25°C. The value in any given application
depends on the user’s specification board design.
2kV
Notes:
1. Exceeding the Absolute Maximum ratings may damage the device.
2. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5k in series with 100pF.
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, L = 4.7µH, unless otherwise specified. Specifications in Bold indicate an
ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Symbol
Parameter
Conditions
VIN
Supply Voltage
VUVLO
Input Under-Voltage Lockout Threshold
VIN rising
VIN falling
Min.
Typ.
4.5
3.2
4.1
3.7
Max
Units
18
V
4.49
V
V
A
IIN
Quiescent Supply Current
IOUT = 0A, FB = 1.2V, EN > 2V
250
IOFF
Shutdown Supply Current
EN = 0V
0.1
1
A
VFB
Feedback Voltage
TA = 25°C
0.6
0.609
V
RO
Load Regulation
0.5A < IOUT < 2A
0.5
%
SV
Line Regulation
4.5V < VIN < 18V
1
%
IFB
Feedback Input Current
FB = 0.6V
VEN
Enable Threshold
EN falling
EN rising
VHYS
Enable Hysteresis
IEN
Enable Input Current
tSS
Soft Start Time
0.591
200
nA
0.6
V
V
2
350
EN = 5V
mV
2.5
4
A
3.5
5.6
ms
750
900
kHz
Modulator
fO
Switching Frequency
DMAX
Maximum Duty Cycle
TMIN
Controllable Minimum Duty Cycle
IVOUT > 0.5A
600
65
%
30
ns
4
A
Protection
ILIM
Current Limit
tOTP
Over Temperature Shutdown Limit
Temperature rising
Temperature falling
150
120
°C
°C
VOVP
Output Over-Voltage Protection
Threshold
With respect to FB
120
%
Rev. 1.2 January 2021
3
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Page 3 of 16
AOZ6662DI/AOZ6662DI-01
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, L = 4.7µH, unless otherwise specified. Specifications in Bold indicate an
ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Symbol
Parameter
Conditions
Min.
Typ.
Max
Units
Output Stage
RONHS
High-Side Switch On-Resistance
RONLS
Low-Side Switch On-Resistance
BST - LX = 5V
145
m
90
m
Functional Block Diagram
VCC
UVLO
&
POR
EN
BST
LDO
REG.
VIN
HS
BSTUVLO
LX
ISEN
SOFT
START
REF .
&
BIAS
HS
Drv
+
FB
Q1
I LIM
+
+
-
EA
PWM
–COMP
+
PWM
CNTRL
LOGIC
LX
VCC
Q2
COMP
LS
Drv
750kHz
OSCILLATOR
OTP
PEM
LOGIC
+
ZCD
-
GND
Rev. 1.2 January 2021
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Page 4 of 16
AOZ6662DI/AOZ6662DI-01
Typical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified.
Full Load Operation
Light Load Operation (AOZ6662DI)
LX
(5V/div)
LX
(5V/div)
VIN
(0.2V/div)
VIN
(0.2V/div)
IL
(1A/div)
VOUT
(50mV/div)
VOUT
(50mV/div)
IL
(1A/div)
1µs/div
1µs/div
Light Load Operation (AOZ6662DI-01)
Light Load Operation at VOUT = 5V (AOZ6662DI-01)
LX
(5V/div)
LX
(5V/div)
VIN
(0.2V/div)
VIN
(0.2V/div)
VOUT
(1V/div)
VOUT
(50mV/div)
IL
(100mA/div)
0.5µs/div
IL
(1A/div)
1µs/div
Start-up to Full Load
50% to 100% Load Transient
VIN
(5V/div)
VOUT
(0.1V/div)
VOUT
(1V/div)
I OUT
(1A/div)
IOUT
(1A/div)
0.5ms/div
5ms/div
Rev. 1.2 January 2021
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Page 5 of 16
AOZ6662DI/AOZ6662DI-01
Typical Characteristics (Continued)
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified.
PWM to PEM Transition
PEM to PWM Transition
LX
(5V/div)
LX
(5V/div)
VOUT
(0.2V/div)
VOUT
(0.2V/div)
IL
(2A/div)
IL
(2A/div)
0.5ms/div
0.5ms/div
Short Protection
Short Circuit Recovery
LX
(5V/div)
LX
(5V/div)
VOUT
(1V/div)
IL
(2A/div)
IL
(2A/div)
VOUT
(1V/div)
20ms/div
Rev. 1.2 January 2021
20ms/div
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Page 6 of 16
AOZ6662DI/AOZ6662DI-01
Typical Characteristics (Continued)
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V, unless otherwise specified.
Efficiency (AOZ6662DI-01)
100
100
90
90
80
80
Efficiency (%)
Efficiency (%)
Efficiency (AOZ6662DI)
70
60
VOUT=5V L=4.7µH
50
VOUT=3.3V L=3.3µH
40
50
30
0.1
1
10
20
0.01
I OUT (A)
Rev. 1.2 January 2021
VOUT=5V L=4.7µH
VOUT=1.2V L=2.2µH
VOUT=1.8V L=2.2µH
20
0.01
60
40
VOUT=2.5V L=3.3µH
30
70
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0.1
I OUT (A)
1
10
Page 7 of 16
AOZ6662DI/AOZ6662DI-01
Detailed Description
The AOZ6662DI and AOZ6662DI-01 are current-mode
step down regulator with integrated High-Side and LowSide power switches. The regulator operates from 4.5V
to 18V input voltage range and supplies up to 2A of load
current. Functional features such as enable control rated
up to VIN, Power-On Reset (POR), input Under-Voltage
Lockout (UVLO), output Over Voltage Protection (OVP),
internal soft-start, cycle-by-cycle current limit, and Overtemperature Protection (OTP) are built in. Both
AOZ6662DI and AOZ6662DI-01 are available in
DFN3x3-8L package.
Enable and Soft Start
Both AOZ6662DI and AOZ6662DI-01 have internal soft
start feature to limit the in-rush current and ensure the
output voltage ramps up smoothly to regulation voltage
during start up. A soft start process begins when the input
voltage rises above 4.1V and voltage on EN pin is higher
than 2V. The soft start time is pre-programmed to 3.5ms
typical.
The EN pin of the regulator is active high. The voltage at
EN pin must be above 2V to enable the device. When the
voltage at EN pin falls below 0.6V, the device is disabled.
To ensure proper operation, EN pin must be biased to
solid voltage level in either enable or disable state. EN
pin is rated up to VIN voltage. This feature allows for
simple design with EN pin directly tied to VIN to minimize
component count and system complexity, if no enable
control signal is available.
Steady-State Operation
Under heavy load steady-state conditions, the converter
operates in fixed frequency and Continuous-Conduction
Mode (CCM).
Both AOZ6662DI and AOZ6662DI-01 are using current
mode control for regulation. Inductor current is sensed
through the current being conducted by the power
MOSFET. Output voltage is determined by the external
voltage divider between VOUT, FB, and GND. The
difference of the FB voltage and internal reference
voltage is amplified by the transconductance error
amplifier. The error voltage is compared against the
current signal (sum of inductor current signal and input
ramp compensation signal) at PWM comparator stage. If
the current signal is less than the error voltage, the highside switch is turned on. The inductor current flows from
the VIN through the inductor to the VOUT. When the
current signal exceeds the error voltage, the High-Side
switch is turned off. The inductor current is freewheeling
through the Low-Side switch from GND to VOUT.
Rev. 1.2 January 2021
The internal adaptive gate drivers guarantee no turn on
overlap between High-Side and Low-Side switches to
prevent any shoot-through condition.
Comparing with non-synchronous converters using
freewheeling Schottky diodes, the AOZ6662DI and
AOZ6662DI-01 use synchronous power switch to greatly
improve the converter efficiency by reducing power loss
in the Low-Side switch.
Light Load Operation
Under low output current settings, the AOZ6662DI will
operate with pulse energy mode (PEM) to obtain high
efficiency. The main goal of PEM is to reduce the
switching loss as it is the main source of energy loss at
low load. Under this mode, the High-Side switch will not
turn off until its on-time reaches a controlled duration
which is determined by input voltage (VIN), output
voltage (VOUT), and switching frequency (fO). The LowSide switch will be turned off eventually when inductor
current is close to 0A. Both switches are off and LX is in
high impedance state until VOUT drops to a predetermined level and more energy is needed to bring the
VOUT back to regulated voltage. The High-Side switch
will then be turned on at the beginning of the clock cycle.
For low noise audio applications, the AOZ6662DI-01
version operates in Discontinuous Current Mode (DCM)
in light load but yet to maintain nominal switching
frequency when VOUT is set to lower than 4V. In this
mode, device operation still follows the mechanism
mentioned in ‘Steady-State Operation’ section. However,
the Low-Side switch will be on until inductor current
ramps down to 0A. Then both High-Side and Low-Side
switches will be held off until the next clock cycle.
Typical system has a 5V main bus which would require
the light load mode in standby to meet the energy
efficiency requirement. AOZ6662DI-01 is designed for
this system application as it would go to PEM when
VOUT is set to higher than 4V. One single AOZ6662DI01 can support multiple power rails in a system for both
always on main bus and power off sub-rails at standby.
Bootstrap Supply for High-side Switch
This converter uses a N-Channel MOSFET as the HighSide switch. Since the N-Channel MOSFET requires a
gate voltage higher than the input voltage to turn on, a
bootstrap capacitor is needed between LX pin (Pin 2) and
BST pin (Pin 8) to drive the gate of the MOSFET. The
boost capacitor is being charged while LX is low. Typical
0.1µF capacitor is recommended for most applications.
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Page 8 of 16
AOZ6662DI/AOZ6662DI-01
Application Information
Output voltage (VOUT) can be set by feeding back the
VOUT to the FB pin through a resistor divider network as
shown in Figure 1. Design starts by selecting a fixed R2
value and then calculates the required R1 using the
equation below:
R1
V OUT = FB 1 + -------
R2
(1)
Combination of R1 and R2 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss. Some standard value of R1, R2
and most used output voltage values are listed in Table 1.
Table 1. Typical Resistor Divider Values for FB Input
VOUT (V)
R1 (kΩ)
R2 (kΩ)
1.0
10
15
1.2
10
10
1.5
15
10
1.8
20
10
2.5
31.6
10
3.3
68.1
15
5.0
110
15
6.0
180
20
For any output voltage setting, minimum input voltage
supported by AOZ6662DI and AOZ6662DI-01 is
governed by maximum duty cycle allowed by the
regulator. Maximum duty cycle is input voltage
dependent, where it decreases as VIN goes lower. The
minimum input voltage required for certain output voltage
setting is shown in Figure 2.
12
10.5
9
7.5
6
4.5
0.6
1.2
1.8
2.4
3.0
3.6
4.2
4.8
5.4
6.0
VOUT (V)
Figure 2. Minimum Input Voltage Required vs.
Output Voltage Setting
Input Capacitor
Protection Features
Both AOZ6662DI and AOZ6662DI-01 has multiple
protection features to prevent system circuit damage
under abnormal conditions.
Over Current Protection (OCP)
The output current from LX pin is being monitored cycle
by cycle. If the output current exceeds the preset limit,
the switch will be turned off to prevent excessive power
being dissipated by the converter. If output drops to
certain level during OC condition, the part will shut down
and auto restart with hiccup mode.
Power-On Reset (POR)
A power-on reset circuit monitors the VIN voltage. When
the VIN voltage exceeds 4.1V, the converter starts to
operate if EN > 2V. When VIN voltage falls below 3.7V,
the converter will be shut down.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
both High-Side and Low-Side switches if the junction
temperature exceeds 150ºC. The regulator will restart
automatically under the control of soft-start circuit when
the junction temperature decreases to 120ºC.
Rev. 1.2 January 2021
Operating Range
Minimum (VIN) (V)
Output Voltage Programming
The input capacitor must be connected to the VIN pin
and GND pin to maintain steady input voltage and filter
out the pulsing input current. The voltage rating of input
capacitor must be greater than maximum input voltage
plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
V OUT V OUT
I OUT
V IN = -------------------- 1 – -------------- -------------f o C IN
V IN
V IN
(2)
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
V OUT
V OUT
I CIN RMS = I OUT ------------- 1 – --------------
–
V IN
V IN
(3)
if let m equal the conversion ratio:
V OUT
---------------- = m
V IN
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(4)
Page 9 of 16
AOZ6662DI/AOZ6662DI-01
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 3 below. It can be seen that when VOUT is half of
VIN, CIN is under the worst current stress. The worst
current stress on CIN is 0.5·IOUT.
0.5
The inductor takes the highest current in a buck circuit.
The conduction loss on inductor need to be checked for
thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. But they
cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
0.4
ICIN_RMS(m) 0.3
IO
0.2
Output Capacitor
0.1
0
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at the
highest operating temperature.
0
0.5
m
1
Figure 3. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN-RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low ESR
and high current rating. Depending on the application
circuits, other low ESR tantalum capacitor may also be
used. When selecting ceramic capacitors, X5R or X7R
type dielectric ceramic capacitors should be used for
their better temperature and voltage characteristics. Note
that the ripple current rating from capacitor manufactures
are based on certain amount of life time. Further derating may be necessary in practical design.
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be
considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
1
V OUT = I L ESR C2 + ---------------------------
8f C
o
(7)
2
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is:
V OUT
V OUT
I L = ---------------- 1 – --------------
fo L1
V IN
(5)
o
(6)
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20% to
40% of output current.
Rev. 1.2 January 2021
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is mainly
caused by capacitor value and inductor ripple current.
The output ripple voltage calculation can be simplified to:
1
V OUT = I L --------------------------8f C
The peak inductor current is:
I L
I Lpeak = I OUT + -------2
where C2 is output capacitor value and ESRC2 is the
Equivalent Series Resistor of output capacitor.
(8)
2
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
V OUT = I L ESR C 2
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(9)
Page 10 of 16
AOZ6662DI/AOZ6662DI-01
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric type
of ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current. It can
be calculated by:
I L
I CO_RMS = ---------12
GVEA is the error amplifier voltage gain, (40V/mV);
Cc is compensation capacitor in Figure1;
Both AOZ6662DI and AOZ6662DI-01 employ peak
current mode control for easy use and fast transient
response. Peak current mode control eliminates the
double pole effect of the output L&C filter. It greatly
simplifies the compensation loop design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole can be
calculated by:
(11)
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
The zero given by the external compensation network,
capacitor Cc and resistor Rc, is located at:
1
f z 2 = --------------------------------2 CC RC
(14)
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover is the also called the converter bandwidth.
Generally, a higher bandwidth means faster response to
load transient. However, the bandwidth should not be too
high because of system stability concern. When
designing the compensation loop, converter stability
under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
equal or less than 1/10 of switching frequency.
The strategy for choosing RC and CC is to set the cross
over frequency with RC and set the compensator zero
with CC. Using selected crossover frequency, fC, to
calculate RC:
V OUT
2 C2
R C = f C -------------- -------------------------G G
FB
(12)
EA
(15)
cs
where fC is desired crossover frequency. For best
Where C2 is the output filter capacitor;
performance, fc is set to be about 1/10 of
RL is load resistor value;
ESRC2 is the equivalent series resistance of
output capacitor;
The compensation design is actually to shape the
converter control loop transfer function to get desired
gain and phase. Several different types of compensation
network can be used. For most cases, a series capacitor
and resistor network connected to the COMP pin sets the
pole and zero and it is adequate for a stable high
bandwidth control loop.
Rev. 1.2 January 2021
(13)
Where GEA is the error amplifier transconductance,
(10)
Loop Compensation
1
f z 1 = -------------------------------------------2 C2 ESR C2
G EA
f p 2 = ---------------------------------------2 C C G VEA
(260µA/V);
Usually, the ripple current rating of the output capacitor is
a smaller issue because of the low current stress. When
the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
1
f p 1 = --------------------------------2 C 2 RL
Using the series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
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switching frequency;
FB is 0.6V;
GEA is the error amplifier transconductance;
(260µA/V),
GCS is the current sense circuit
transconductance, which is (4.45A/V);
Page 11 of 16
AOZ6662DI/AOZ6662DI-01
The compensation capacitor Cc and resistor Rc together
make a zero. This zero is put somewhere close to the
dominate pole fP1 but lower than 1/5 of selected
crossover frequency. CC can is selected by:
Equation above can also be simplified to:
CO RL
C C = -------------------RC
(16)
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ6662DI and AOZ6662DI-01 buck regulator
circuit, high pulsing current flows through two circuit
loops. The first loop starts from the input capacitors, to
the VIN pin, to the LX pad, to the filter inductor, to the
output capacitor and load, and then return to the input
capacitor through ground. Current flows in the first loop
when the High-Side switch is on. The second loop starts
from inductor, to the output capacitors and load, to the
Low-Side switch. Current flows in the second loop when
the Low-Side switch is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is strongly recommended to connect input
capacitor, output capacitor, and GND pin of the regulator.
In the buck regulator application, the major power
dissipating components are the AOZ6662DI or
AOZ6662DI-01 and the output inductor. The total power
dissipation of converter circuit can be measured by input
power minus output power.
(17)
P total_loss = V IN I IN – V OUT I OUT
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
P inductor_loss = I
OUT
2
R inductor 1.1
(18)
The actual junction temperature can be calculated with
power dissipation in the AOZ6662DI or AOZ6662DI-01
and thermal impedance from junction to ambient.
(19)
T junction = P total_loss – P inductor_loss JA + T A
The thermal performance of the AOZ6662DI or
AOZ6662DI-01 is strongly affected by the PCB layout.
Extra care should be taken by users during design
process to ensure that the IC will operate under the
recommended environmental conditions.
The maximum junction temperature of the regulator is
150ºC, which limits the maximum load current capability.
Rev. 1.2 January 2021
www.aosmd.com
Page 12 of 16
AOZ6662DI/AOZ6662DI-01
Layout Consideration
Both AOZ6662DI and AOZ6662DI-01 are using exposed
pad DFN3x3 package. Several layout tips are listed
below for the best electric and thermal performance.
3. Input capacitor should be connected to the VIN pin
and the GND pin as close as possible.
4. Make the current trace from LX pins to L1 to C2 to
the GND as short as possible.
1. The exposed thermal pad has to connect to ground
by PCB externally. Connect a large copper plane to
exposed thermal pad to help thermal dissipation.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT
2. Do not use thermal relief connection to the VIN and
the GND pin. Pour a maximized copper area to the
GND pin and the VIN pin to help thermal dissipation.
6. Keep sensitive signal trace far away from the LX pad.
Rev. 1.2 January 2021
www.aosmd.com
Page 13 of 16
AOZ6662DI/AOZ6662DI-01
Package Dimensions, DFN 3x3-8L
θ
RECOMMENDED LAND PATTERN
SYMBOLS
A
A1
b
c
D
D1
E
E1
E2
e
K
L
L1
θ1
DIMENSIONS IN MILLIMETERS
MIN
NOM
−−−
MAX
DIMENSIONS IN INCHES
MIN
NOM
−−−
MAX
NOTE
1. PAKCAGE BODY SIZES EXCLUDE MOLD FLASH AND GATE BURRS.
MOLD FLASH AT THE NON-LEAD SIDES SHOULD BE LESS THAN 6 MILS EACH.
2. CONTROLLING DIMENSION IS MILLIMETER.
CONVERTED INCH DIMENSIONS ARE NOT NECESSARILY EXACT.
Rev. 1.2 January 2021
www.aosmd.com
Page 14 of 16
AOZ6662DI/AOZ6662DI-01
Tape and Reel Dimensions, DFN 3x3-8L
Carrier Tape
D0
P1
D1
A-A
E1
K0
E2
E
B0
T
P0
P2
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
DFN 3x3 EP
3.40
±0.10
3.35
±0.10
1.10
±0.10
1.50
+0.10/-0
D1
1.50
+0.10/-0
E
12.00
±0.30
E1
E2
P0
P1
P2
T
1.75
±0.10
5.50
±0.05
8.00
±0.10
4.00
±0.10
2.00
±0.05
0.30
±0.05
Reel
W1
N
S
G
K
M
V
R
H
W
UNIT: mm
Tape Size Reel Size
12mm
ø330
M
ø330.0
±0.50
N
ø97.0
±1.0
W
13.0
±0.30
W1
17.4
±1.0
H
ø13.0
+0.5/-0.2
K
10.6
S
2.0
±0.5
G
—
R
—
V
—
Leader/Trailer and Orientation
Unit Per Reel:
5000pcs
Trailer Tape
300mm min.
Rev. 1.2 January 2021
Components Tape
Orientation in Pocket
www.aosmd.com
Leader Tape
500mm min.
Page 15 of 16
AOZ6662DI/AOZ6662DI-01
Part Marking
AOZ6662DI
AOZ6662DI-01
(DFN3x3)
AK0X
Year Code
Week Code
Y W L T
Part Number Code
Assembly Lot Code
Part Number
Light Load Mode
Code
AOZ6662DI
PEM
AK00
AOZ6662DI-01
PEM (VOUT > 4V)
DCM (VOUT < 4V)
AK01
LEGAL DISCLAIMER
Applications or uses as critical components in life support devices or systems are not authorized. AOS does not
assume any liability arising out of such applications or uses of its products. AOS reserves the right to make changes
to product specifications without notice. It is the responsibility of the customer to evaluate suitability of the product
for their intended application. Customer shall comply with applicable legal requirements, including all applicable
export control rules, regulations and limitations.
AOS' products are provided subject to AOS' terms and conditions of sale which are set forth at:
http://www.aosmd.com/terms_and_conditions_of_sale
LIFE SUPPORT POLICY
ALPHA AND OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.2 January 2021
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
www.aosmd.com
Page 16 of 16
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