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TISP61089MDR-S

TISP61089MDR-S

  • 厂商:

    BOURNS(伯恩斯)

  • 封装:

    SOIC8_150MIL

  • 描述:

    PROTECTOR PROGRAMMABLE SLIC 112V

  • 数据手册
  • 价格&库存
TISP61089MDR-S 数据手册
TISP61089M PROGRAMMABLE OVERVOLTAGE PROTECTOR DUAL FORWARD-CONDUCTING P-GATE THYRISTOR TISP61089M SLIC Overvoltage Protector High 70 A 5/310 Capability Dual Voltage-Programmable Protector - Supports Voltages Down to -155 V - Low 5 mA max. Gate Triggering Current - High 150 mA min. Holding Current Additional Information Click these links for more information: PRODUCT TECHNICAL INVENTORY SAMPLES SELECTOR LIBRARY Description CONTACT Agency Recognition The TISP61089M is a dual forward-conducting buffered p-gate over-voltage protector. It is designed to protect monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. The TISP61089M limits voltages that exceed the SLIC supply rail voltage. The TISP61089M parameters are specified to allow equipment compliance with Bellcore GR-1089-CORE, ITU-T K.21 and K.45 and YD/T-950. Description UL File Number: E215609 8 Pin Small-Outline (D008) Package (Top View) 1 8 K1 (Tip) 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) (Tip) The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -20 V to -155 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will then track the negative supply voltage, the overvoltage stress on the SLIC is minimized. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage on-state condition. As the overvoltage subsides, the high holding current of the crowbar helps prevent d.c. latchup. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The TISP61089M buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. The TISP61089M is available in an 8-pin plastic small-outline surface mount package. K1 (Gate) G MD6XANB NC - No internal connection Terminal typical application names shown in parenthesis Device Symbol K1 K1 A G A K2 K2 Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. SD6XAEBa How to Order Device Package TISP61089M 8 Pin Small Outline (D008) Carrier Embossed Tape Reeled Order As Marking Code TISP61089MDR-S 1089M Standard Quantity 2500 SEPTEMBER 2013 – REVISED JULY 2019 WARNING Cancer and Reproductive Harm www.P65Warnings.ca.gov *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP61089M SLIC Overvoltage Protector Absolute Maximum Ratings, TJ = 25 °C (Unless Otherwise Noted) Symbol Value Unit Repetitive peak off-state voltage, I G = 0 Rating TJ = 25 °C VDRM -170 V Repetitive peak gate-cathode voltage, VKA = 0 TJ = 25 °C VGKRM -167 V ITSP 70 120 0.1 s 11 1s ITSM 4.5 Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 μs (Bellcore GR-1089-CORE, Issue 1, November 1994, Section 4) 30 5/310 μs (ITU-T K.20/21/45, YD/T-950, open-circuit voltage wave shape 10/700 μs) 2/10 μs (Bellcore GR-1089-CORE) A Non-repetitive peak on-state current, 60 Hz (see Notes 1 and 2 and Figure 2 on Page 4) 5s A 2.4 300 s 0.95 900 s 0.93 Junction temperature Storage temperature range TJ -40 to +150 °C Tstg -40 to +150 °C NOTES: 1. Initially the protector must be in thermal equilibrium with TJ = 25 °C. The surge may be repeated after the device returns to its initial conditions. 2. The rated current values may be applied either to the Ring to Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Recommended Operating Conditions Min CG Gate decoupling capacitor Typ Max 100 Unit nF Electrical Characteristics, TJ = 25 °C (Unless Otherwise Noted) Parameter ID Off-state current Test Conditions Max Unit TJ = 25 °C -5 μA TJ = 85 °C -50 μA -112 V I F = 5 A, t w = 200 μs 3 V 2/10 μs, I F = 100 A, di/dt = 80 A/μs, R S = 50 Ω, (see Note 4) 10 V VD = VDRM, VGK = 0 2/10 μs, I TM = -100 A, di/dt = -80 A/μs, RS = 50 Ω, VGG = -100 V, (see Note 4) V(BO) Breakover voltage VF Forward voltage VFRM Peak forward recovery voltage IH Holding current IGAS Gate reverse current VGG = VGK = VGKRM, VKA = 0 IGT Gate trigger current I T = -3 A, t p(g) ≥ 20 μs, VGG = -48 V VGT Gate trigger voltage IT = -3 A, t p(g) ≥ 20 μs, VGG = -48 V CAK Min I T = -1 A, di/dt = 1A/ms, VGG = -100 V Anode-cathode off-state f = 1 MHz, V = 1 V, I = 0, (see Note 3) d G capacitance Typ -150 mA TJ = 25 °C -5 μA TJ = 85 °C -50 μA 5 mA 2.5 V VD = -3 V 100 pF VD = -48 V 50 pF NOTE: 3. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge. NOTE: 4. Voltage measurements should be made with an oscilloscope with limited bandwidth (20 MHz) to avoid high frequency noise. SEPTEMBER 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP61089M SLIC Overvoltage Protector Thermal Characteristics Parameter RθJA Junction to free air thermal resistance Test Conditions Ptot = 0.8 W, TA = 25 °C 5 cm2, FR4 PCB Min Typ Max Unit 160 °C/W Parameter Measurement Information SEPTEMBER 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP61089M SLIC Overvoltage Protector Thermal Information PEAK NON-RECURRING A.C. vs CURRENT DURATION ITSM - Peak Non-Recurrent 60 Hz Current - A T16LACAa RING AND TIP CONNECTIONS ITSM applied simultaneously to both GROUND CONNECTION Return current is twice ITSM 10 VGEN = 600 Vrms RGEN = 70 to 950 Ω VG = -48 V, TAMB = 25 °C 1 0.1 1 10 100 1000 t - Current Duration - s Figure 2. Non-Repetitive Peak On-State Current against Duration SEPTEMBER 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. TISP61089M SLIC Overvoltage Protector Applications Information Typical Applications Circuit Figure 3 shows a typical TISP61089M SLIC card protection circuit. The incoming line conductors, Ring (R) and Tip (T), connect to the relay matrix via the series overcurrent protection. Positive temperature coefficient (PTC) resistors can be used for overcurrent protection. Resistors will reduce the prospective current from the surge generator for both the TISP61089M and the ring/test protector. OVERCURRENT PROTECTION TIP WIRE RING RELAY SLIC RELAY +t° R1a 55 RING WIRE TEST RELAY S3a S1a SLIC PROTECTOR SLIC Th4 S2a Th5 +t° R1b 55 S3b S1b TISP61089M S2b C1 100 nF TEST EQUIPMENT RING GENERATOR VBAT AI6XAJd Figure 3. Typical Application Circuit Asia-Pacific: Tel: +886-2 2562-4117 • Email: asiacus@bourns.com EMEA: Tel: +36 88 885 877 • Email: eurocus@bourns.com The Americas: Tel: +1-951 781-5500 • Email: americus@bourns.com www.bourns.com “TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in the U.S. Patent and Trademark Office. “Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries. SEPTEMBER 2013 – REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. Legal Disclaimer Notice This legal disclaimer applies to purchasers and users of Bourns® products manufactured by or on behalf of Bourns, Inc. and P[ZHɉSPH[LZJVSSLJ[P]LS`¸)V\YUZ¹ Unless otherwise expressly indicated in writing, Bourns® products and data sheets relating thereto are subject to change ^P[OV\[UV[PJL
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