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bq27542-G1
SLUSC33 – APRIL 2015
bq27542-G1 Single Cell Li-Ion Battery Fuel Gauge for Battery Pack Integration
1 Features
2 Applications
•
•
•
•
•
•
1
•
•
•
•
•
•
Battery Fuel Gauge for 1-Series (1sXp) Li-Ion
Applications up to 14,500-mAh Capacity
Microcontroller Peripheral Provides:
– Accurate Battery Fuel Gauging Supports up to
14,500 mAh
– Internal or External Temperature Sensor for
Battery Temperature Reporting
– SHA-1/HMAC Authentication
– Lifetime Data Logging
– 64 Bytes of Non-Volatile Scratch Pad FLASH
Battery Fuel Gauging Based on Patented
Impedance Track™ Technology
– Models Battery Discharge Curve for Accurate
Time-To-Empty Predictions
– Automatically Adjusts for Battery Aging,
Battery Self-Discharge, and Temperature/Rate
Inefficiencies
– Low-Value Sense Resistor (5 mΩ to 20 mΩ)
Advanced Fuel Gauging Features
– Internal Short Detection
– Tab Disconnection Detection
HDQ and I2C Interface Formats for
Communication with Host System
Small 12-pin 2.50 mm × 4.00 mm SON Package
Complies with Battery Trip Point (BTP)
Requirements
Smartphones
Tablets
Digital Still and Video Cameras
Handheld Terminals
MP3 or Multimedia Players
3 Description
The Texas Instruments bq27542-G1 Li-Ion battery
fuel gauge is a microcontroller peripheral that
provides fuel gauging for single-cell Li-Ion battery
packs.
The
device
requires
little
system
microcontroller firmware development for accurate
battery fuel gauging. The fuel gauge resides within
the battery pack or on the main board of the system
with an embedded battery (non-removable).
The fuel gauge uses the patented Impedance
Track™ algorithm for fuel gauging, and provides
information such as remaining battery capacity
(mAh), state-of-charge (%), run-time to empty
(minimum), battery voltage (mV), and temperature
(°C). It also provides detections for internal short or
tab disconnection events.
The fuel gauge also features integrated support for
secure battery pack authentication, using theSHA1/HMAC authentication algorithm.
Device Information (1)
PART NUMBER
bq27542-G1
(1)
PACKAGE
SON (12)
BODY SIZE (NOM)
2.50 mm x 4.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
4 Simplified Schematic
Battery Pack
PACK+
VCC
REGIN
LDO
REG25
BAT
SE
SE
HDQ
HDQ
SDA
SDA
SCL
SCL
TS
PROTECTION
IC
SRP
SRN
VSS
PACK–
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq27542-G1
SLUSC33 – APRIL 2015
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Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Schematic.............................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configurations and Functions .......................
Specifications.........................................................
1
1
1
1
2
3
3
4
9
Detailed Description ............................................ 10
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
Absolute Maximum Ratings ...................................... 4
ESD Ratings ............................................................ 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Electrical Characteristics: Power-On Reset .............. 5
2.5-V LDO Regulator ............................................... 5
Internal Temperature Sensor Characteristics ........... 5
Internal Clock Oscillators .......................................... 5
Integrating ADC (Coulomb Counter) Characteristics 6
ADC (Temperature and Cell Voltage)
Characteristics ........................................................... 6
8.11 Data Flash Memory Characteristics........................ 6
8.12 Timing Requirements .............................................. 6
8.13 Timing Requirements: HDQ Communication ......... 7
8.14 Timing Requirements: I2C-Compatible Interface .... 8
8.15 Typical Characteristics ............................................ 9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
Programming...........................................................
Power Control .........................................................
Autocalibration ........................................................
Communications .....................................................
10
11
12
14
16
17
18
18
10 Application and Implementation........................ 22
10.1 Application Information.......................................... 22
10.2 Typical Application ................................................ 22
10.3 Application Curves ............................................... 27
11 Power Supply Recommendations ..................... 28
12 Layout................................................................... 28
12.1 Layout Guidelines ................................................ 28
12.2 Layout Example .................................................... 29
13 Device and Documentation Support ................. 30
13.1
13.2
13.3
13.4
13.5
Documentation Support ........................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
30
30
30
30
30
14 Mechanical, Packaging, and Orderable
Information ........................................................... 30
5 Revision History
2
DATE
REVISION
NOTES
April 2015
*
Initial Release
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6 Device Comparison Table
PRODUCTION
PART NO. (1)
bq27542DRZR-G1
bq27542DRZT-G1
(1)
PACKAGE
TA
COMMUNICATION
FORMAT
SON-12
–40°C to 85°C
I2C, HDQ (1)
TAPE AND REEL
QUANTITY
3000
250
2
The bq27542-G1 device is shipped in I C mode.
7 Pin Configurations and Functions
(Top View)
SE
1
12
HDQ
REG25
2
11
SCL
REGIN
3
10
SDA
BAT
4
9
TS
VCC
5
8
SRN
VSS
6
7
SRP
Pin Functions
PIN
NAME
NUMBER
TYPE (1)
DESCRIPTION
BAT
4
I
HDQ
12
I/O
REG25
2
P
2.5-V output voltage of the internal integrated LDO. Connect a minimum 0.47-μF ceramic capacitor.
REGIN
3
P
The input voltage for the internal integrated LDO. Connect a 0.1-μF ceramic capacitor.
SCL
11
I
Slave I2C serial communications clock input line for communication with the system (slave). Open-drain
I/O. Use with a 10-kΩ pullup resistor (typical).
SDA
10
I/O
Slave I2C serial communications data line for communication with the system (slave). Open-drain I/O.
Use with a 10-kΩ pullup resistor (typical).
SE
1
O
Shutdown Enable output. Push-pull output. Leave floating when it is not used.
SRN
8
IA
Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRN is
nearest the PACK– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
SRP
7
IA
Analog input pin connected to the internal coulomb counter with a Kelvin connection where SRP is
nearest the CELL– connection. Connect to 5-mΩ to 20-mΩ sense resistor.
TS
9
IA
Pack thermistor voltage sense (use 103AT-type thermistor). ADC input
VCC
5
P
Processor power input. The minimum 0.47-μF capacitor connected to REG25 should be close to VCC.
VSS
6
P
Device ground
(1)
Cell-voltage measurement input. ADC input. Decouple with 0.1-μF capacitor.
HDQ serial communications line (Slave). Open-drain. Use with 10-kΩ pullup resistor (typical) or leave
floating when it is not used.
I/O = Digital input/output, IA = Analog input, P = Power connection
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8 Specifications
8.1 Absolute Maximum Ratings
Over-operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VI
Regulator input, REGIN
–0.3
24
V
VCC
Supply voltage range
–0.3
2.75
V
VIOD
Open-drain I/O pins (SDA, SCL, HDQ)
–0.3
6
V
VBAT
BAT input (pin 4)
–0.3
6
V
VI
Input voltage range to all others (pins 1, 7, 8, 9)
–0.3
VCC + 0.3
V
TF
Functional temperature range
–40
100
°C
Tstg
Storage temperature
–65
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
8.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Human-body model (HBM), per
ANSI/ESDA/JEDEC JS-001 (1)
All pins except 4 (BAT)
±2000
Pin 4 (BAT)
±1500
Charged-device model (CDM), per JEDEC
specification JESD22-C101 (2)
All pins
Electrostatic discharge
UNIT
V
±250
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
8.3 Recommended Operating Conditions
TA = -40°C to 85°C; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V (unless otherwise noted)
MIN
No operating restrictions
VI
Supply voltage, REGIN
ICC
Normal operating mode current (1)
Fuel gauge in NORMAL mode
ILOAD > Sleep Current
I(SLP)
Low-power operating mode current (1)
I(FULLSLP)
No FLASH writes
NOM
MAX
2.7
5.5
2.45
2.7
UNIT
V
131
μA
Fuel gauge in SLEEP mode
ILOAD < Sleep Current
60
μA
Low-power operating mode current (1)
Fuel gauge in FULLSLEEP mode
ILOAD < Sleep Current
21
μA
I(HIB)
Hibernate operating mode current (1)
Fuel gauge in HIBERNATE mode
Available in I2C mode only.
ILOAD < Hibernate Current
6
μA
VOL
Output voltage low (HDQ, SDA, SCL, SE) IOL = 3 mA
VOH(PP)
Output high voltage (SE)
IOH = –1 mA
VCC – 0.5
V
VOH(OD)
Output high voltage (HDQ, SDA, SCL)
External pullup resistor connected to
VCC
VCC – 0.5
V
VIL
Input voltage low (HDQ, SDA, SCL)
VIH
Input voltage high (HDQ, SDA, SCL)
V(A1)
Input voltage range (TS)
V(A2)
Input voltage range (BAT)
V(A3)
Input voltage range (SRP, SRN)
Ilkg
Input leakage current (I/O pins)
tPUCD
Power-up communication delay
(1)
4
0.4
V
–0.3
0.6
V
1.2
6
V
VSS – 0.125
2
V
VSS – 0.125
5
V
VSS – 0.125
0.125
V
0.3
250
μA
ms
Specified by design. Not tested in production.
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8.4 Thermal Information
Over-operating free-air temperature range (unless otherwise noted)
bq27542-G1
THERMAL METRIC
(1)
DRZ
UNIT
(12 PINS)
RθJA
Junction-to-ambient thermal resistance
64.1
RθJC(top)
Junction-to-case (top) thermal resistance
59.8
RθJB
Junction-to-board thermal resistance
52.7
ψJT
Junction-to-top characterization parameter
0.3
ψJB
Junction-to-board characterization parameter
28.3
RθJC(bot)
Junction-to-case (bottom) thermal resistance
2.4
(1)
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
8.5 Electrical Characteristics: Power-On Reset
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIT+
Positive-going battery voltage input at VCC
VHYS
Power-on reset hysteresis
MIN
TYP
MAX
2.05
2.20
2.31
UNIT
V
115
mV
8.6 2.5-V LDO Regulator (1)
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
VO
IOS (2)
(1)
(2)
TEST CONDITIONS
2.7 V ≤ V(REGIN) ≤ 5.5 V,
Regulator output voltage, IOUT ≤ 16 mA
REG25
2.45 V ≤ V(REGIN) < 2.7 V (low
battery), IOUT ≤ 3 mA
TA = –40°C to
85°C
Short circuit current limit
TA = –40°C to
85°C
V(REG25) = 0 V
MIN
TYP
MAX
2.4
2.5
2.6
UNIT
V
2.4
V
250
mA
LDO output current, IOUT, is the total load current. LDO regulator should be used to power internal fuel gauge only.
Specified by design. Not production tested.
8.7 Internal Temperature Sensor Characteristics
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
G(TEMP)
TEST CONDITIONS
MIN
Temperature sensor voltage gain
TYP
MAX
–2.0
UNIT
mV/°C
8.8 Internal Clock Oscillators
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < (V(REGIN) = VBAT) < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6
V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
f(OSC)
Operating frequency
8.389
MHz
f(LOSC)
Operating frequency
32.768
kHz
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8.9 Integrating ADC (Coulomb Counter) Characteristics
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
VIN(SR)
Input voltage range, V(SRN) and V(SRP)
VSR = V(SRN) – V(SRP)
tCONV(SR)
Conversion time
Single conversion
Resolution
VOS(SR)
Input offset
INL
Integral nonlinearity error
ZIN(SR)
Effective input resistance (1)
Ilkg(SR)
Input leakage current (1)
(1)
MIN
TYP
–0.125
MAX
UNIT
0.125
V
1
14
s
15
bits
±0.034
FSR
μV
10
±0.007
2.5
MΩ
0.3
μA
Specified by design. Not production tested.
8.10 ADC (Temperature and Cell Voltage) Characteristics
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
VIN(ADC)
Input voltage range
tCONV(ADC)
Conversion time
TEST CONDITIONS
MIN
TYP
MAX
–0.2
Resolution
1
14
UNIT
V
125
ms
15
bits
VOS(ADC)
Input offset
1
mV
Z(ADC1)
Effective input resistance (TS) (1)
5
kΩ
Z(ADC2)
Effective input resistance (BAT) (1)
Ilkg(ADC)
Input leakage current (1)
bq27542-G1 not measuring cell
voltage
8
bq27542-G1 measuring cell voltage
(1)
MΩ
100
kΩ
0.3
μA
Specified by design. Not production tested.
8.11 Data Flash Memory Characteristics
TA = –40°C to 85°C, C(REG) = 0.47 μF, 2.45 V < V(REGIN) = VBAT < 5.5 V; typical values at TA = 25°C and V(REGIN) = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
Data retention (1)
tDR
Flash programming write-cycles (1)
TYP
Word programming time
ICCPROG
Flash-write supply current (1)
MAX
UNIT
10
Years
20,000
Cycles
(1)
tWORDPROG
(1)
MIN
5
2
ms
10
mA
Specified by design. Not production tested.
8.12 Timing Requirements
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
MAX
UNIT
tr
SCL/SDA rise time
PARAMETER
300
ns
tf
SCL/SDA fall time
300
ns
tw(H)
SCL pulse width (high)
600
ns
tw(L)
SCL pulse width (low)
1.3
μs
tsu(STA)
Setup for repeated start
600
ns
td(STA)
Start to first falling edge of SCL
600
ns
tsu(DAT)
Data setup time
1000
ns
th(DAT)
Data hold time
0
ns
6
TEST CONDITIONS
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MIN
NOM
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Timing Requirements (continued)
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
tsu(STOP)
Setup time for stop
tBUF
Bus free time between stop and start
fSCL
Clock frequency
MIN
NOM
MAX
600
UNIT
ns
μs
66
400
kHz
8.13 Timing Requirements: HDQ Communication
TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
205
250
μs
μs
t(CYCH)
Cycle time, host to bq27542-G1
190
t(CYCD)
Cycle time, bq27542-G1 to host
190
t(HW1)
Host sends 1 to bq27542-G1
0.5
50
μs
t(DW1)
bq27542-G1 sends 1 to host
32
50
μs
t(HW0)
Host sends 0 to bq27542-G1
86
145
μs
t(DW0)
bq27542-G1 sends 0 to host
80
145
μs
t(RSPS)
Response time, bq27542-G1 to host
190
950
μs
t(B)
Break time
190
t(BR)
Break recovery time
t(RISE)
HDQ line rising time to logic 1 (1.2 V)
t(TRND)
Turnaround time (time from the falling edge of the last
transmitted bit of 8-bit data and the falling edge of the
next Break signal)
μs
μs
40
950
ns
μs
210
1.2V
t(BR)
t(B)
t(RISE)
(b) HDQ line rise time
(a) Break and Break Recovery
t(DW1)
t(HW1)
t(DW0)
t(CYCD)
t(HW0)
t(CYCH)
(d) Gauge Transmitted Bit
(c) Host Transmitted Bit
Break
7-bit address
1-bit
R/W
8-bit data
t(RSPS)
(e) Gauge to Host Response
Figure 1. Timing Diagram, HDQ
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8.14 Timing Requirements: I2C-Compatible Interface
TA = –40°C to 85°C, CREG = 0.47μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
NOM
MAX
UNIT
300
ns
300
ns
tr
SCL/SDA rise time
tf
SCL/SDA fall time
tw(H)
SCL pulse width (high)
600
ns
tw(L)
SCL pulse width (low)
1.3
μs
tsu(STA)
Setup for repeated start
600
ns
td(STA)
Start to first falling edge of SCL
tsu(DAT)
Data setup time
th(DAT)
Data hold time
tsu(STOP)
Setup time for stop
tBUF
Bus free time between stop and start
fSCL
Clock frequency
600
ns
1000
ns
0
ns
600
ns
66
μs
400
tSU(STA)
tw(H)
tf
tw(L)
tr
kHz
t(BUF)
SCL
SDA
td(STA)
tsu(STOP)
tf
tr
th(DAT)
tsu(DAT)
REPEATED
START
STOP
START
Figure 2. I2C-Compatible Interface Timing Diagrams
8
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2.58
32.8
2.56
32.75
2.54
32.7
L F O (kH Z )
R E G 2 5 O u tp u t (V )
8.15 Typical Characteristics
2.52
2.5
2.48
32.6
32.55
2.46
2.44
-40
32.65
32.5
I OUT = 16 mA, REGIN = 5 V
I OUT = 3 mA, REGIN = 2.7 V
-20
0
20
40
Temperature (qC)
60
80
32.45
-40
100
-20
0
D001
Figure 3. REG25 vs. Temperature
20
40
Temperature (qC)
60
80
100
D002
Figure 4. Low Frequency Oscillator vs. Temperature
8.4
8.395
H F O (M H Z )
8.39
8.385
8.38
8.375
8.37
8.365
-40
-20
0
20
40
Temperature (qC)
60
80
100
D003
Figure 5. High Frequency Oscillator vs. Temperature
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9 Detailed Description
9.1 Overview
The bq27542-G1 fuel gauge accurately predicts the battery capacity and other operational characteristics of a
single Li-based rechargeable cell. It can be interrogated by a system processor to provide cell information, such
as state-of-charge (SOC), time-to-empty (TTE), and time-to-full (TTF).
To minimize power consumption, the fuel gauge has different power modes: NORMAL, SLEEP, FULLSLEEP,
and HIBERNATE. The fuel gauge passes automatically between these modes, depending upon the occurrence
of specific events, though a system processor can initiate some of these modes directly. More details can be
found in Device Functional Modes.
NOTE
The following formatting conventions are used in this document:
Commands: italics with parentheses() and no breaking spaces, for example: RemainingCapacity()
Data Flash: italics, bold, and breaking spaces, for example: Design Capacity
Register Bits and Flags: italics with brackets[ ], for example: [TDA]
Data Flash Bits: italics, bold, and brackets[ ], for example: [LED1]
Modes and States: All capitals, for example: UNSEALED mode
10
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9.2 Functional Block Diagram
REGIN
LDO
POR
REG25
VCC
HFO
BAT
SRN
CC
HFO
LFO
HFO/128
4R
HFO/128
SRP
MUX
ADC
R
Wake
Comparator
TS
Internal
Temp
Sensor
VCC
5k
HFO/4
SDA
SE
22
I2C Slave
Engine
Instruction
ROM
22
CPU
VSS
SCL
I/O
Controller
Instruction
FLASH
HDQ Slave
Engine
8
Wake
and
Watchdog
Timer
GP Timer
and
PWM
Data
SRAM
HDQ
8
Data
FLASH
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9.3 Feature Description
9.3.1 Fuel Gauging
The fuel gauge measures the cell voltage, temperature, and current to determine battery SOC based on the
Impedance Track algorithm. (Refer to the Theory and Implementation of Impedance Track Battery Fuel-Gauging
Algorithm Application Report [SLUA450] for more information.) The fuel gauge monitors charge and discharge
activity by sensing the voltage across a small-value resistor (5-mΩ to 20-mΩ, typical) between the SRP and SRN
pins and in series with the cell. By integrating the charge passing through the battery, the battery SOC is
adjusted during battery charge or discharge.
The total battery capacity is found by comparing states of charge before and after applying the load with the
amount of charge passed. When an application load is applied, the impedance of the cell is measured by
comparing the OCV obtained from a predefined function for present SOC with the measured voltage under load.
Measurements of OCV and charge integration determine chemical state of charge and chemical capacity
(Qmax). The initial Qmax values are taken from a cell manufacturers' data sheet multiplied by the number of
parallel cells. It is also used for the value in Design Capacity. The fuel gauge acquires and updates the batteryimpedance profile during normal battery usage. It uses this profile, along with SOC and the Qmax value, to
determine FullChargeCapacity() and StateOfCharge(), specifically for the present load and temperature.
FullChargeCapacity() is reported as capacity available from a fully charged battery under the present load and
temperature until Voltage() reaches the Terminate Voltage. NominalAvailableCapacity() and
FullAvailableCapacity() are the uncompensated (no or light load) versions of RemainingCapacity() and
FullChargeCapacity(), respectively.
9.3.2 Impedance Track Variables
The fuel gauge has several data flash variables that permit the user to customize the Impedance Track algorithm
for optimized performance. These variables depend on the power characteristics of the application, as well as the
cell itself.
9.3.3 System Control Function
The fuel gauge provides system control functions that allow the fuel gauge to enter SHUTDOWN mode to poweroff with the assistance of an external circuit or provide interrupt function to the system. Table 1 shows the
configurations for SE and HDQ pins.
Table 1. SE and HDQ Pin Functions
[INTSEL]
0 (default)
1
(1)
(2)
COMMUNICATION
MODE
I2C
HDQ
I2C
HDQ
SE PIN FUNCTION
Interrupt Mode
(1)
Shutdown Mode
HDQ PIN FUNCTION
Not Used
HDQ Mode (2)
Interrupt Mode
HDQ Mode (2)
[SE_EN] bit in Pack Configuration can be enabled to use [SE] and [SHUTDWN] bits in
CONTROL_STATUS() function. The SE pin shutdown function is disabled.
HDQ pin is used for communication and HDQ Host Interrupt Feature is available.
9.3.3.1 SHUTDOWN Mode
In SHUTDOWN mode, the SE pin is used to signal external circuit to power-off the fuel gauge. This feature is
useful to shut down the fuel gauge in a deeply discharged battery to protect the battery. By default, SHUTDOWN
mode is in NORMAL state. By sending the SET_SHUTDOWN subcommand or setting the [SE_EN] bit in the
Pack Configuration register, the [SHUTDWN] bit is set and enables the shutdown feature. When this feature is
enabled and [INTSEL] is set, the SE pin can be in NORMAL state or SHUTDOWN state. The SHUTDOWN state
can be entered in HIBERNATE mode (only if HIBERNATE mode is enabled due to low cell voltage). All other
power modes will default the SE pin to NORMAL state. Table 2 shows the SE pin state in NORMAL or
SHUTDOWN mode. The CLEAR_SHUTDOWN subcommand or clearing [SE_EN] bit in the Pack Configuration
register can be used to disable SHUTDOWN mode.
The SE pin will be high impedance at power-on reset (POR); the [SE_POL] does not affect the state of SE pin at
POR. Also, [SE_PU] configuration changes will only take effect after POR. In addition, the [INTSEL] only controls
the behavior of the SE pin; it does not affect the function of [SE] and [SHUTDWN] bits.
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Table 2. SE Pin State
SHUTDOWN Mode
[INTSEL] = 1 and
([SE_EN] or [SHUTDOWN] = 1)
[SE_PU]
[SE_POL]
NORMAL State
SHUTDOWN State
0
0
High Impedance
0
0
1
0
High Impedance
1
0
1
0
1
1
0
1
9.3.3.2 INTERRUPT Mode
By using the INTERRUPT mode, the system can be interrupted based on detected fault conditions, as specified
in Table 5. The SE or HDQ pin can be selected as the interrupt pin by configuring the [INTSEL] bit based on SE
and HDQ pin functions. In addition, the pin polarity and pullup (SE pin only) can be configured according to the
system's needs, as described in Table 3 or Table 4.
Table 3. SE Pin in Interrupt Mode ([INTSEL] = 0)
[SE_PU]
[INTPOL]
INTERRUPT CLEAR
INTERRUPT SET
0
0
High Impedance
0
0
1
0
High Impedance
1
0
1
0
1
1
0
1
Table 4. HDQ Pin in Interrupt Mode ([INTSEL] = 1)
[INTPOL]
INTERRUPT CLEAR
0
High Impedance
INTERRUPT SET
0
1
0
High Impedance
Table 5. Interrupt Mode Fault Conditions
INTERRUPT CONDITION
Flags() STATUS BIT
ENABLE CONDITION
COMMENT
SOC1 Set
[SOC1]
Always
This interrupt is raised when the [SOC1]
flag is set.
Battery High
[BATHI]
Always
This interrupt is raised when the [BATHI]
flag is set.
Battery Low
[BATLOW]
Always
This interrupt is raised when the
[BATLOW] flag is set.
Over-Temperature Charge
[OTC]
OT Chg Time ≠ 0
This interrupt is raised when the [OTC]
flag is set.
Over-Temperature
Discharge
[OTD]
OT Dsg Time ≠ 0
This interrupt is raised when the [OTD]
flag is set.
Internal Short Detection
[ISD]
[SE_ISD] = 1 in Pack Configuration B
This interrupt is raised when the [ISD]
flag is set.
Tab Disconnect Detection
[TDD]
[SE_TDD] = 1 in Pack Configuration B
This interrupt is raised when the [TDD]
flag is set.
Imax
[IMAX]
[IMAXEN] = 1 in Pack Configuration D
This interrupt is raised when the [IMAX]
flag is set.
[SOC1]
This interrupt is raised when
RemainingCapacity() ≤ BTPSOC1Set() or
[BTP_EN] = 1 in Pack Configuration C . RemainingCapacity() ≥ BTPSOC1Clear()
The BTP interrupt supersedes all other
during battery discharge or charge,
interrupt sources, which are unavailable
respectively. The interrupt remains
when BTP is active.
asserted until new values are written to
the BTPSOC1Set() and BTPSOC1Clear()
registers.
Battery Trip Point (BTP)
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9.4 Device Functional Modes
The fuel gauge has three power modes: NORMAL, SLEEP, and HIBERNATE.
• In NORMAL mode the fuel gauge is fully powered and can execute any allowable task.
• In SLEEP mode the fuel gauge exists in a reduced-power state, periodically taking measurements and
performing calculations.
• In HIBERNATE mode, the fuel gauge is in a very low power state, but can be awoken by communication or
certain I/O activity.
The relationship between these modes is shown in Figure 6. Details are described in the sections that follow.
POR
Exit From HIBERNATE
VCELL < POR threshold
Exit From HIBERNATE
Communication Activity
NORMAL
OR
bq27541 clears Control Status
[HIBERNATE] = 0
Recommend Host also set Control
Status [HIBERNATE] = 0
Fuel gauging and data
updated every 1s
Exit From SLEEP
Pack Configuration [SLEEP] = 0
OR
| AverageCurrent( ) | > Sleep Current
OR
Current is Detected above IWAKE
Entry to SLEEP
Pack Configuration [SLEEP] = 1
AND
| AverageCurrent( ) |≤ Sleep Current
SLEEP
Fuel gauging and data
updated every 20 seconds
HIBERNATE
Wakeup From HIBERNATE
Communication Activity
AND
Comm address is NOT for bq27541
Disable all bq27541
subcircuits except GPIO.
Entry to WAITFULLSLEEP
If Full Sleep Wait Time > 0, Exit From WAITFULLSLEEP
Entry to FULLSLEEP
Guage ignores Control Status Any Communication Cmd
If Full Sleep Wait Time = 0,
[FULLSLEEP]
Host must set Control Status
[FULLSLEEP]=1
Exit From WAIT_HIBERNATE
Cell not relaxed
OR
| AverageCurrent() | =>Hibernate Current
Exit From WAIT_HIBERNATE
VCELL < Hibernate Voltage
(Supports SE pin shutdown function)
WAITFULLSLEEP
FULLSLEEP Count Down
Entry to FULLSLEEP
Count 0) or be cleared (Full Sleep Wait Time ≤ 0) after exit of FULLSLEEP mode.
Therefore, EVSW communication activity might cause the gauge to exit FULLSLEEP MODE and display the
[FULLSLEEP] bit as clear. The execution of SET_FULLSLEEP to set [FULLSLEEP] bit is required when Full
Sleep Wait Time ≤ 0 in order to re-enter FULLSLEEP mode.
While in FULLSLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the
comm line(s) low. This delay is necessary to correctly process host communication, since the fuel gauge
processor is mostly halted in SLEEP mode.
The fuel gauge exits FULLSLEEP if any entry condition is broken, specifically when: (1) AverageCurrent() rises
above Sleep Current, or (2) a current in excess of IWAKE through RSENSE is detected when the IWAKE comparator
is enabled.
9.4.4 HIBERNATE Mode
HIBERNATE mode should be used for long-term pack storage or when the host system needs to enter a lowpower state, and minimal gauge power consumption is required. This mode is ideal when the host is set to its
own HIBERNATE, SHUTDOWN, or OFF modes. The gauge waits to enter HIBERNATE mode until it has taken a
valid OCV measurement (cell relaxed) and the value of the average cell current has fallen below Hibernate
Current. When the conditions are met, the fuel gauge can enter HIBERNATE due to either low cell voltage or by
having the [HIBERNATE] bit of the CONTROL_STATUS register set. The gauge will remain in HIBERNATE
mode until any communication activity appears on the communication lines and the address is for bq27541. In
addition, the SE pin shutdown mode function is supported only when the fuel gauge enters HIBERNATE due to
low cell voltage.
When the gauge wakes up from HIBERNATE mode, the [HIBERNATE] bit of the CONTROL_STATUS register is
cleared. The host is required to set the bit to allow the gauge to re-enter HIBERNATE mode if desired.
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Device Functional Modes (continued)
Because the fuel gauge is dormant in HIBERNATE mode, the battery should not be charged or discharged in this
mode, because any changes in battery charge status will not be measured. If necessary, the host equipment can
draw a small current (generally infrequent and less than 1 mA, for purposes of low-level monitoring and
updating); however, the corresponding charge drawn from the battery will not be logged by the gauge. Once the
gauge exits to NORMAL mode, the IT algorithm will take about 3 seconds to re-establish the correct battery
capacity and measurements, regardless of the total charge drawn in HIBERNATE mode. During this period of reestablishment, the gauge reports values previously calculated prior to entering HIBERNATE mode. The host can
identify exit from HIBERNATE mode by checking if Voltage() < Hibernate Voltage or [HIBERNATE] bit is cleared
by the gauge.
If a charger is attached, the host should immediately take the fuel gauge out of HIBERNATE mode before
beginning to charge the battery. Charging the battery in HIBERNATE mode will result in a notable gauging error
that will take several hours to correct. It is also recommended to minimize discharge current during exit from
HIBERNATE.
9.5 Programming
9.5.1 Standard Data Commands
The fuel gauge uses a series of 2-byte standard commands to enable system reading and writing of battery
information. Each standard command has an associated command-code pair, as indicated in Table 6. Each
protocol has specific means to access the data at each Command Code. DataRAM is updated and read by the
gauge only once per second. Standard commands are accessible in NORMAL operation mode.
Table 6. Standard Commands
COMMAND CODE
UNIT
SEALED ACCESS
Control()
COMMAND NAME
0x00 and 0x01
—
RW
AtRate()
0x02 and 0x03
mA
RW
UnfilteredSOC()
0x04 and 0x05
%
R
Temperature()
0x06 and 0x07
0.1°K
R
Voltage()
0x08 and 0x09
mV
R
Flags()
0x0A and 0x0B
—
R
NomAvailableCapacity()
0x0C and 0x0D
mAh
R
FullAvailableCapacity()
0x0E and 0x0F
mAh
R
RemainingCapacity()
0x10 and 0x11
mAh
R
FullChargeCapacity()
0x12 and 0x13
mAh
R
AverageCurrent()
0x14 and 0x15
mA
R
TimeToEmpty()
0x16 and 0x17
min
R
FullChargeCapacityFiltered()
0x18 and 0x19
mAh
R
SafetyStatus()
0x1A and 0x1B
—
R
FullChargeCapacityUnfiltered()
0x1C and 0x1D
mAh
R
Imax()
0x1E and 0x1F
mA
R
RemainingCapacityUnfiltered()
0x20 and 0x21
mAh
R
RemainingCapacityFiltered()
0x22 and 0x23
mAh
R
BTPSOC1Set()
0x24 and 0x25
mAh
RW
BTPSOC1Clear()
0x26 and 0x27
mAh
RW
InternalTemperature()
0x28 and 0x29
0.1°K
R
CycleCount()
0x2A and 0x2B
Counts
R
StateofCharge()
0x2C and 0x2D
%
R
StateofHealth()
0x2E and 0x2F
% / num
R
ChargingVoltage()
0x30 and 0x31
mV
R
ChargingCurrent)
0x32 and 0x33
mA
R
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Programming (continued)
Table 6. Standard Commands (continued)
COMMAND CODE
UNIT
SEALED ACCESS
PassedCharge()
COMMAND NAME
0x34 and 0x35
mAh
R
DOD0()
0x36 and 0x37
hex
R
SelfDischargeCurrent()
0x34 and 0x35
mA
R
9.5.1.1 Control(): 0x00 and 0x01
Issuing a Control() command requires a subsequent 2-byte subcommand. These additional bytes specify the
particular control function desired. The Control() command allows the system to control specific features of the
fuel gauge during normal operation and additional features when the fuel gauge is in different access modes, as
described in Table 7.
Table 7. Control() Subcommands
SUBCOMMAND
CODE
SEALED
ACCESS
CONTROL_STATUS
0x0000
Yes
Reports the status of DF Checksum, Impedance Track, and so on
DEVICE_TYPE
0x0001
Yes
Reports the device type of 0x0541 (indicating bq27542-G1)
FW_VERSION
0x0002
Yes
Reports the firmware version on the device type
HW_VERSION
0x0003
Yes
Reports the hardware version on the device type
RESET_DATA
0x0005
Yes
Returns reset data
PREV_MACWRITE
0x0007
Yes
Returns previous Control() subcommand code
CHEM_ID
0x0008
Yes
Reports the chemical identifier of the Impedance Track configuration
BOARD_OFFSET
0x0009
No
Forces the device to measure and store the board offset
CC_OFFSET
0x000A
No
Forces the device to measure the CC offset
DF_VERSION
0x000C
Yes
Reports the data flash version of the device
SET_FULLSLEEP
0x0010
Yes
Sets the CONTROL_STATUS[FULLSLEEP] bit to 1
SET_SHUTDOWN
0x0013
Yes
Sets the CONTROL_STATUS[SHUTDWN] bit to 1
CLEAR_SHUTDOWN
0x0014
Yes
Clears the CONTROL_STATUS[SHUTDWN] bit to 1
SET_HDQINTEN
0x0015
Yes
Forces CONTROL_STATUS [HDQHOSTIN] to 1
CLEAR_HDQINTEN
0x0016
Yes
Forces CONTROL_STATUS [HDQHOSTIN] to 0
STATIC_CHEM_CHKSUM
0x0017
Yes
Calculates chemistry checksum
ALL_DF_CHKSUM
0x0018
Yes
Reports checksum for all data flash excluding device specific variables
STATIC_DF_CHKSUM
0x0019
Yes
Reports checksum for static data flash excluding device specific variables
SYNC_SMOOTH
0x001E
Yes
Synchronizes RemCapSmooth() and FCCSmooth() with RemCapTrue()
and FCCTrue()
SEALED
0x0020
No
Places the fuel gauge in SEALED access mode
IT_ENABLE
0x0021
No
Enables the Impedance Track algorithm
IMAX_INT_CLEAR
0x0023
Yes
Clears an Imax interrupt that is currently asserted on the RC2 pin
CAL_ENABLE
0x002D
No
Toggle CALIBRATION mode
RESET
0x0041
No
Forces a full reset of the fuel gauge
EXIT_CAL
0x0080
No
Exit CALIBRATION mode
ENTER_CAL
0x0081
No
Enter CALIBRATION mode
OFFSET_CAL
0x0082
No
Reports internal CC offset in CALIBRATION mode
SUBCOMMAND NAME
DESCRIPTION
9.6 Power Control
9.6.1 Reset Functions
When the fuel gauge detects a software reset by sending [RESET] Control() subcommand, it determines the type
of reset and increments the corresponding counter. This information is accessible by issuing the command
Control() function with the RESET_DATA subcommand.
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Power Control (continued)
9.6.2 Wake-Up Comparator
The wake up comparator is used to indicate a change in cell current while the fuel gauge is in SLEEP modes.
Pack Configuration uses bits [RSNS1, RSNS0] to set the sense resistor selection. Pack Configuration also
uses the [IWAKE] bit to select one of two possible voltage threshold ranges for the given sense resistor
selection. An internal interrupt is generated when the threshold is breached in either charge or discharge
directions. Setting [RSNS1] and [RSNS0] to 0 disables this feature.
Table 8. IWAKE Threshold Settings (1)
(1)
IWAKE
RSNS1
RSNS0
Vth(SRP-SRN)
0
0
0
Disabled
1
0
0
Disabled
0
0
1
1.0 mV or –1.0 mV
1
0
1
2.2 mV or –2.2 mV
0
1
0
2.2 mV or –2.2 mV
1
1
0
4.6 mV or –4.6 mV
0
1
1
4.6 mV or –4.6 mV
1
1
1
9.8 mV or –9.8 mV
The actual resistance value vs. the setting of the sense resistor is not important just the actual voltage
threshold when calculating the configuration. The voltage thresholds are typical values under room
temperature.
9.6.3 Flash Updates
Data Flash can only be updated if Voltage() ≥ Flash Update OK Voltage. Flash programming current can cause
an increase in LDO dropout. The value of Flash Update OK Voltage should be selected such that the VCC
voltage does not fall below its minimum of 2.4 V during Flash write operations.
9.7 Autocalibration
The fuel gauge provides an autocalibration feature that will measure the voltage offset error across SRP and
SRN from time-to-time as operating conditions change. It subtracts the resulting offset error from normal sense
resistor voltage, VSR, for maximum measurement accuracy.
Autocalibration of the ADC begins on entry to SLEEP mode, except if Temperature() is ≤ 5°C or Temperature() ≥
45°C.
The fuel gauge also performs a single offset calibration when: (1) the condition of AverageCurrent() ≤ 100 mA
and (2) {voltage change since last offset calibration ≥ 256 mV} or {temperature change since last offset
calibration is greater than 8°C for ≥ 60 seconds}.
Capacity and current measurements will continue at the last measured rate during the offset calibration when
these measurements cannot be performed. If the battery voltage drops more than 32 mV during the offset
calibration, the load current has likely increased considerably; hence, the offset calibration will be aborted.
9.8 Communications
9.8.1 HDQ Single-Pin Serial Interface
The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to
the fuel gauge. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted
first. Note that the DATA signal on pin 12 is open-drain and requires an external pullup resistor. The 8-bit
command code consists of two fields: the 7-bit HDQ command code (bits 0:6) and the 1-bit RW field (MSB bit 7).
The RW field directs the fuel gauge either to:
• Store the next 8 or 16 bits of data to a specified register, or
• Output 8 bits of data from the specified register
The HDQ peripheral can transmit and receive data as either an HDQ master or slave.
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Communications (continued)
HDQ serial communication is normally initiated by the host processor sending a break command to the fuel
gauge. A break is detected when the DATA pin is driven to a logic-low state for a time t(B) or greater. The DATA
pin should then be returned to its normal ready high logic state for a time t(BR). The fuel gauge is now ready to
receive information from the host processor.
The fuel gauge is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral. The SLUA408
application report provides details of HDQ communication basics.
9.8.2 HDQ Host Interruption Feature
The default fuel gauge behaves as an HDQ slave only device when HDQ mode is enabled. If the HDQ interrupt
function is enabled, the fuel gauge is capable of mastering and also communicating to a HDQ device. There is
no mechanism for negotiating who is to function as the HDQ master and care must be taken to avoid message
collisions. The interrupt is signaled to the host processor with the fuel gauge mastering an HDQ message. This
message is a fixed message that will be used to signal the interrupt condition. The message itself is 0x80 (slave
write to register 0x00) with no data byte being sent as the command is not intended to convey any status of the
interrupt condition. The HDQ interrupt function is disabled by default and needs to be enabled by command.
When the SET_HDQINTEN subcommand is received, the fuel gauge will detect any of the interrupt conditions
and assert the interrupt at 1-second intervals until the CLEAR_HDQINTEN command is received or the count of
HDQHostIntrTries has lapsed.
The number of tries for interrupting the host is determined by the data flash parameter named
HDQHostIntrTries.
9.8.2.1 Low Battery Capacity
This feature will work identically to SOC1. It will use the same data flash entries as SOC1 and will trigger
interrupts as long as SOC1 = 1 and HDQIntEN = 1.
9.8.2.2 Temperature
This feature will trigger an interrupt based on the OTC (Over-Temperature in Charge) or OTD (Over-Temperature
in Discharge) condition being met. It uses the same data flash entries as OTC or OTD and will trigger interrupts
as long as either the OTD or OTC condition is met and HDQIntEN = 1.
9.8.3 I2C Interface
The fuel gauge supports the standard I2C read, incremental read, one-byte write quick read, and functions. The
7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit
device address is therefore 0xAA or 0xAB for write or read, respectively.
Host Generated
S
0 A
ADDR[6:0]
Fuel Gauge Generated
A
CMD[7:0]
A P
DATA[7:0]
S
ADDR[6:0]
1
(a)
S
ADDR[6:0]
A
DATA[7:0]
N P
(b)
0 A
CMD[7:0]
A Sr
ADDR[6:0]
1
A
DATA[7:0]
N P
...
DATA[7:0]
(c)
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
ADDR[6:0]
1
A
DATA[7:0]
A
N P
(d)
Figure 7. Supported I2C Formats
(a)
(b)
(c)
(d)
1-byte write
Quick read
1 byte-read
Incremental read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop)
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Communications (continued)
The quick read returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the fuel gauge or the
I2C master. The quick writes function in the same manner and are a convenient means of sending multiple bytes
to consecutive command locations (such as two-byte commands that require two bytes of data).
Attempt to write a read-only address (NACK after data sent by master):
S
0
ADDR[6:0]
A
A
CMD[7:0]
A
DATA[7:0]
P
Attempt to read an address above 0x7F (NACK command):
S
0
ADDR[6:0]
CMD[7:0]
A
N P
Attempt at incremental writes (NACK all extra data bytes sent):
S
ADDR[6:0]
CMD[7:0]
0 A
A
DATA[7:0]
A
DATA[7:0]
N
A
...
...
N P
Incremental read at the maximum allowed read address:
S
ADDR[6:0]
0 A
A Sr
CMD[7:0]
1
ADDR[6:0]
A
DATA[7:0]
Address
0x7F
N P
DATA[7:0]
Data From
addr 0x7F
Data From
addr 0x00
The I2C engine releases both SDA and SCL if the I2C bus is held low for t(BUSERR). If the fuel gauge was holding
the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines
low, the I2C engine enters the low-power sleep mode.
9.8.3.1 I2C Time Out
The I2C engine will release both SDA and SCL if the I2C bus is held low for about 2 seconds. If the fuel gauge
was holding the lines, releasing them will free for the master to drive the lines.
9.8.3.2 I2C Command Waiting Time
To make sure the correct results of a command with the 400-kHz I2C operation, a proper waiting time should be
added between issuing command and reading results. For subcommands, the following diagram shows the
waiting time required between issuing the control command the reading the status with the exception of the
checksum command. A 100-ms waiting time is required between the checksum command and reading result. For
read-write standard commands, a minimum of 2 seconds is required to get the result updated. For read-only
standard commands, there is no waiting time required, but the host should not issue all standard commands
more than two times per second. Otherwise, the gauge could result in a reset issue due to the expiration of the
watchdog timer.
S
ADDR[6:0]
0 A
CMD[7:0]
A
DATA [7:0]
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
ADDR[6:0]
A
1 A
DATA [7:0]
A P
DATA [7:0]
66ms
A
DATA [7:0]
N P
A
DATA [7:0]
A
66ms
Waiting time between control subcommand and reading results
S
ADDR[6:0]
DATA [7:0]
0 A
A
CMD[7:0]
DATA [7:0]
A Sr
N P
ADDR[6:0]
1 A
DATA [7:0]
66ms
Waiting time between continuous reading results
20
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Communications (continued)
9.8.3.3 I2C Clock Stretching
I2C clock stretches can occur during all modes of fuel gauge operation. In the SLEEP and HIBERNATE modes, a
short clock stretch will occur on all I2C traffic as the device must wake-up to process the packet. In NORMAL and
SLEEP+ modes, clock stretching will only occur for packets addressed for the fuel gauge. The timing of stretches
will vary as interactions between the communicating host and the gauge are asynchronous. The I2C clock
stretches may occur after start bits, the ACK/NAK bit and first data bit transmit on a host read cycle. The majority
of clock stretch periods are small (≤ 4 ms) as the I2C interface peripheral and CPU firmware perform normal data
flow control. However, less frequent but more significant clock stretch periods may occur when data flash (DF) is
being written by the CPU to update the resistance (Ra) tables and other DF parameters such as Qmax. Due to
the organization of DF, updates need to be written in data blocks consisting of multiple data bytes.
An Ra table update requires erasing a single page of DF, programming the updated Ra table and a flag. The
potential I2C clock stretching time is 24 ms maximum. This includes 20-ms page erase and 2-ms row
programming time (×2 rows). The Ra table updates occur during the discharge cycle and at up to 15 resistance
grid points that occur during the discharge cycle.
A DF block write typically requires a maximum of 72 ms. This includes copying data to a temporary buffer and
updating DF. This temporary buffer mechanism is used to protect from power failure during a DF update. The
first part of the update requires 20 ms to erase the copy buffer page, 6 ms to write the data into the copy buffer
and the program progress indicator (2 ms for each individual write). The second part of the update is writing to
the DF and requires 44 ms for DF block update. This includes a 20-ms each page erase for two pages and 2-ms
each row write for two rows.
In the event that a previous DF write was interrupted by a power failure or reset during the DF write, an
additional 44-ms maximum DF restore time is required to recover the data from a previously interrupted DF write.
In this power failure recovery case, the total I2C clock stretching is 116 ms maximum.
Another case where I2C clock stretches is at the end of discharge. The update to the last discharge data will go
through the DF block update twice because two pages are used for the data storage. The clock stretching in this
case is 144 ms maximum. This occurs if there has been a Ra table update during the discharge.
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The bq27542-G1 fuel gauge is a microcontroller peripheral that provides fuel gauging for single-cell Li-Ion battery
packs. The integrated delta-sigma converters provide accurate, high precision measurements for voltage,
current, and temperature in order to accomplish effective battery gauging. To allow for optimal performance in
the end application, special considerations must be taken to ensure minimization of measurement error through
proper printed circuit board (PCB) board layout and correct configuration of battery characteristics in the fuel
gauge data flash.
10.2 Typical Application
J10
R20
4.7k
MM3511
3
5
4
6
2
1
R7, R8, and R9 are optional pulldown resistors if pullup resistors are applied.
Figure 8. Typical Application
22
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Typical Application (continued)
10.2.1 Design Requirements
Several key parameters must be updated to align with a given application's battery characteristics. For highest
accuracy gauging, it is important to follow-up this initial configuration with a learning cycle to optimize resistance
and maximum chemical capacity (Qmax) values prior to sealing and shipping packs to the field. Successful and
accurate configuration of the fuel gauge for a target application can be used as the basis for creating a "golden"
file that can be written to all production packs, assuming identical pack design and Li-Ion cell origin (chemistry,
lot, and so forth). Calibration data can be included as part of this golden file to cut down on battery pack
production time. If going this route, it is recommended to average the calibration data from a large sample size
and use these in the golden file. Ideally, it is recommended to calibrate all packs individually as this will lead to
the highest performance and lowest measurement error in the end application on a per-pack basis. In addition,
the integrated protection functionality should be correctly configured to ensure activation based on the fault
protection needs of the target pack design, or else accidental trip could be possible if using defaults. Table 9,
Key Data Flash Parameters for Configuration, shows the items that should be configured to achieve reliable
protection and accurate gauging with minimal initial configuration.
Table 9. Key Data Flash Parameters for Configuration
NAME
DEFAULT
UNIT
Design Capacity
1000
mAh
Set based on the nominal pack capacity as interpreted from cell manufacturer's
datasheet. If multiple parallel cells are used, should be set to N × Cell Capacity.
Design Energy
3800
mWh
Set based on the nominal pack energy (nominal cell voltage × nominal cell
capacity) as interpreted from the cell manufacturer's datasheet. If multiple parallel
cells are used, should be set to N × Cell Energy.
Design Energy Scale
1
—
Set to 10 to convert all power values to cWh or to 1 for mWh. Design Energy is
divided by this value.
Reserve Capacity
0
mAh
Set to desired runtime remaining (in seconds / 3600) × typical applied load
between reporting 0% SOC and reaching Terminate Voltage, if needed.
Design Voltage
3800
mV
Set to nominal cell voltage per manufacturer datasheet.
Cycle Count Threshold
900
mAh
Set to 90% of configured Design Capacity
Should be configured using TI-supplied Battery Management Studio software.
Default open-circuit voltage and resistance tables are also updated in conjunction
with this step. Do not attempt to manually update reported Device Chemistry as
this does not change all chemistry information! Always update chemistry using
the appropriate software tool (that is, BMS).
Device Chemistry
0354
hex
RECOMMENDED SETTING
Load Mode
1
—
Set to applicable load model, 0 for constant current or 1 for constant power.
Load Select
1
—
Set to load profile which most closely matches typical system load.
Qmax Cell 0
1000
mAh
Set to initial configured value for Design Capacity. The gauge will update this
parameter automatically after the optimization cycle and for every regular Qmax
update thereafter.
V at Chg Term
4350
mV
Set to nominal cell voltage for a fully charged cell. The gauge will update this
parameter automatically each time full charge termination is detected.
Terminate Voltage
3000
mV
Set to empty point reference of battery based on system needs. Typical is
between 3000 and 3200 mV.
Ra Max Delta
43
mΩ
Set to 15% of Cell0 R_a 4 resistance after an optimization cycle is completed.
Charging Voltage
4350
mV
Set based on nominal charge voltage for the battery in normal conditions (25°C,
and so on). Used as the reference point for offsetting by Taper Voltage for full
charge termination detection.
Taper Current
100
mA
Set to the nominal taper current of the charger + taper current tolerance to ensure
that the gauge will reliably detect charge termination.
Taper Voltage
100
mV
Sets the voltage window for qualifying full charge termination. Can be set tighter
to avoid or wider to ensure possibility of reporting 100% SOC in outer JEITA
temperature ranges that use derated charging voltage.
Dsg Current Threshold
60
mA
Sets threshold for gauge detecting battery discharge. Should be set lower than
minimal system load expected in the application and higher than Quit Current.
Chg Current Threshold
75
mA
Sets the threshold for detecting battery charge. Can be set higher or lower
depending on typical trickle charge current used. Also should be set higher than
Quit Current.
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Typical Application (continued)
Table 9. Key Data Flash Parameters for Configuration (continued)
NAME
24
DEFAULT
UNIT
RECOMMENDED SETTING
Quit Current
40
mA
Sets threshold for gauge detecting battery relaxation. Can be set higher or lower
depending on typical standby current and exhibited in the end system.
Avg I Last Run
–299
mA
Current profile used in capacity simulations at onset of discharge or at all times if
Load Select = 0. Should be set to nominal system load. Is automatically updated
by the gauge every cycle.
Avg P Last Run
–1131
mW
Power profile used in capacity simulations at onset of discharge or at all times if
Load Select = 0. Should be set to nominal system power. Is automatically
updated by the gauge every cycle.
Sleep Current
15
mA
Sets the threshold at which the fuel gauge enters SLEEP Mode. Take care in
setting above typical standby currents else entry to SLEEP may be
unintentionally blocked.
T1 Temp
0
°C
Sets the boundary between charging inhibit / suspend and charging with T1-T2
parameters. Defaults set based on recommended values from JEITA standard.
T2 Temp
10
°C
Sets the boundary between charging with T1-T2 or T2-T3 parameters. Defaults
set based on recommended values from JEITA standard.
T3 Temp
45
°C
Sets the boundary between charging with T2-T3 or T3-T4 parameters. Defaults
set based on recommended values from JEITA standard.
T4 Temp
50
°C
Sets the boundary between charging with T4-T5 or T4-T5 parameters. Also
serves as charge inhibit boundary if initiating new charging event. Defaults set
based on recommended values from JEITA standard.
T5 Temp
60
°C
Sets the boundary between charging suspend and charging with T4-T5
parameters. Refer to JEITA standard for compliance.
Temp Hys
1
°C
Adds temperature hysteresis for boundary crossings to avoid oscillation if
temperature is changing by a degree, approximately, on a given boundary.
T1-T2 Chg Voltage
4350
mV
Sets reported charge voltage when inside of T1 Temp and T2 Temp range.
Defaults set based on recommended values from JEITA standard.
T2-T3 Chg Voltage
4350
mV
Sets reported charge voltage when inside of T2 Temp and T3 Temp range.
Defaults set based on recommended values from JEITA standard.
T3-T4 Chg Voltage
4300
mV
Sets reported charge voltage when inside of T3 Temp and T4 Temp range.
Defaults set based on recommended values from JEITA standard.
T4-T5 Chg Voltage
4250
mV
Sets reported charge voltage when inside of T4 Temp and T5 Temp range.
Defaults set based on recommended values from JEITA standard.
T1-T2 Chg Current
50
%
Sets reported charge current when inside of T1 Temp and T2 Temp range.
Defaults set based on recommended values from JEITA standard.
T2-T3 Chg Current
80
%
Sets reported charge current when inside of T2 Temp and T3 Temp range.
Defaults set based on recommended values from JEITA standard.
T3-T4 Chg Current
80
%
Sets reported charge current when inside of T3 Temp and T4 Temp range.
Defaults set based on recommended values from JEITA standard.
T4-T5 Chg Current
80
%
Sets reported charge current when inside of T4 Temp and T5 Temp range.
Defaults set based on recommended values from JEITA standard.
OT Chg
55.0
°C
Set to desired temperature at which charging is prohibited to prevent cell damage
due to excessive ambient temperature.
OT Chg Time
5
s
Set to desired time before CHG FET is disabled based on overtemperature.
Because temperature changes much more slowly than other fault conditions, the
default setting is sufficient for most application.
OT Chg Recovery
50.0
°C
Set to the temperature threshold at which charging is no longer prohibited.
OT Dsg
60.0
°C
Set to desired temperature at which discharging is prohibited to prevent cell
damage due to excessive ambient temperature.
OT Dsg Time
5
s
Set to desired time before DSG FET is disabled based on overtemperature.
Because temperature changes much more slowly than other fault conditions, the
default setting is sufficient for most application.
OT Dsg Recovery
55.0
°C
Set to the temperature threshold at which cell discharging is no longer prohibited.
CC Gain
5
mΩ
Calibrate this parameter using TI-supplied BMS software and calibration
procedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to current.
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Typical Application (continued)
Table 9. Key Data Flash Parameters for Configuration (continued)
NAME
DEFAULT
UNIT
RECOMMENDED SETTING
CC Delta
5.074
mΩ
Calibrate this parameter using TI-supplied BMS software and calibration
procedure in the TRM. Determines conversion of coulomb counter measured
sense resistor voltage to passed charge.
CC Offset
6.874
mA
Calibrate this parameter using TI-supplied BMS software and calibration
procedure in the TRM. Determines native offset of coulomb counter hardware
that should be removed from conversions.
Board Offset
0.66
µA
Calibrate this parameter using TI-supplied BMS software and calibration
procedure in the TRM. Determines native offset of the printed circuit board
parasitics that should be removed from conversions.
Pack V Offset
0
mV
Calibrate this parameter using TI-supplied BMS software and calibration
procedure in the TRM. Determines voltage offset between cell tab and ADC input
node to incorporate back into or remove from measurement, depending on
polarity.
10.2.2 Detailed Design Procedure
10.2.2.1 BAT Voltage Sense Input
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing
its influence on battery voltage measurements. It proves most effective in applications with load profiles that
exhibit high frequency current pulses (that is, cell phones) but is recommended for use in all applications to
reduce noise on this sensitive high impedance measurement node.
The series resistor between the battery and the BAT input is used to limit current that could be conducted
through the chip-scale package's solder bumps in the event of an accidental short during the board assembly
process. The resistor is not likely to survive a sustained short condition (depends on power rating); however, it
sacrifices the much cheaper resistor component over suffering damage to the fuel gauge die itself.
10.2.2.2 SRP and SRN Current Sense Inputs
The filter network at the input to the coulomb counter is intended to improve differential mode rejection of voltage
measured across the sense resistor. These components should be placed as close as possible to the coulomb
counter inputs and the routing of the differential traces length-matched in order to best minimize impedance
mismatch-induced measurement errors. The single-ended ceramic capacitors should be tied to the battery
voltage node (preferably to a large copper pour connected to the SRN side of the sense resistor) in order to
further improve common-mode noise rejection. The series resistors between the CC inputs and the sense
resistor should be at least 200 Ω in order to mitigate SCR-induced latch-up due to possible ESD events.
10.2.2.3 Sense Resistor Selection
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect
the resulting differential voltage, and derived current, it senses. As such, it is recommended to select a sense
resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard
recommendation based on best compromise between performance and price is a 1% tolerance, 50 ppm drift
sense resistor with a 1-W power rating.
10.2.2.4 TS Temperature Sense Input
Similar to the BAT pin, a ceramic decoupling capacitor for the TS pin is used to bypass AC voltage ripple away
from the high-impedance ADC input, minimizing measurement error. Another helpful advantage is that the
capacitor provides additional ESD protection since most thermistors are handled and manually soldered to the
PCB as a separate step in the factory production flow. As before, it should be placed as close as possible to the
respective input pin for optimal filtering performance.
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10.2.2.5 Thermistor Selection
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting
coefficients configured in the fuel gauge specifically assume a 103AT-2 type thermistor profile and so that is the
default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance profile (for
example, JT-2 or others) requires an update to the default thermistor coefficients in data flash to ensure highest
accuracy temperature measurement performance.
10.2.2.6 REGIN Power Supply Input Filtering
A ceramic capacitor is placed at the input to the fuel gauge's internal LDO in order to increase power supply
rejection (PSR) and improve effective line regulation. It ensures that voltage ripple is rejected to ground instead
of coupling into the device's internal supply rails.
10.2.2.7 REG25 LDO Output Filtering
A ceramic capacitor is also needed at the output of the internal LDO in order to provide a current reservoir for
fuel gauge load peaks during high peripheral utilization. It acts to stabilize the regulator output and reduce core
voltage ripple inside of the device.
10.2.2.8 Communication Interface Lines
A protection network composed of resistors and zener diodes is recommended on each of the serial
communication inputs to protect the fuel gauge from dangerous ESD transients. The Zener should be selected to
break down at a voltage larger than the typical pullup voltage for these lines but less than the internal diode
clamp breakdown voltage of the device inputs (~6 V). A zener voltage of 5.6 V is typically recommended. The
series resistors are used to limit the current into the Zener diode and prevent component destruction due to
thermal strain once it goes into breakdown. 100 Ω is typically recommended for these resistance values.
10.2.2.9 PACKP Voltage Sense Input
Inclusion of a 2-kΩ series resistor on the PACKP input allows it to tolerate a charger overvoltage event up to
28 V without device damage. The resistor also protects the device in the event of a reverse polarity charger
input, since the substrate diode will be forward biased and attempt to conduct charger current through the fuel
gauge (as well as the high FETs). An external reverse charger input FET clamp can be added to short the DSG
FET gate to its source terminal, forcing the conduction channel off when negative voltage is present at PACK+
input to the battery pack and preventing large battery discharge currents. A ceramic capacitor connected at the
PACKP pin helps to filter voltage into the comparator sense lines used for checking charger and load presence.
In addition, in the Low Voltage Charging State, the minimal circuit elements that are operational are powered
from this input pin and require a stable supply.
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2.58
32.8
2.56
32.75
2.54
32.7
L F O (kH Z )
R E G 2 5 O u tp u t (V )
10.3 Application Curves
2.52
2.5
2.48
32.6
32.55
2.46
2.44
-40
32.65
32.5
I OUT = 16 mA, REGIN = 5 V
I OUT = 3 mA, REGIN = 2.7 V
-20
0
20
40
Temperature (qC)
60
80
32.45
-40
100
-20
0
D001
Figure 9. REG25 vs. Temperature
20
40
Temperature (qC)
60
80
100
D002
Figure 10. Low Frequency Oscillator vs. Temperature
8.4
8.395
H F O (M H Z )
8.39
8.385
8.38
8.375
8.37
8.365
-40
-20
0
20
40
Temperature (qC)
60
80
100
D003
Figure 11. High Frequency Oscillator vs. Temperature
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11 Power Supply Recommendations
The REGIN input pin and the REG25 output pin require low equivalent series resistance (ESR) ceramic
capacitors placed as closely as possible to the respective pins to optimize ripple rejection and provide a stable
and dependable power rail that is resilient to line transients. A 0.1-µF capacitor at the REGIN and a 0.47-µF
capacitor at REG25 will suffice for satisfactory device performance.
12 Layout
12.1 Layout Guidelines
12.1.1 Lithium-Ion Cell Connections
For highest voltage measurement accuracy, it is critical to connect the BAT pin directly to the battery terminal
PCB pad. This avoids measurement errors caused by IR drops when high charge or discharge currents are
flowing. Connecting right at the positive battery terminal with a Kelvin connection ensures the elimination of
parasitic resistance between the point of measurement and the actual battery terminal. Likewise the low current
ground return for the fuel gauge and all related passive components should be star-connected right at the
negative battery terminal. This technique minimizes measurement error due to current-induced ground offsets
and also improves noise performance through prevention of ground bounce that could occur with high current
and low current returns intersecting ahead of the battery ground. The bypass capacitor for this sense line needs
to be placed as close as possible to the BAT input pin.
12.1.2 Sense Resistor Connections
Kelvin connections at the sense resistor are just as critical as those for the battery terminals themselves. The
differential traces should be connected at the inside of the sense resistor pads and not anywhere along the high
current trace path in order to prevent false increases to measured current that could result when measuring
between the sum of the sense resistor and trace resistance between the tap points. In addition, the routing of
these leads from the sense resistor to the input filter network and finally into the SRP and SRN pins needs to be
as closely matched in length as possible else additional measurement offset could occur. It is further
recommended to add copper trace or pour-based "guard rings" around the perimeter of the filter network and
coulomb counter inputs to shield these sensitive pins from radiated EMI into the sense nodes. This prevents
differential voltage shifts that could be interpreted as real current change to the fuel gauge. All of the filter
components need to be placed as close as possible to the coulomb counter input pins.
12.1.3 Thermistor Connections
The thermistor sense input should include a ceramic bypass capacitor placed as close to the TS input pin as
possible. The capacitor helps to filter measurements of any stray transients as the voltage bias circuit pulses
periodically during temperature sensing windows.
12.1.4 High Current and Low Current Path Separation
For best possible noise performance, it is extremely important to separate the low current and high current loops
to different areas of the board layout. The fuel gauge and all support components should be situated on one side
of the boards and tap off of the high current loop (for measurement purposes) at the sense resistor. Routing the
low current ground around instead of under high current traces will further help to improve noise rejection.
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12.2 Layout Example
Battery Pack
PACKP
RTHERM
Use copper
pours for battery
power path to
minimize IR
losses
RESD1
Kelvin connect
BAT sense line
right at positive
battery terminal
Place capacitors
close to gauge
IC. Trace to pin
and VSS should
be short
CREGIN
Li-Ion
Cell
SE
HDQ
REG25
SCL
REGIN
SDA
BAT
TS
VCC
SRN
VSS
SRP
RESD2
HDQ
RESD3
RESD4
RESD5
RESD4
SCL
SDA
PACKN
CBAT
CVCC
Use short and wide
traces to minimize
inductance
Protection
IC
Star ground right at PACKfor ESD return path
10m1%
NFET
Via connects to Power Ground
NFET
Kelvin connect SRP
and SRN
connections right at
Rsense terminals
Figure 12. Layout Example
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13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
For related documentation, see the following:
•
•
•
bq27542-G1 Technical Reference Manual (SLUUB65)
IC Package Thermal Metrics (SPRA953)
Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Report
(SLUA450)
13.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.3 Trademarks
Impedance Track, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
13.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
BQ27542DRZR-G1
ACTIVE
SON
DRZ
12
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BQ
7542
BQ27542DRZT-G1
ACTIVE
SON
DRZ
12
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BQ
7542
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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