Product
Folder
Sample &
Buy
Support &
Community
Tools &
Software
Technical
Documents
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
bq34110 Multi-Chemistry CEDV Battery Gas Gauge for Rarely Discharged Applications
1 Features
3 Description
•
The bq34110 CEDV Battery Gas Gauge provides
CEDV gas gauging and End-Of-Service (EOS)
Determination for single- and multi-cell batteries. The
device includes enhanced features to support
applications where the battery is kept fully charged
and is rarely discharged, such as found in a wide
variety of backup systems. The bq34110 gas gauge
supports multiple battery chemistries, including Li-Ion
and LiFePO4, lead acid (PbA), Nickel Metal Hydride
(NiMH), and Nickel Cadmium (NiCd).
•
•
•
•
•
•
•
•
•
•
Accurate End-Of-Service (EOS) Determination for
Batteries in Rarely Discharged Applications
Compensated End-of-Discharge Voltage (CEDV)
Gas Gauge for Single- and Multi-Cell Batteries,
Providing
– State-Of-Charge (SOC)
– Time-To-Empty (TTE)
– State-Of-Health (SOH)
– Watt-Hour–Based Charge Termination
Supports Voltages up to 65 V, Capacities up to
32 Ah, and Currents up to 32 A—with Options to
Extend Beyond These Levels Using Scaling
Supports Li-Ion, LiFePO4, Lead-Acid (PbA),
NiMH, and NiCd Chemistries
Dual Configurable Host Interrupt or GPO
Lifetime Data Logging Options
Precision Coulomb Counter, Voltage, and
Temperature Measurement
Power Enable Control
I2C™ Communication with Host
Accumulated Charge Coulomb Counting with
Configurable Interrupt
SHA-1 Authentication
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
UPS Backup Systems
Telematics Backup Systems
Emergency Battery Power Modules
Energy Storage Systems
Asset Tracking
Building Security Systems
Video Surveillance
Electronic Smart Locks
Remote and Emergency Lighting
Server Power Systems
Robotics
Toys
The gas gauging function uses voltage, current, and
temperature data with Compensated End-ofDischarge Voltage (CEDV) technology to provide
State-Of-Charge (SOC) and State-Of-Health (SOH)
data. The gas gauge also incorporates an End-OfService (EOS) Determination function that alerts
when battery capability has degraded and is
approaching the conclusion of its usable service.
The data available from the gauge can be read by the
host through a 400-kHz I2C bus. Two ALERT outputs
are also available to interrupt the host or can be used
for other functions, based on a variety of configurable
options.
Device Information(1)
PART NUMBER
bq34110
PACKAGE
TSSOP (14)
BODY SIZE (NOM)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
PACK+
Divider Network
BAT
VEN
SDA
SCL
LEN
REG25
ALERT1
ALERT2
Learning
Load
10k NTC
n series cells
1
TS
SRP
RSENSE
CHIP ENABLE
CE
SRN
VSS
PACK–
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.14 Electrical Characteristics: Data Flash Memory ....... 7
6.15 Timing Requirements: I2C-Compatible Interface
Timing Characteristics................................................ 7
6.16 Typical Characteristics ........................................... 8
1
1
1
2
3
4
7
Detailed Description .............................................. 9
7.1
7.2
7.3
7.4
6.1
6.2
6.3
6.4
6.5
6.6
Absolute Maximum Ratings ...................................... 4
ESD Ratings ............................................................ 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics: Supply Current................. 5
Electrical Characteristics: Digital Input and Output DC
Characteristics ........................................................... 5
6.7 Electrical Characteristics: Power-On Reset .............. 5
6.8 Electrical Characteristics: LDO Regulator................. 5
6.9 Electrical Characteristics: Internal Temperature
Sensor........................................................................ 6
6.10 Electrical Characteristics: Low-Frequency Clock
Oscillator .................................................................... 6
6.11 Electrical Characteristics: High-Frequency Clock
Oscillator .................................................................... 6
6.12 Electrical Characteristics: Integrating ADC
(Coulomb Counter) .................................................... 6
6.13 Electrical Characteristics: ADC (Temperature and
Voltage Measurements) ............................................. 7
8
Overview ................................................................... 9
Functional Block Diagram ......................................... 9
Feature Description................................................... 9
Device Functional Modes........................................ 12
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Applications ............................................... 13
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 17
10.1 Layout Guidelines ................................................. 17
10.2 Layout Example .................................................... 18
11 Device and Documentation Support ................. 20
11.1
11.2
11.3
11.4
11.5
11.6
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
20
12 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
2
DATE
REVISION
NOTES
November 2016
B
PRODUCT PREVIEW to Production Data
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
5 Pin Configuration and Functions
14-Pin TSSOP (PW)
Top View
VEN/GPIO
1
14
SDA
ALERT1
2
13
SCL
LEN
3
12
ALERT2
BAT
4
11
TS
CE
5
10
SRN
REGIN
6
9
SRP
REG25
7
8
VSS
Not to scale
Pin Functions
PIN
NAME
NUMBER
TYPE
DESCRIPTION
Active High Voltage Translation Enable. This signal is used optionally to switch the input voltage
divider on/off to reduce the power consumption (typ 45 μA) of the divider network. It can also be
used as a general purpose output.
VEN/GPIO
1
O (1)
ALERT1
2
O
Open drain output for use as system alert or charger control. Pull-up voltage limited
LEN
3
O
Push-pull external voltage divider control output
BAT
4
P
Voltage measurement input
CE
5
I
Chip enable. Internal LDO is powered down when driven low.
REGIN
6
P
Internal integrated LDO input. Decouple with 0.1-µF ceramic capacitor to VSS.
REG25
7
P
2.5-V output voltage of the internal integrated LDO. Decouple with 1-µF ceramic capacitor to VSS.
VSS
8
P
Device ground
SRP
9
I
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small
voltage between SRP and SRN, where SRP is nearest the BAT– connection.
SRN
10
I
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small
voltage between SRP and SRN, where SRN is nearest the PACK– connection.
TS
11
I
Pack thermistor voltage sense (use 103AT-type thermistor)
ALERT2
12
O
Open drain output for use as system alert or charger control
SCL
13
I
Open drain slave I2C serial communication clock input. Use with an external 10-kΩ pull-up resistor
(typical).
SDA
14
I/O
(1)
Open drain slave I2C serial communication data line. Use with an external 10-kΩ pull-up resistor
(typical).
AI = Analog Input, O = Output, I = Input, P = Power, I/O = Input/Output
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
3
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
VREGIN
Regulator input range
–0.3
5.5
V
VCE
CE input pin
–0.3
VREGIN + 0.3
V
VREG25
Supply voltage range
–0.3
2.75
V
VIOD
Open-drain I/O pins (SDA, SCL, ALERT2)
–0.3
5.5
V
VBAT
BAT input pin
–0.3
5.5
V
VI
Input voltage range to all other pins (SRP, SRN, TS, ALERT1, VEN/GPIO, LEN)
–0.3
VREG25 + 0.3
V
TA
Operating free-air temperature range
–40
85
°C
TJ
Operating junction temperature range
–40
100
°C
TF
Functional temperature range
–40
100
°C
Storage temperature range
–65
150
°C
Lead temperature (soldering, 10 s)
–40
100
°C
TSTG
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, BAT pin (1)
±1500
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all other pins (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)
MIN
No operating restrictions
VREGIN
Supply Voltage
CREGIN
External input capacitor for
internal LDO between REGIN
and VSS
CREG25
External output capacitor for
internal LDO between VCC
tPUCD
Power-up communication
No FLASH writes
NOM
MAX
UNIT
2.7
4.5
V
2.45
2.7
V
Nominal capacitor values specified.
Recommend a 10% ceramic X5R type
capacitor located close to the device.
0.1
µF
1
µF
250
ms
0.47
6.4 Thermal Information
bq34110
THERMAL METRIC
(1)
TSSOP (PW)
UNIT
14 PINS
RθJA
Junction-to-ambient thermal resistance
103.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
31.9
°C/W
RθJB
Junction-to-board thermal resistance
46.6
°C/W
ψJT
Junction-to-top characterization parameter
2.0
°C/W
ψJB
Junction-to-board characterization parameter
45.9
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
6.5 Electrical Characteristics: Supply Current
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ICC_NORMAL
Normal operating current
Device in NORMAL mode, ILOAD > Sleep
Current
133
µA
ISNOOZE (1)
Sleep+ operation mode
current
Device in SNOOZE mode, ILOAD < Sleep
Current
53
µA
ISLEEP (1)
Low-power SLEEP mode
Device in SLEEP mode, ILOAD < Sleep Current
current
22
µA
ISHUTDOWN
SHUTDOWN mode
current
0.01
µA
(1)
Fuel gauge in SHUTDOWN mode, CE pin <
VIL(CE) max
Specified by design. Not production tested.
6.6 Electrical Characteristics: Digital Input and Output DC Characteristics
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOL
Output voltage, low (SCL,
SDA, VEN, LEN, ALERT1, IOL = 3 mA
ALERT2 pins)
VOH(PP)
Output voltage, high
VOH(OD)
Output voltage, high (SDA,
SCL, ALERT1, ALERT2
External pull-up resistor connected to VREG25
pins)
VIH(ALERT1)
Input voltage, high
(ALERT1 pin)
1.2
VREG25 + 0.3
V
VIL
Input voltage, low
–0.3
0.6
V
VIL(CE)
Input voltage, low (CE pin) VREGIN = 2.7 to 4.5 V
0.8
V
VIH(CE)
Input voltage, high (CE
pin)
VIH(OD)
Input voltage, high (SDA,
SCL, ALERT2 pins)
ILKG
Input leakage current (I/O
pins)
0.4
IOH = –1 mA
VREGIN = 2.7 to 4.5 V
V
VREG25 – 0.5
V
VREG25 – 0.5
V
2.65
V
1.2
5.5
V
0.3
µA
6.7 Electrical Characteristics: Power-On Reset
TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT+
Positive-going battery
voltage input at REGIN
2.20
V
VHYS
Power-on reset hysteresis
115
mV
6.8 Electrical Characteristics: LDO Regulator
TA = 25°C, CREG25 = 1.0 μF, VREGIN = 3.6 V (unless otherwise noted) (1)
PARAMETER
VREG25
ISHORT (2)
(1)
(2)
Regulator output voltage
Short circuit current limit
MIN
TYP
MAX
2.7 V ≤ VREGIN ≤ 4.5 V, IOUT ≤ 16 mA
TA = –40°C to 85°C
TEST CONDITIONS
2.3
2.5
2.7
2.45 V ≤ VREGIN < 2.7 V, IOUT ≤ 3 mA
TA = –40°C to 85°C
2.3
UNIT
V
VREG25 = 0 V
TA = –40°C to 85°C
250
mA
LDO output current, IOUT, is the total load current. Use the LDO regulator to power the internal fuel gauge only.
Specified by design. Not production tested.
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
5
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
6.9 Electrical Characteristics: Internal Temperature Sensor
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
Internal temperature
sensor voltage gain
GTEMP
MAX
–2
UNIT
mV/°C
6.10 Electrical Characteristics: Low-Frequency Clock Oscillator
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
f(LOSC)
MIN
Operating frequency
f(EIO)
Frequency error (1) (2)
t(SXO)
Start-up time (3)
(1)
(2)
(3)
TEST CONDITIONS
TYP
MAX
32.768
UNIT
kHz
TA = 0°C to 60°C
–1.5%
0.25%
1.5%
TA = –20°C to 70°C
–2.5%
0.25%
2.5%
TA = –40°C to 85°C
–4%
0.25%
4%
500
µs
The frequency drift is included and measured from the trimmed frequency at VREG25 = 2.5 V, TA = 25°C.
The frequency error is measured from 32.768 kHz.
The start-up time is defined as the time it takes for the oscillator output frequency to be ±3%.
6.11 Electrical Characteristics: High-Frequency Clock Oscillator
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
f(LOSC)
Operating frequency
f(EIO)
Frequency error (1) (2)
MIN
TYP
MAX
8.389
UNIT
MHz
TA = 0°C to 60°C
–2%
0.38%
TA = –20°C to 70°C
–3%
0.38%
2%
3%
TA = –40°C to 85°C
–4.5%
0.38%
4.5%
Start-up time (3)
t(SXO)
(1)
(2)
(3)
TEST CONDITIONS
5
ms
The frequency drift is included and measured from the trimmed frequency at VREG25 = 2.5 V, TA = 25°C.
The frequency error is measured from 8.389 MHz.
The start-up time is defined as the time it takes for the oscillator output frequency to be ±3%.
6.12 Electrical Characteristics: Integrating ADC (Coulomb Counter)
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
V(SR)
Differential input
voltage range
V(SRP), V(SRN)
Input voltage range,
V(SRP) and V(SRN)
tSR_CONV
Conversion time
Input offset
INL
Integral nonlinearity
error
ZIN(SR)
Effective input
resistance (2)
ILKG(SR)
Input leakage current (2)
6
V(SR) = V(SRP) – V(SRN)
MIN
MAX
UNIT
–0.125
0.125
V
–0.125
0.125
V
Single conversion
Resolution
VOS(SR)
(1)
(2)
TEST CONDITIONS
TYP
1
14
s
15
10
bits
µV
FSR (1)
±0.007%
2.5
MΩ
0.3
µA
Full-scale reference
Specified by design. Not tested in production.
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
6.13 Electrical Characteristics: ADC (Temperature and Voltage Measurements)
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
VIN((ADC)
TEST CONDITIONS
ADC input voltage range
for BAT measurement
MIN
Conversion time
Resolution
MAX
UNIT
Internal voltage divider inactive, internal VREF
0.05
1
V
Internal voltage divider activated, internal VREF
0.05
4.5
V
0
VREG25
V
ADC input voltage for TS
pin measurement
tADC_CONV (1)
TYP
Single conversion
14
125
ms
15
bits
VOS(ADC)
Input offset
1
mV
ZADC_TS
Effective input resistance
(TS with internal pulldown activated) (1)
5
kΩ
8
MΩ
ZADC_BAT
When not measuring cell voltage (internal
Effective input resistance voltage divider inactive)
(BAT) (1)
During measurement of cell voltage using
internal divider (internal voltage divider active)
100
kΩ
ILKG(ADC)
(1)
Input leakage current (1)
0.3
µA
Specified by design. Not tested in production.
6.14 Electrical Characteristics: Data Flash Memory
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)
PARAMETER
Data retention
tDR
TEST CONDITIONS
(1)
Flash –programming
write cycles (1)
tWORDPROG
Word programming
time (1)
ICCPROG
Flash-write supply
current (1)
(1)
MIN
TYP
MAX
UNIT
10
Years
20,000
Cycles
5
2
ms
10
mA
Specified by design. Not tested in production.
6.15 Timing Requirements: I2C-Compatible Interface Timing Characteristics
TA = –40°C to 85°C, 2.4 V < VREGIN = VBAT < 5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise
noted)
MAX
UNIT
tR
PARAMETER
SCL/SDA rise time
TEST CONDITIONS
MIN
NOM
300
ns
tF
SCL/SDA fall time
300
ns
tW(H)
SCL pulse width (high)
600
ns
tW(L)
SCL pulse width (low)
1.3
µs
tSU(STA)
Setup for repeated start
600
ns
td(STA)
Start to first falling edge
of SCL
600
ns
tSU(DAT)
Data setup time
100
ns
th(DAT)
Data hold time
0
ns
tSU(STOP)
Setup time for stop
600
ns
tBUF
Bus free time between
stop and start
66
µs
fSCL
Clock frequency
400
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
kHz
7
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
Figure 1. I2C-Compatible Interface Timing Diagram
6.16 Typical Characteristics
15
200
160
10
Voltage Error (mV)
Total Battery Voltage
Voltage Error (mV)
120
5
0
-5
-10
80
40
0
-40
-80
-120
-15
-20
2800
-40qC
-20qC
3000
25qC
65qC
3200
85qC
3400 3600 3800
Battery Voltage (mV)
4000
4200
-200
25.2
4400
2
20
1
Temperature Error (qC)
Current Error (mA)
30.6 32.4 34.2
Battery Voltage (V)
36
37.8
39.6
D002
0
15
10
5
0
-5
-10
-15
-1
-2
-3
-4
-5
-6
-7
-40qC
-20qC
-2000
25qC
65qC
-1000
85qC
0
1000
Current (mA)
-8
2000
3000
-9
-40
D003
Figure 4. I(Err)
8
28.8
85°C
Figure 3. V(Err) Across VIN (0 mA) for a 9-Series
Configuration
25
-25
-3000
27
25°C
65°C
D001
Figure 2. V(Err) Across VIN (0 mA)
-20
-40°C
-20°C
-160
-20
0
20
40
Temperature (qC)
60
80
100
D004
Figure 5. T(Err)
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
7 Detailed Description
7.1 Overview
The bq34110 device incorporates multiple capabilities to provide detailed and sophisticated information on
single-cell and multi-cell battery packs. Several different battery chemistries are supported, including Li-Ion,
LiFePO4, lead-acid (PbA), Nickel Metal Hydride (NiMH), and Nickel Cadmium (NiCd). The device integrates a
gas gauge for monitoring battery charge level, an End-Of-Service (EOS) Determination function to evaluate when
a battery is nearing the end of its usable life, a specialized WHr Charge Termination function to enable battery
charging to a targeted energy capacity, a charge control scheme using direct pin control, SHA-1/HMAC-based
authentication, and lifetime data logging functionality.
NOTE
Formatting Conventions in This Document:
Commands: italics with parentheses and no breaking spaces; for example, Control()
Data Flash: italics, bold, and breaking spaces; for example, Design Capacity
Register Bits and Flags: brackets only; for example, [TDA]
Data Flash Bits: italic and bold; for example, [XYZ1]
Modes and States: ALL CAPITALS; for example, UNSEALED mode
7.2 Functional Block Diagram
CE REGIN
BAT
Analog Peripherals
TS
POWER-ON RESET
Reference
SRN
ALERT2
Power Control
Clock Generator
SRP
ALERT1
VSS REG25
ADC
Analog
Interface
&
I/O Control
SDA
SCL
CC
RAM
Memory
CPU
Digital Peripherals
I2C
TIMER
LEN
VEN/GPIO
INTERRUPTS
Flash
Memory
ROM
Memory
Copyright © 2016 , Texas Instruments Incorporated
7.3 Feature Description
The bq34110 gas gauge uses Compensated End-of-Discharge Voltage (CEDV) technology to accurately predict
the battery capacity and other operational characteristics of the battery, and can be interrogated by a host
processor to provide cell information, such as remaining capacity, full charge capacity, and average current.
The integrated End-Of-Service (EOS) Determination function is specifically intended for applications where the
battery is rarely discharged, such as in uninterruptible power supplies (UPS), enterprise server backup systems,
and telecommunications backup modules. In such systems, the battery may remain in a fully (or near-fully)
charged state for much of its lifetime, with it rarely or never undergoing a significant discharge. If the health of the
battery in such a system is not monitored regularly, then it may degrade beyond the level required for a system
backup/discharge event, and thus fail precisely at the time when it is needed most.
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
9
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
Feature Description (continued)
The EOS Determination function monitors the health of the battery through the use of infrequent Learning
Phases, which involves a controlled discharge of ~1% capacity, and provides an alert to the system when the
battery is approaching the end of its usable service. By coordinating battery charging with the Learning Phases,
the battery capacity available to the system can be maintained above a preselected level to avoid compromising
the ability for the battery to support a system discharge event.
The bq34110 device can support multi-cell battery configurations with maximum voltage up to 65 V through the
use of external and internal resistive divider networks to reduce the voltage to an acceptable range for the
device’s integrated ADC. These resistive dividers are actively controlled to avoid unnecessary power dissipation
when not needed. The device integrates an internal temperature sensor as well as support for an external NTC
thermistor, such as a Semitec 103AT or Mitsubishi BN35-3H103FB-50.
The battery current is monitored by measuring the voltage across a series resistor, RSENSE, which is placed in
series with the battery pack and has a typical value of 5 mΩ to 20 mΩ. The bq34110 device integrates two
ADCs, one of which is dedicated to current measurement, and the second used for measurement of several
other parameters, including temperature and voltage.
Communication with the device is provided through an I2C interface, supporting rates up to 400 kHz. Dual
ALERT pins are provided with programmable configuration, which enables them to be used for such functions as
a host interrupt/alert or controlling the battery charger.
To minimize power consumption, the bq34110 gauge has several power modes: NORMAL, SNOOZE, and
SLEEP, which are under register or algorithm control. In addition, a separate chip enable (CE) pin is provided to
control the internal LDO, which powers the bq34110 internal circuitry, and can put the device into SHUTDOWN
mode.
Information is accessed through a series of commands called Data Commands, which are indicated by the
general format Command(). These commands are used to read and write information in the bq34110 device’s
control and status registers, as well as its data flash locations.
Commands are sent from the host to the bq34110 device via I2C and can be executed during application
development, pack manufacture, or end-equipment operation. Cell information is stored in the bq34110 device in
non-volatile flash memory. Many of the data flash locations are accessible during application development and
pack manufacture. They cannot, generally, be accessed directly during end-equipment operation. Access to
these locations is achieved by using the bq34110 device’s companion evaluation software, through individual
commands, or through a sequence of data flash access commands. To access a desired data flash location, the
correct data flash subclass and offset must be known.
The bq34110 device provides 32 bytes of user-programmable data flash memory. This data space is accessed
through a data flash interface. For specifics on accessing the data flash, see the bq34110 Technical Reference
Manual (SLUUBF7).
A SHA-1/HMAC-based battery pack authentication feature is also implemented on the bq34110 device. When
the device is in UNSEALED mode, authentication keys can be (re)assigned. A scratch pad area is used to
receive challenge information from a host and to export SHA-1/HMAC encrypted responses. For more
information on authentication, see the bq34110 Technical Reference Manual (SLUUBF7).
7.3.1 Communications
7.3.1.1 I2C Interface
The bq34110 device supports the standard I2C read, incremental read, one-byte write quick read, and functions.
The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The
8-bit device address is therefore 0xAA or 0xAB for write or read, respectively.
10
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
Feature Description (continued)
Host Generated
S
0 A
ADDR[6:0]
Fuel Gauge Generated
A
CMD[7:0]
A P
DATA[7:0]
S
1
ADDR[6:0]
(a) 1-byte write
ADDR[6:0]
S
0 A
A
N P
DATA[7:0]
(b) quick read
CMD[7:0]
A Sr
1
ADDR[6:0]
A
DATA[7:0]
N P
...
DATA[7:0]
(c) 1-byte read
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
1
ADDR[6:0]
A
DATA[7:0]
A
N P
(d) incremental read
2
Figure 6. Supported I C formats: (a) 1-byte write, (b) quick read, (c) 1 byte-read, and (d) incremental read
(S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop).
The “quick read” returns data at the address indicated by the address pointer. The address pointer, a register
internal to the I2C communication engine, increments whenever data is acknowledged by the device or the I2C
master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to
consecutive command locations (such as 2-byte commands that require two bytes of data).
S
ADDR[6:0]
0
A
A
CMD[7:0]
A
DATA[7:0]
P
Figure 7. Attempt to Write a Read-Only Address (Nack After Data Sent By Master)
S
0
ADDR[6:0]
CMD[7:0]
A
N P
Figure 8. Attempt to Read an Address Above 0x7F (NACK Command)
S
ADDR[6:0]
0 A
CMD[7:0]
A
A
DATA[7:0]
DATA[7:0]
N
...
N P
Figure 9. Attempt at Incremental Writes (Nack All Extra Data Bytes Sent)
S
ADDR[6:0]
0 A
CMD[7:0]
A Sr
ADDR[6:0]
1
A
DATA[7:0]
Address
0x7F
A
...
DATA[7:0]
Data From
addr 0x7F
N P
Data From
addr 0x00
Figure 10. Incremental Read at the Maximum Allowed Read Address
7.3.1.2 I2C Time Out
The I2C engine releases both SDA and SCL if the I2C bus is held low for a time programmed in data flash. If the
device were holding the lines, releasing them frees the master to drive the lines.
Detailed examples of I2C transactions accessing gauge data can be found in the Using I2C Communication with
the bq275xx Series of Fuel Gauges Application Report (SLUA467).
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
11
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
7.4 Device Functional Modes
The bq34110 device has four functional power modes: NORMAL, SNOOZE, SLEEP, and SHUTDOWN, based
on firmware and/or host control.
• In NORMAL mode, the device is fully powered and can execute any allowable task.
• In SNOOZE mode, the device periodically wakes to take data measurements and updates the data set, after
which it then returns directly to SNOOZE.
• In SLEEP mode, the device maintains the low-frequency oscillator but turns off the high-frequency oscillator
and exists in a reduced-power state, periodically taking measurements and performing calculations.
• In SHUTDOWN mode, the device is fully powered down and can only be awakened using the chip enable
(CE) pin.
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The bq34110 gas gauge is a highly configurable device with multiple features that can be used individually or
simultaneously (with some restrictions). The CEDV gas gauging function together with its support for an external
voltage divider allows gauging of high voltage, multi-cell battery configurations of various chemistries. The EOS
Determination function is intended for rarely discharged applications and evaluates the condition of the battery
without requiring conventional maintenance cycles. These and additional features are described in detail in the
bq34110 Technical Reference Manual (SLUUBF7).
12
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
bq34110
www.ti.com
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
8.2 Typical Applications
Figure 11 is a simplified schematic of the bq34110 system used in a multi-cell configuration.
PACK+
RLEN
B
C
REGIN
10k
10k
100
I2C DATA
100
100
n series cells
I2C CLK
100
/ALERT2
1 VEN
SDA 14
2 ALERT1
SCL 13
/ALERT1
3 LEN
ALERT2 12
4 BAT
TS 11
REG25
10k NTC
0.1 µF
CHIP ENABLE
REGIN
A
REG25
0.1 µF
5 CE
SRN 10
6 REGIN
SRP 9
7 REG25
VSS 8
100
0.1 µF
0.1 µF
.01
75 ppm
100
0.1 µF
1 µF
PACK –
Copyright © 2016 , Texas Instruments Incorporated
If power control of the gauge is not required by the system, then CE should be
A
connected directly to REGIN.
Required for applications of more than one-series cell; otherwise, REGIN can connect
B
directly to single-cell BAT+ or an alternative power source.
Required for applications of more than one-series cell; otherwise, BAT connects
C
directly to single-cell BAT+ and VEN can be left unconnected.
Figure 11. bq34110 Simplified System Diagram
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
Product Folder Links: bq34110
13
bq34110
SLUSCI1B – AUGUST 2016 – REVISED NOVEMBER 2016
www.ti.com
Typical Applications (continued)
Figure 12 shows the schematic of the bq34110 EVM, and depicts how the device can be used in the system.
REGIN
REGIN
2
Q1
2N7002-7-F
1
R3
10.0k
1
Q2
BSS84W-7-F
2008-07-09
R5
165k
J1
R6
SDA
SCL
100
R7
R9
300k
BAT+
C1
U1
R16
BAT-
39357-0003
R18
0.01
100
C2
0.1µF
R20
BAT
ALERT1
13
14
SCL
SDA
ALERT2
9
10
SRP
SRN
6
7
100
NT1
Net-Tie
GND
J4
PEC02SAAN
4
PACK-
GND
GND
R13
300k
J5
GND
1
2
3
U3
R11
100k
J3
3300pF
J7
U2
1
1
R10
100k
R12
300k
2
4
6
22-05-3041
REGIN
GND
Q3
BSS138W-7-F
GND
1
3
5
SDA
SCL
GND
5
3
1
GND
REG25
1
2
R8
16.5k
4
3
2
1
100
2
D1
BZT52C5V6T-7
5.6V
2
J2
BAT+
BATPACK-
R4
10.0k
6
4
2
>5V
R2
100k
3
>5V
3
工商网监
湘ICP备2023018690号
