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DRV8821DCA

DRV8821DCA

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    HTSSOP48_12.5X6.1MM_EP

  • 描述:

    IC MTR DRV BIPOLR 8-32V 48HTSSOP

  • 数据手册
  • 价格&库存
DRV8821DCA 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 DRV8821 Dual Stepper Motor Controller and Driver 1 Features 3 Description • The DRV8821 provides a dual microstepping-capable stepper motor controller/driver solution for printers, scanners, and other office automation equipment applications. 1 • • • • • • Dual PWM Microstepping Motor Driver – Built-In Microstepping Indexers – Up to 1.5-A Current Per Winding – Three-Bit Winding Current Control Allows up to Eight Current Levels – Low MOSFET On-Resistance – Selectable Slow or Mixed Decay Modes 8-V to 32-V Operating Supply Voltage Range Internal Charge Pump for Gate Drive Built-in 3.3-V Reference Simple Step/Direction Interface Fully Protected Against Undervoltage, Overtemperature, and Overcurrent Thermally-Enhanced Surface Mount Package 2 Applications • • • • • • Printers Scanners Office Automation Machines Gaming Machines Factory Automation Robotics Two independent stepper motor driver circuits include four H-bridge drivers and microstepping-capable indexer logic. Each of the motor driver blocks employ N-channel power MOSFETs configured as an Hbridge to drive the motor windings. A simple step/direction interface allows easy interfacing to controller circuits. Pins allow configuration of the motor in full-step, half-step, quarter-step, or eighth step modes, and the selection of slow or mixed decay modes. Internal shutdown functions are provided for over current protection, short-circuit protection, undervoltage lockout, and overtemperature. The DRV8821 is packaged in a 48-pin HTSSOP package (Eco-friendly : RoHS & no Sb/Br). Device Information(1) PART NUMBER DRV8821 PACKAGE HTSSOP (48) BODY SIZE (NOM) 6.10 mm x 12.50 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Simplified Schematic 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 4 4 5 5 5 6 6 7 Absolute Maximum Ratings ..................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Timing Requirements ................................................ Dissipation Ratings ................................................... Typical Characteristics .............................................. Detailed Description .............................................. 9 7.1 Overview ................................................................... 9 7.2 Functional Block Diagram ....................................... 10 7.3 Feature Description................................................. 10 7.4 Device Functional Modes........................................ 14 8 Application and Implementation ........................ 16 8.1 Application Information............................................ 16 8.2 Typical Application ................................................. 16 9 Power Supply Recommendations...................... 19 9.1 Bulk Capacitance .................................................... 19 10 Layout................................................................... 20 10.1 Layout Guidelines ................................................. 20 10.2 Layout Example .................................................... 21 10.3 Thermal Considerations ........................................ 22 11 Device and Documentation Support ................. 24 11.1 11.2 11.3 11.4 11.5 Documentation Support ....................................... Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 24 24 24 24 24 12 Mechanical, Packaging, and Orderable Information ........................................................... 24 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision I (January 2014) to Revision J • Added Pin Functions table, ESD Ratings table, Thermal Information table, Detailed Description section, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section................................................................ 1 Changes from Revision H (August 2013) to Revision I • 2 Page Page Changed typo in Overcurrent Protection section ................................................................................................................. 14 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 5 Pin Configuration and Functions DCA Package 48-Pin HTSSOP Top View VM VM AOUT2 AISEN AOUT1 ABDECAY CP1 CP2 VCP PGND PGND Solder these PGND pins to copper PGND heatsink area PGND PGND V3P3 ABVREF CDVREF CDDECAY DOUT2 DISEN DOUT1 VM VM 1 48 2 3 47 46 4 45 5 6 44 43 7 8 42 41 9 40 10 11 39 38 12 13 37 36 14 15 35 34 16 17 33 32 18 19 20 31 30 29 21 28 27 22 23 24 26 25 BOUT1 BISEN BOUT2 ABSTEP ABUSM0 ABDIR ABENBLn ABUSM1 ABRESETn PGND PGND Solder these PGND pins to copper PGND heatsink area PGND PGND CDSTEP CDUSM0 CDDIR CDENBLn CDUSM1 CDRESETn COUT1 CISEN COUT2 Pin Functions PIN I/O (1) DESCRIPTION 1,2, 23, 24 — Motor supply voltage (multiple pins) Connect all VM pins together to motor supply voltage. Bypass each VM to GND with a 0.1-µF, 35-V ceramic capacitor. V3P3 16 — 3.3 V regulator output Bypass to GND with 0.47-μF, 6.3-V ceramic capacitor. GND 10-15, 34-39 — Power ground (multiple pins) Connect all PGND pins to GND and solder to copper heatsink areas. CP1 7 IO CP2 8 IO Charge pump flying capacitor Connect a 0.01-μF capacitor between CP1 and CP2 VCP 9 IO Charge pump storage capacitor Connect a 0.1-μF, 16 V ceramic capacitor to VM ABSTEP 45 I Motor AB step input Rising edge causes the indexer to move one step. ABDIR 43 I Motor AB direction input Level sets the direction of stepping. ABUSM0 44 I Motor AB microstep mode 0 ABUSM1 41 I Motor AB microstep mode 1 USM0 and USM1 set the step mode - full step, half step, quarter step, or eight microsteps/step. ABENBLn 42 I Motor AB enable input Logic high to disable motor AB outputs, logic low to enable. ABRESETn 40 I Motor AB reset input Active-low reset input initializes the indexer logic and disables the Hbridge outputs for motor AB. ABDECAY 6 I Motor AB decay mode Logic low for slow decay mode, high for mixed decay. ABVREF 17 I Motor AB current set reference voltage Sets current trip threshold. AOUT1 5 O Bridge A output 1 AOUT2 3 O Bridge A output 2 Connect to first coil of bipolar stepper motor AB, or DC motor winding. AISEN 4 — Bridge A current sense Connect to current sense resistor for bridge A. NAME NO. EXTERNAL COMPONENTS OR CONNECTIONS POWER AND GROUND VM (4 pins) MOTOR AB (1) Directions: i = input, O = output, OZ = 3-state output, OD = open-drain ouput, IO = input/ouput Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 3 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com Pin Functions (continued) PIN NAME NO. I/O (1) DESCRIPTION EXTERNAL COMPONENTS OR CONNECTIONS BOUT1 48 O Bridge B output 1 BOUT2 46 O Bridge B output 2 Connect to second coil of bipolar stepper motor AB, or DC motor winding. BISEN 47 — Bridge B current sense Connect to current sense resistor for bridge B. CDSTEP 33 I Motor CD step input Rising edge causes the indexer to move one step. CDDIR 31 I Motor CD direction input Level sets the direction of stepping. CDUSM0 32 I Motor CD microstep mode 0 CDUSM1 29 I Motor CD microstep mode 1 USM0 and USM1 set the step mode - full step, half step, quarter step, or eight microsteps/step. CDENBLn 30 I Motor CD enable input Logic high to disable motor CD outputs, logic low to enable. CDRESETn 28 I Motor CD reset input Active-low reset input initializes the indexer logic and disables the Hbridge outputs for motor CD. CDDECAY 19 I Motor CD decay mode Logic low for slow decay mode, high for mixed decay. Sets current trip threshold. MOTOR CD CDREF 18 I Motor CD current set reference voltage COUT1 27 O Bridge C output 1 COUT2 25 O Bridge C output 2 Connect to first coil of bipolar stepper motor CD, or DC motor winding. CISEN 26 — Bridge C current sense Connect to current sense resistor for bridge C. DOUT1 22 O Bridge D output 1 DOUT2 20 O Bridge D output 2 Connect to second coil of bipolar stepper motor CD, or DC motor winding. DISEN 21 — Bridge D current sense Connect to current sense resistor for bridge D. 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VM (2) MIN MAX UNIT Power supply voltage –0.3 34 V (3) –0.5 5.75 V 1.5 A VI Logic input voltage IO(peak) Peak motor drive output current, t < 1 μs IO Motor drive output current PD Continuous total power dissipation See Dissipation Ratings TJ Operating virtual junction temperature –40 150 °C TA Operating ambient temperature –40 85 °C Tstg Storage temperature –60 150 °C (1) (2) (3) (4) Internally limited (4) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. Input pins may be driven in this voltage range regardless of presence or absence of VM. Power dissipation and thermal limits must be observed. 6.2 ESD Ratings VALUE (1) 2000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) 1000 Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins V(ESD) (1) (2) 4 Electrostatic discharge UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VM Motor power supply voltage IMOT Continuous motor drive output current (1) VREF VREF input voltage (1) NOM MAX 32 V 1 1.5 A 4 V 8 1 UNIT Power dissipation and thermal limits must be observed. 6.4 Thermal Information DRV8821 THERMAL METRIC (1) DCA (HTSSOP) UNIT 48 PINS RθJA Junction-to-ambient thermal resistance 31.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 16.3 °C/W RθJB Junction-to-board thermal resistance 15 °C/W ψJT Junction-to-top characterization parameter 0.6 °C/W ψJB Junction-to-board characterization parameter 14.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 0.6 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 5 8 mA 2.5 μA 8 V POWER SUPPLIES IVM VM operating supply current VM = 24 V, no loads IVMSD VM shutdown supply current VM = 24 V, ABENBLn = CDENBLn = 1 VUVLO VM undervoltage lockout voltage VM rising 6.5 VCP Charge pump voltage Relative to VM 12 VV3P3 VV3P3 output voltage 3.20 3.30 V 3.40 V 0.7 V LOGIC-LEVEL INPUTS VIL Input low voltage VIH Input high voltage VHYS Input hysteresis IIN Input current (internal pulldown current) 2 0.3 V 0.45 VIN = 3.3 V 0.6 V 100 μA OVERTEMPERATURE PROTECTION tTSD Thermal shutdown temperature Die temperature 150 °C MOTOR DRIVER Rds(on) Motor AB FET on resistance (each individual FET) VM = 24 V, IO = 0.8 A, TJ = 25°C 0.25 VM = 24 V, IO = 0.8 A, TJ = 85°C 0.31 Rds(on) Motor CD FET on resistance (each individual FET) VM = 24 V, IO = 0.8 A, TJ = 25°C 0.30 VM = 24 V, IO = 0.8 A, TJ = 85°C 0.38 IOFF Off-state leakage current fPWM Motor PWM frequency (1) tBLANK ITRIP blanking time (2) tF Output fall time 50 300 ns tR Output rise time 50 300 ns (1) (2) 45 50 0.37 0.45 Ω Ω ±12 μA 55 kHz μs 3.75 Factory option 100 kHz. Factory options for 2.5 μs, 5 μs or 6.25 μs. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 5 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 3 4.5 IOCP Overcurrent protect level 1.5 tOCP Overcurrent protect trip time 2.5 tMD Mixed decay percentage Measured from beginning of PWM cycle UNIT A μs 75% VREF INPUT/CURRENT CONTROL ACCURACY IREF xVREF input current ΔICHOP xVREF = 3.3 V Chopping current accuracy –3 3 xVREF = 2.5 V, derived from V3P3; 71% to 100% current –5% 5% xVREF = 2.5 V, derived from V3P3; 20% to 56% current –10% 10% μA 6.6 Timing Requirements over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT 200 kHz 1 fSTEP Step frequency 2 tWH(STEP) Pulse duration, xSTEP high 2.5 μs 3 tWL(STEP) Pulse duration, xSTEP low 2.5 μs 4 tSU(STEP) Setup time, command to xSTEP rising 200 ns 5 tH(STEP) Hold time, command to xSTEP rising 200 ns 6 tWAKE Wakeup time, SLEEPn inactive to xSTEP 1 ms 6.7 Dissipation Ratings RθJA DERATING FACTOR ABOVE TA = 25°C TA < 25°C TA = 70°C TA = 85°C Low-K (1) 75.7°C/W 13.2 mW/°C 1.65 W 1.06 W 0.86 W Low-K (2) 32°C/W 31.3 mW/°C 3.91 W 2.50 W 2.03 W 30.3°C/W 33 mW/°C 4.13 W 2.48 W 2.15 W 22.3°C/W 44.8 mW/°C 5.61 W 3.59 W 2.91 W BOARD High-K (3) High-K (1) (2) (3) (4) (4) PACKAGE DCA The JEDEC Low-K board used to derive this data was a 76-mm x 114-mm, 2-layer, 1.6-mm thick PCB with no backside copper. The JEDEC Low-K board used to derive this data was a 76-mm x 114-mm, 2-layer, 1.6-mm thick PCB with 25-cm2 2-oz copper on back side. The JEDEC High-K board used to derive this data was a 76-mm x 114-mm, 4-layer, 1.6-mm thick PCB with no backside copper and solid 1-oz internal ground plane. The JEDEC High-K board used to derive this data was a 76-mm x 114-mm, 4-layer, 1.6-mm thick PCB with 25-cm2 1-oz copper on back side and solid 1-oz internal ground plane. 1 2 3 xSTEP xDIR, xUSMx 4 5 ABENBLn & CDENBLn 6 Figure 1. Timing Diagram 6 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 5.20 5.20 5.00 5.00 Supply Current (mA) Supply Current (mA) 6.8 Typical Characteristics 4.80 4.60 4.40 4.20 8V 4.00 24 V 4.80 4.60 -40°C 4.40 0°C 4.20 25°C 4.00 70°C 27 V 85°C 3.80 3.80 -40°C 0°C 25°C 70°C 85°C 8V Temperature (ƒC) Figure 2. Supply Current over Temperature 27 V C002 Figure 3. Supply Current over Supply Voltage 45.00 45.00 40.00 Charge Pump Voltage (V) 40.00 Charge Pump Voltage (V) 24 V Supply Voltage (V) C001 35.00 30.00 8V 25.00 24 V 27 V 20.00 35.00 30.00 25.00 -40°C 20.00 0°C 15.00 25°C 10.00 15.00 5.00 10.00 0.00 70°C 85°C -40°C 0°C 25°C 70°C 8V 85°C Temperature (ƒC) 600.00 500.00 500.00 400.00 400.00 Rdson (mŸ) 600.00 300.00 200.00 27 V 300.00 200.00 8V 100.00 C006 Figure 5. Charge Pump Voltage over Supply Voltage Figure 4. Charge Pump Voltage over Temperature Rdson (mŸ) 24 V Supply Voltage (V) C005 8V 100.00 24 V 24 V 27 V 27 V 0.00 0.00 -40°C 0°C 25°C 70°C 85°C Temperature (ƒC) -40°C Figure 6. LS RDSON AOUT2 over Temperature 0°C 25°C 70°C 85°C Temperature (ƒC) C007 C008 Figure 7. LS RDSON A OUT1over Temperature Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 7 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 600.00 600.00 500.00 500.00 400.00 400.00 Rdson (mŸ) Rdson (mŸ) Typical Characteristics (continued) 300.00 200.00 300.00 200.00 8V 100.00 8V 100.00 24 V 24 V 27 V 27 V 0.00 0.00 -40°C 0°C 25°C 70°C 85°C Temperature (ƒC) Figure 8. HS RDSON AOUT2 over Temperature 8 -40°C 0°C 25°C 70°C 85°C Temperature (ƒC) C009 C010 Figure 9. HS RDSON AOUT1 over Temperature Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 7 Detailed Description 7.1 Overview The DRV8821 is a dual stepper motor driver solution for applications that require independent control of two different motors. The device integrates four NMOS H-bridges, a microstepping indexer, and various fault protection features. The DRV8821 can be powered with a supply voltage between 8 and 32 V, and is capable of providing an output current up to 1.5-A full scale. Actual full-scale current will depend on ambient temperature, supply voltage, and PCB ground size. A simple STEP/DIR interface allows easy interfacing to the controller circuit. The internal indexer is able to execute high-accuracy microstepping without requiring the processor to control the current level. The indexer is cable of full step and half step as well as microstepping to 1/4 and 1/8. The current regulation is configurable with two different decay modes; slow decay and mixed decay. The mixed decay mode uses slow decay on increasing current steps and mixed decay on decreasing current steps, while slow decay mode will always use slow decay regardless increasing or decreasing steps. The gate drive to each FET in all four H-Bridges is controlled to prevent any cross-conduction (shoot through current) during transitions. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 9 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 7.2 Functional Block Diagram CP1 Dig. VCC Charge Pump and Gat e Drive Regulator 3.3V Regulator V3P3 0.47µF 6.3V CP2 0.01µF 35V +24 VCP VGD 0.1µF 16V VCP · ABVREF VM · +24 0.1µF, 35V AOUT1 PWM H-b ridge driver A Step Motor AOUT2 ABSTEP AISEN ABDIR +24 ABENBLn VM ABUSM0 · 0.1µF, 35V ABUSM1 BOUT1 PWM H-bridge driver B ABDECAY BOUT2 ABRESETn BISEN I ndexer Logic +24 CDSTEP VM · CDDIR PWM H-bridge driver C CDENBLn 0.1µF, 35V COUT1 CDUSM0 COUT2 CDUSM1 CI SEN Step Motor CD DEC AY +24 CDRESETn VM 0.1µF, 35V DOUT1 PWM H-bridge driver D CDVREF · DOUT2 DISEN OCP Thermal Shut down Oscillator UVLO RESET GND 7.3 Feature Description 7.3.1 PWM Motor Drivers The DRV8821 contains four H-bridge motor drivers with current-control PWM circuitry. A block diagram showing drivers A and B of the motor control circuitry (as typically used to drive a bipolar stepper motor) is shown below. Drivers C and D are the same as A and B (though the Rds(on) of the output FETs is different). 10 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 Feature Description (continued) VM OC P VM VC P, VGD A OU T1 From Indexer Logic Predrive AEN B L Step Motor APH A SE A OU T2 A BD EC A Y PW M OC P A I[2:0] 3 + A I[2:0] A IS EN A =5 DAC 3 A BVR EF VM OC P VM V CP, VGD BOU T1 Predrive B EN BL B OU T2 BPH A SE PW M OC P B ISEN + B I[2:0] A =5 DAC 3 Figure 10. Block Diagram Note that there are multiple VM motor power supply pins. All VM pins must be connected together to the motor supply voltage. 7.3.2 Current Regulation The PWM chopping current is set by a comparator which compares the voltage across a current sense resistor connected to the xISEN pins, multiplied by a factor of 5, with a reference voltage. The reference voltage is input from the xVREF pin. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 11 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com Feature Description (continued) The full-scale (100%) chopping current is calculated as follows: 5 (1) Example: If a 0.5-Ω sense resistor is used and the VREFx pin is 2.5 V, the full-scale (100%) chopping current is 2.5 V/(5 × 0.5 Ω) = 1 A. The reference voltage is also scaled by an internal DAC that allows torque control for fractional stepping of a bipolar stepper motor, as described in Microstepping Indexer. 7.3.3 Blanking Time After the current is enabled in an H-bridge, the voltage on the xISEN pin is ignored for a fixed period of time before enabling the current sense circuitry. This blanking time is fixed at 3.75 μs. Note that the blanking time also sets the minimum on time of the PWM. 7.3.4 Microstepping Indexer Built-in indexer logic in the DRV8821 allows a number of different stepping configurations. The xUSM1 and xUSM0 pins are used to configure the stepping format as shown in the table below: Table 1. Microstepping Selection Bits xUSM1 xUSM0 STEP MODE 0 0 Full step (2-phase excitation) 0 1 ½ step (1-2 phase excitation) 1 0 1/4 step (W1-2 phase excitation) 1 1 Eight microsteps/steps The following table shows the relative current and step directions for different settings of xUSM1 and xUSM0. At each rising edge of the xSTEP input, the indexer travels to the next state in the table. The direction is shown with the DIR pin high; if the xDIR pin is low the sequence is reversed. Positive current is defined as xOUT1 = positive with respect to xOUT2. Note that the home state is 45 degrees. This state is entered at power-up, during sleep mode, or application of xRESETn. Motor AB and motor CD act independently, and their indexer logic functions identically. 12 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 Table 2. Microstepping Indexer FULL STEP xUSM = 00 1/4 STEP xUSM = 10 1/8 STEP xUSM = 11 1 1 1 100 0 0 2 98 20 11.25 3 92 38 22.5 4 83 56 33.75 5 71 71 45 (home state) 6 56 83 56.25 7 38 92 67.5 8 20 98 78.75 2 1 2 3 4 3 5 6 2 4 7 8 5 9 10 3 6 11 12 7 13 14 4 AOUTx BOUTx CURRENT CURRENT (% FULL-SCALE) (% FULL-SCALE) ½ STEP xUSM = 01 8 15 16 STEP ANGLE (DEGREES) 9 0 100 90 10 –20 98 101.25 11 –38 92 112.5 12 –56 83 123.75 13 –71 71 135 14 –83 56 146.25 15 –92 38 157.5 16 –98 20 168.75 17 –100 0 180 18 –98 –20 191.25 19 –92 –38 202.5 20 –83 –56 213.75 21 –71 –71 225 22 –56 –83 236.25 23 –38 –92 247.5 24 –20 –98 258.75 25 0 –100 270 26 20 –98 281.25 27 38 –92 292.5 28 56 –83 303.75 29 71 –71 315 30 83 –56 326.25 31 92 –38 337.5 32 98 –20 348.75 7.3.5 xRESETn and xENBLn Operation The xRESETn pin, when driven active low, resets the step table to the home position. It also disables the Hbridge drivers. The xSTEP input is ignored while xRESETn is active. Note that there is a separate xRESETn pin for each motor; each acts only on one of the two motor controllers. The xENABLEn pin is used to control the output drivers. When xENBLn is low, the output H-bridges are enabled. When xENBLn is high, the H-bridges are disabled and the outputs are in a high-impedance state.. Note that there is a separate xENBLn pin for each motor; each acts only on one of the two motor drivers. Note that when xENBLn is high, the input pins and control logic, including the indexer (xSTEP and xDIR pins) are still functional. Driving both ABENBLn and CDENBLn high will put the device into a low power sleep state. In this state, the Hbridges are disabled, both indexers are reset to the home state, the gate drive charge pump is stopped, and all internal clocks are stopped. In this state all inputs are ignored until one or both of the xENBLn pits return active low. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 13 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 7.3.6 Protection Circuits The DRV8821 is fully protected against undervoltage, overcurrent and overtemperature events. 7.3.6.1 Overcurrent Protection (OCP) All of the drivers in DRV8821 are protected with an OCP (Over-Current Protection) circuit. The OCP circuit includes an analog current limit circuit, which acts by removing the gate drive from each output FET if the current through it exceeds a preset level. This circuit will limit the current to a level that is safe to prevent damage to the FET. A digital circuit monitors the analog current limit circuits. If any analog current limit condition exists for longer than a preset period, all drivers in the device will be disabled. The device is re-enabled upon the removal and re-application of power at the VM pins. 7.3.6.2 Thermal Shutdown (TSD) If the die temperature exceeds safe limits, all drivers in the device will be shut down. The device will remain disabled until the die temperature has fallen to a safe level. After the temperature has fallen, the device may be re-enabled upon the removal and re-application of power at the VM pin. 7.3.6.3 Undervoltage Lockout (UVLO) If at any time the voltage on the VM pins falls below the undervoltage lockout threshold voltage, all circuitry in the device will be disabled. Operation will resume when VM rises above the UVLO threshold. The indexer logic will be reset to its initial condition in the event of an undervoltage lockout. 7.3.6.4 Shoot-Through Current Prevention The gate drive to each FET in the H-bridge is controlled to prevent any cross-conduction (shoot through current) during transitions. 7.4 Device Functional Modes 7.4.1 Decay Mode The DRV8821 supports two different decay modes: slow decay or mixed decay. The mixed decay mode uses slow decay on increasing steps and mixed decay on decreasing steps. Mixed decay mode begins as fast decay but after a period of time (75% of the PWM cycle), switches to slow decay mode for the remainder of the fixed PWM period. During PWM current chopping, the H-bridge is enabled to drive through the motor winding until the PWM current chopping threshold is reached. This is shown in Figure 11 as case 1. The current flow direction shown indicates positive current flow in Figure 11. Once the chopping current threshold is reached, the H-bridge can operate in two different states, fast decay or slow decay. In fast decay mode, once the PWM chopping current level has been reached, the H-bridge reverses state to allow winding current to flow in a reverse direction. As the winding current approaches zero, the bridge is disabled to prevent any reverse current flow. Fast-decay mode is shown in Figure 11 as case 2. In slow-decay mode, winding current is re-circulated by enabling both of the low-side FETs in the bridge. This is shown in Figure 11 as case 3. 14 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 Device Functional Modes (continued) VM 1 Drive current 1 xOUT2 xOUT1 3 2 Fast decay (reverse) 3 Slow decay (brake) 2 Figure 11. Decay Mode The DRV8821 also supports a mixed decay mode. Mixed decay mode begins as fast decay, but after a period of time (75% of the PWM cycle) switches to slow decay mode for the remainder of the fixed PWM period. Mixed decay mode is only active if the current through the winding is decreasing (per the indexer step table); if the current is increasing, then slow decay is always used. Slow or mixed decay mode is selected by the state of the xDECAY pins - logic low selects slow decay, and logic high selects mixed decay operation. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 15 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The DRV8821 can be used to drive two bipolar stepper motors. 8.2 Typical Application Figure 12. Typical Application Schematic 16 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 Typical Application (continued) 8.2.1 Design Requirements Table 3 shows the design parameters. Table 3. Design Parameters DESIGN PARAMETER REFERENCE EXAMPLE VALUE Supply voltage VM 24 V Motor winding resistance RL 7.4 Ω/phase Motor step full angle θstep 1.8°/step Target microstepping angle nm 1/8 step Target motor speed V 120 rpm Target full-scale current IFS 1A 8.2.2 Detailed Design Procedure 8.2.2.1 Stepper Motor Speed The first step in configuring the DRV8821 requires the desired motor speed and stepping level. The DRV8821 can support from full step to 1/8 step mode. If the target motor speed is too high, the motor will not spin. Make sure that the motor can support the target speed. For a desired motor speed (v), a microstepping level (nm), and motor full step angle (θstep). v (rpm) ´ 360 (° / rot) ƒ step (steps / s) = qstep (° / step) ´ nm (steps / mirostep) ´ 60 (s / min) (2) θstep can be found in the stepper motor data sheet or often written on the motor itself. For DRV8821, the microstepping levels are set by the xUSM0/xUSM1 pins and can be any of the settings in Table 1. Higher microstepping means a smoother motor motion and less audible noise, but increases the switching losses and requires a higher ƒstep to achieve the same motor speed. 8.2.2.2 Current Regulation The chopping current (ICHOP) is the maximum current driven through either winding. This quality will depend on the sense resistor value (RXISEN). VREFX ICHOP = 5 ´ RISENSE (3) ICHOP is set by a comparator which compares the voltage across RXISEN to a reference voltage. Note that ICHOP must follow Equation 4 to avoid saturating the motor. VM (V ) ICHOP (A ) < RL (W ) + 2 ´ RDS(ON) (W ) + RSENSE (W) where • • VM is the motor supply voltage. RL is the motor winding resistance. (4) Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 17 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 8.2.3 Application Curves 18 Figure 13. ½ Step Microstepping with Slow Decay Figure 14. 1/8 Step Microstepping with Slow Decay Figure 15. 1/2 Step Microstepping with Mixed Decay Figure 16. 1/8 Step Microstepping with Mixed Decay Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 9 Power Supply Recommendations 9.1 Bulk Capacitance Having appropriate local bulk capacitance is an important factor in motor drive system design. It is generally beneficial to have more bulk capacitance, while the disadvantages are increased cost and physical size. The amount of local capacitance needed depends on a variety of factors, including: • The highest current required by the motor system. • The power supply's capacitance and ability to source current. • The amount of parasitic inductance between the power supply and motor system. • The acceptable voltage ripple. • The type of motor used (Brushed DC, Brushless DC, Stepper). • The motor breaking method. The inductance between the power supply and motor drive system will limit the rate current can change from the power supply. If the local bulk capacitance is too small, the system will respond to excessive current demands or dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage remains stable and high current can be quickly supplied. The datasheet generally provides a recommended value, but system-level testing is required to determine the appropriate sized bulk capacitor. Figure 17. Example Setup of Motor Drive System with External Power Supply The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases when the motor transfers energy to the supply. Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 19 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 10 Layout 10.1 Layout Guidelines The bulk capacitor should be placed to minimize the distance of the high-current path through the motor driver device. The connecting metal trace widths should be as wide as possible, and numerous vias should be used when connecting PCB layers. These practices minimize inductance and allow the bulk capacitor to deliver high current. Small-value capacitors should be ceramic, and placed closely to device pins. The high-current device outputs should use wide metal traces. The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the I2 × RDS(on) heat that is generated in the device. 20 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 10.2 Layout Example Figure 18. Typical Layout of DRV8821 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 21 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 10.3 Thermal Considerations The DRV8821 has thermal shutdown (TSD) as described Thermal Shutdown (TSD). If the die temperature exceeds approximately 150°C, the device will be disabled until the temperature drops to a safe level. Any tendency of the device to enter thermal shutdown is an indication of either excessive power dissipation, insufficient heatsinking, or too high an ambient temperature. 10.3.1 Power Dissipation Power dissipation in the DRV8821 is dominated by the power dissipated in the output FET resistance, or RDS(ON). Average power dissipation when running a stepper motor can be roughly estimated by Equation 5. PTOT = 4 · RDS(ON) · (IOUT(RMS)) 2 (5) where PTOT is the total power dissipation, RDS(ON) is the resistance of each FET, and IOUT(RMS) is the RMS output current being applied to each winding. IOUT(RMS) is equal to the approximately 0.7x the full-scale output current setting. The factor of 4 comes from the fact that there are two motor windings, and at any instant two FETs are conducting winding current for each winding (one high-side and one low-side). Remember that the DRV8821 has two stepper motor drivers, so the power dissipation of each must be added together to determine the total device power dissipation. The maximum amount of power that can be dissipated in the DRV8821 is dependent on ambient temperature and heatsinking. The thermal dissipation ratings table in the datasheet can be used to estimate the temperature rise for typical PCB constructions. Note that RDS(ON) increases with temperature, so as the device heats, the power dissipation increases. This must be taken into consideration when sizing the heatsink. 10.3.2 Heatsinking The PowerPAD™ package uses an exposed pad to remove heat from the device. For proper operation, this pad must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane, this can be accomplished by adding a number of vias to connect the thermal pad to the ground plane. On PCBs without internal planes, copper area can be added on either side of the PCB to dissipate heat. If the copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat between top and bottom layers. For details about how to design the PCB, refer to TI application report, PowerPAD™ Thermally Enhanced Package SLMA002 and TI application brief, PowerPAD™ Made Easy, SLMA004 available at www.ti.com. In general, the more copper area that can be provided, the more power can be dissipated. Figure 19 shows thermal resistance vs. copper plane area for both a single-sided PCB with 2-oz copper heatsink area, and a 4layer PCB with 1-oz copper and a solid ground plane. Both PCBs are 76 mm x 114 mm, and 1.6 mm thick. It can be seen that the heatsink effectiveness increases rapidly to about 20 cm2, then levels off somewhat for larger areas. Six pins on the center of each side of the package are also connected to the device ground. A copper area can be used on the PCB that connects to the PowerPAD™ as well as to all the ground pins on each side of the device. This is especially useful for single-layer PCB designs. 22 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 DRV8821 www.ti.com SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 Thermal Considerations (continued) 70 65 Thermal Resistance (RqJA) - °C/W 60 55 50 45 Low-K PCB (2 layer) 40 35 30 High-K PCB (4 layer with ground plane) 25 20 0 10 20 30 40 50 60 70 80 90 2 Backside Copper Area - cm Figure 19. Thermal Resistance vs Copper Plane Area Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 23 DRV8821 SLVS912J – JANUARY 2009 – REVISED JANUARY 2016 www.ti.com 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For details about how to design the PCB, refer to TI application report, PowerPAD™ Thermally Enhanced Package SLMA002 and TI application brief, PowerPAD™ Made Easy, SLMA004 available at www.ti.com. 11.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.3 Trademarks PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 24 Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Product Folder Links: DRV8821 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) DRV8821DCA ACTIVE HTSSOP DCA 48 40 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 DRV8821 DRV8821DCAR ACTIVE HTSSOP DCA 48 2000 RoHS & Green NIPDAU Level-3-260C-168 HR -40 to 85 DRV8821 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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