DS91C176TMA-NS

National Semiconductor is now part of Texas Instruments. Search http://www.ti.com/ for the latest technical information and details on our current products and services. DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers General Description The DS91C176 and DS91D176 are 100 MHz single channel M-LVDS (Multipoint Low Voltage Differential Signaling) transceivers designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a new bus interface standard (TIA/ EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver thresholds and increased drive strength are sone of the key enhancments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks. The DS91C176/DS91D176 are half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver inputs and convert them to differential M-LVDS signals. The receiver inputs accept low voltage differential signals (LVDS, B-LVDS, MLVDS, LV-PECL and CML) and convert them to 3V LVCMOS signals. The DS91D176 has a M-LVDS type 1 receiver input with no offset. The DS91C176 has an M-LVDS type 2 receiver which enable failsafe functionality. Features ■ DC to 100+ MHz / 200+ Mbps low power, low EMI operation ■ Optimal for ATCA, uTCA clock distribution networks ■ Meets or exceeds TIA/EIA-899 M-LVDS Standard ■ Wide Input Common Mode Voltage for Increased Noise ■ ■ ■ ■ Immunity DS91D176 has type 1 receiver input DS91C176 has type 2 receiver with fail-safe Industrial temperature range Space saving SOIC-8 package Typical Application in an ATCA Clock Distribution Network 20024630 © 2009 National Semiconductor Corporation 200246 www.national.com DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers November 9, 2009 DS91D176/DS91C176 Connection and Logic Diagram 20024601 Top View Order Number DS91D176TMA, DS91C176TMA See NS Package Number M08A Ordering Information Order Number Receiver Input Function Package Type DS91D176TMA type 1 Data (0V threshold receiver) SOIC/M08A DS91C176TMA type 2 Control (100 mV offset fail-safe receiver) SOIC/M08A M-LVDS Receiver Types The EIA/TIA-899 M-LVDS standard specifies two different types of receiver input stages. A type 1 receiver has a conventional threshold that is centered at the midpoint of the input amplitude, VID/2. A type 2 receiver has a built in offset that is 100mV greater than VID/2. The type 2 receiver offset acts as a failsafe circuit where open or short circuits at the input will always result in the output stage being driven to a low logic state. 20024640 FIGURE 1. M-LVDS Receiver Input Thresholds www.national.com 2 If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. (CDM 0Ω, 0pF) Recommended Operating Conditions Supply Voltage, VCC Voltage at Any Bus Terminal Min Typ Max Units 3.0 3.3 3.6 V −1.4 +3.8 V  (Separate or Common-Mode) Differential Input Voltage VID LVTTL Input Voltage High VIH 2.0 LVTTL Input Voltage Low VIL 0 Operating Free Air Temperature TA −40 150°C/W  θJC Maximum Junction Temperature Storage Temperature Range ≥ 8 kV ≥ 250 V ≥ 1000 V (EIAJ 0Ω, 200pF) Supply Voltage, VCC −0.3V to +4V Control Input Voltages −0.3V to (VCC + 0.3V) Driver Input Voltage −0.3V to (VCC + 0.3V) Driver Output Voltages −1.8V to +4.1V Receiver Input Voltages −1.8V to +4.1V Receiver Output Voltage −0.3V to (VCC + 0.3V) Maximum Package Power Dissipation at +25°C SOIC Package 833 mW Derate SOIC Package 6.67 mW/°C above +25°C Thermal Resistance (4-Layer, 2 oz. Cu, JEDEC)  θJA 260°C 63°C/W 150°C −65°C to +150°C +25 2.4 VCC 0.8 V V V +85 °C Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2, Note 3, Note 4, Note 8) Symbol Parameter Conditions Min Typ Max Units 650 mV M-LVDS Driver |VAB| Differential output voltage magnitude RL = 50Ω, CL = 5pF ΔVAB Change in differential output voltage magnitude between logic states Figure 2 and Figure 4 VOS(SS) Steady-state common-mode output voltage RL = 50Ω, CL = 5pF |ΔVOS(SS)| Change in steady-state common-mode output voltage between logic states Figure 2 and Figure 3 VOS(PP) Peak-to-peak common-mode output voltage (VOS(PP) @ 500KHz clock) VA(OC) Maximum steady-state open-circuit output voltage Figure 5 VB(OC) Maximum steady-state open-circuit output voltage VP(H) Voltage overshoot, low-to-high level output VP(L) Voltage overshoot, high-to-low level output 480 −50 0 +50 mV 0.3 1.8 2.1 V +50 mV 0 135 RL = 50Ω, CL = 5pF, CD = 0.5pF Figure 7 and Figure 8 (Note 9) mV 0 2.4 V 0 2.4 V 1.2VSS V −0.2VS V S IIH High-level input current (LVTTL inputs) VIH = 2.0V -15 15 μA IIL Low-level input current (LVTTL inputs) VIL = 0.8V -15 15 μA VIKL Input Clamp Voltage (LVTTL inputs) IIN = -18mA -1.5 IOS Differential short-circuit output current Figure 6 -43 43 mA 20 50 mV 94 150 mV V M-LVDS Receiver VIT+ Positive-going differential input voltage threshold See Function Tables VIT− Negative-going differential input voltage threshold See Function Tables Type 1 Type 2 VOH High-level output voltage (LVTTL output) IOH = −8mA VOL Low-level output voltage (LVTTL output) IOL = 8mA IOZ TRI-STATE output current VO = 0V or 3.6V IOSR Short-circuit receiver output current (LVTTL output) VO = 0V Type 1 −50 20 mV Type 2 50 94 mV 2.4 2.7 0.28 −10 -48 V 0.4 V 10 μA -90 mA 32 µA +20 µA M-LVDS Bus (Input and Output) Pins IA Transceiver input/output current VA = 3.8V, VB = 1.2V VA = 0V or 2.4V, VB = 1.2V −20 VA = −1.4V, VB = 1.2V −32 3 µA www.national.com DS91D176/DS91C176 Lead Temperature (Soldering, 4 seconds) ESD Ratings: (HBM 1.5kΩ, 100pF) Absolute Maximum Ratings (Note 1) DS91D176/DS91C176 Symbol IB Parameter Transceiver input/output current Conditions Min Typ VB = 3.8V, VA = 1.2V VB = 0V or 2.4V, VA = 1.2V −20 VB = −1.4V, VA = 1.2V −32 IAB Transceiver input/output differential current (IA − IB) VA = VB, −1.4V ≤ V ≤ 3.8V IA(OFF) Transceiver input/output power-off current Max Units 32 µA +20 µA µA −4 VA = 3.8V, VB = 1.2V, DE = VCC +4 µA 32 µA +20 µA 0V ≤ VCC ≤ 1.5V VA = 0V or 2.4V, VB = 1.2V, DE = VCC −20 VA = −1.4V, VB = 1.2V, DE =VCC −32 0V ≤ VCC ≤ 1.5V µA 0V ≤ VCC ≤ 1.5V IB(OFF) Transceiver input/output power-off current VB = 3.8V, VA = 1.2V, DE = VCC 32 µA +20 µA 0V ≤ VCC ≤ 1.5V VB = 0V or 2.4V, VA = 1.2V, DE = VCC −20 VB = −1.4V, VA = 1.2V, DE = VCC −32 VA = VB, −1.4V ≤ V ≤ 3.8V, DE = VCC −4 0V ≤ VCC ≤ 1.5V µA 0V ≤ VCC ≤ 1.5V IAB(OFF) Transceiver input/output power-off differential current (IA(OFF) − IB(OFF)) +4 µA 0V ≤ VCC ≤ 1.5V CA Transceiver input/output capacitance CB Transceiver input/output capacitance CAB CA/B VCC = OPEN 9 pF 9 pF Transceiver input/output differential capacitance 5.7 pF Transceiver input/output capacitance balance (CA/CB) 1.0 SUPPLY CURRENT (VCC) ICCD Driver Supply Current RL = 50Ω, DE = VCC, RE = VCC ICCZ TRI-STATE Supply Current DE = GND, RE = VCC ICCR Receiver Supply Current DE = GND, RE = GND www.national.com 4 20 29.5 mA 6 9.0 mA 14 18.5 mA Over recommended operating supply and temperature ranges unless otherwise specified. (Note 3, Note 8) Symbol Parameter Conditions Min Typ Max Units DRIVER AC SPECIFICATION tPLH Differential Propagation Delay Low to High RL = 50Ω, CL = 5 pF, 1.3 3.4 5.0 ns tPHL Differential Propagation Delay High to Low CD = 0.5 pF 1.3 3.1 5.0 ns tSKD1 (tsk(p)) Pulse Skew |tPLHD − tPHLD| (Note 5, Note 9) Figure 7 and Figure 8 300 420 ps tSKD3 Part-to-Part Skew (Note 6, Note 9) 1.3 ns tTLH (tr) Rise Time (Note 9) 1.0 1.8 3.0 ns tTHL (tf) Fall Time (Note 9) 1.0 1.8 3.0 ns tPZH Enable Time (Z to Active High) RL = 50Ω, CL = 5 pF, 8 ns tPZL Enable Time (Z to Active Low ) CD = 0.5 pF 8 ns tPLZ Disable Time (Active Low to Z) Figure 9 and Figure 10 8 ns tPHZ Disable Time (Active High to Z) 8 ns tJIT Random Jitter, RJ (Note 9) 5.5 psrms fMAX Maximum Data Rate 100 MHz Clock Pattern (Note 7) 2.5 200 Mbps RECEIVER AC SPECIFICATION tPLH Propagation Delay Low to High CL = 15 pF 2.0 4.7 7.5 ns tPHL Propagation Delay High to Low Figures 11, 12 and Figure 13 2.0 5.3 7.5 ns tSKD1 (tsk(p)) Pulse Skew |tPLHD − tPHLD| (Note 5, Note 9) 0.6 1.7 ns tSKD3 Part-to-Part Skew (Note 6, Note 9) tTLH (tr) Rise Time (Note 9) tTHL (tf) Fall Time (Note 9) tPZH Enable Time (Z to Active High) RL = 500Ω, CL = 15 pF tPZL Enable Time (Z to Active Low) Figure 14 and Figure 15 tPLZ Disable Time (Active Low to Z) tPHZ Disable Time (Active High to Z) fMAX Maximum Data Rate 1.3 ns 0.5 1.2 2.5 ns 0.5 1.2 2.5 ns 10 ns 10 ns 10 ns 10 200 ns Mbps Note 1: “Absolute Maximum Ratings” are those beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The tables of “Electrical Characteristics” provide conditions for actual device operation. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. Note 3: All typicals are given for VCC = 3.3V and TA = 25°C. Note 4: The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this datasheet. Note 5: tSKD1, |tPLHD − tPHLD|, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. Note 6: tSKD3, Part-to-Part Skew, is defined as the difference between the minimum and maximum specified differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range. Note 7: Stimulus and fixture Jitter has been subtracted. Note 8: CL includes fixture capacitance and CD includes probe capacitance. Note 9: Not production tested. Guaranteed by a statistical analysis on a sample basis at the time of characterization. 5 www.national.com DS91D176/DS91C176 Switching Characteristics DS91D176/DS91C176 Test Circuits and Waveforms 20024614 FIGURE 2. Differential Driver Test Circuit 20024644 FIGURE 3. Differential Driver Waveforms 20024622 FIGURE 4. Differential Driver Full Load Test Circuit www.national.com 6 DS91D176/DS91C176 20024612 FIGURE 5. Differential Driver DC Open Test Circuit 20024625 FIGURE 6. Differential Driver Short-Circuit Test Circuit 20024616 FIGURE 7. Driver Propagation Delay and Transition Time Test Circuit 7 www.national.com DS91D176/DS91C176 20024618 FIGURE 8. Driver Propagation Delays and Transition Time Waveforms 20024619 FIGURE 9. Driver TRI-STATE Delay Test Circuit 20024621 FIGURE 10. Driver TRI-STATE Delay Waveforms www.national.com 8 DS91D176/DS91C176 20024615 FIGURE 11. Receiver Propagation Delay and Transition Time Test Circuit 20024617 FIGURE 12. Type 1 Receiver Propagation Delay and Transition Time Waveforms 20024623 FIGURE 13. Type 2 Receiver Propagation Delay and Transition Time Waveforms 9 www.national.com DS91D176/DS91C176 20024613 FIGURE 14. Receiver TRI-STATE Delay Test Circuit 20024620 FIGURE 15. Receiver TRI-STATE Delay Waveforms www.national.com 10 DS91D176/DS91C176 Function Tables DS91D176/DS91C176 Transmitting Inputs Outputs RE DE D B A X X X 2.0V 2.0V 0.8V 2.0V 0.8V X L H Z H L Z X — Don't care condition Z — High impedance state DS91C176 Receiving DS91D176 Receiving Inputs Output Inputs Output RE DE A−B R RE DE A−B R 0.8V 0.8V 0.8V 0.8V 0.8V L 0.8V 0.8V ≥ +0.15V ≤ +0.05V H 0.8V ≥ +0.05V ≤ −0.05V H 0.8V 2.0V 0.8V 0.8V 0V X X Z 0.8V 2.0V 0.8V 0.8V 0V X L Z X — Don't care condition Z — High impedance state L X — Don't care condition Z — High impedance state DS91D176 Receiver Input Threshold Test Voltages Applied Voltages Resulting Differential Input Voltage Resulting Common-Mode Input Voltage Receiver Output VIA VIB VID VIC R 2.400V 0.000V 3.800V 3.750V −1.400V −1.350V 0.000V 2.400V 3.750V 3.800V −1.350V −1.400V 2.400V −2.400V 0.050V −0.050V −0.050V 0.050V 1.200V 1.200V 3.775V 3.775V −1.375V −1.375V H L H L H L H — High Level L — Low Level Output state assumes that the receiver is enabled (RE = L) DS91C176 Receiver Input Threshold Test Voltages Applied Voltages Resulting Differential Input Voltage Resulting Common-Mode Input Voltage Receiver Output VIA VIB VID VIC R 2.400V 0.000V 3.800V 3.800V −1.250V −1.350V 0.000V 2.400V 3.650V 3.750V −1.400V −1.400V 2.400V −2.400V 0.150V 0.050V 0.150V 0.050V 1.200V 1.200V 3.725V 3.775V −1.325V −1.375V H L H L H L H — High Level L — Low Level Output state assumes that the receiver is enabled (RE = L) 11 www.national.com DS91D176/DS91C176 Pin Descriptions Pin No. Name 1 R Description 2 RE Receiver enable pin: When RE is high, the receiver is disabled. When RE is low or open, the receiver is enabled. 3 DE Driver enable pin: When DE is low, the driver is disabled. When DE is high, the driver is enabled. Receiver output pin 4 D 5 GND Driver input pin 6 A Non-inverting driver output pin/Non-inverting receiver input pin 7 B Inverting driver output pin/Inverting receiver input pin 8 VCC Ground pin Power supply pin, +3.3V ± 0.3V Typical Performance Characteristics Supply Current vs. Frequency Output VOD vs. Load Resistance 20024662 20024663 Supply Current measured using a clock pattern with driver terminated to 50ohms .VCC = 3.3V, TA = +25°C VCC = 3.3V, TA = +25°C. FIGURE 16. DS91D176/DS91C176 Typical Performance Characteristics www.national.com 12 DS91D176/DS91C176 Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS91D176TMA, DS91C176TMA See NS package Number M08A 13 www.national.com DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Design Support Amplifiers www.national.com/amplifiers WEBENCH® Tools www.national.com/webench Audio www.national.com/audio App Notes www.national.com/appnotes Clock and Timing www.national.com/timing Reference Designs www.national.com/refdesigns Data Converters www.national.com/adc Samples www.national.com/samples Interface www.national.com/interface Eval Boards www.national.com/evalboards LVDS www.national.com/lvds Packaging www.national.com/packaging Power Management www.national.com/power Green Compliance www.national.com/quality/green Switching Regulators www.national.com/switchers Distributors www.national.com/contacts LDOs www.national.com/ldo Quality and Reliability www.national.com/quality LED Lighting www.national.com/led Feedback/Support www.national.com/feedback Voltage Reference www.national.com/vref Design Made Easy www.national.com/easy www.national.com/powerwise Solutions www.national.com/solutions Mil/Aero www.national.com/milaero PowerWise® Solutions Serial Digital Interface (SDI) www.national.com/sdi Temperature Sensors www.national.com/tempsensors SolarMagic™ www.national.com/solarmagic Wireless (PLL/VCO) www.national.com/wireless www.national.com/training PowerWise® Design University THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION (“NATIONAL”) PRODUCTS. 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