LM27403EVM

LM27403EVM DC/DC Buck Regulator Evaluation Module User's Guide Literature Number: SNVU233A September 2013 – Revised October 2013 Contents 1 ......................................................................................................................... 4 ..................................................................................................... 4 1.2 EVM Features and Electrical Performance .......................................................................... 4 Electrical Performance Specifications ................................................................................... 5 Application Circuit Diagram .................................................................................................. 6 EVM Photo ......................................................................................................................... 7 Signal Connections and Test Point Descriptions .................................................................... 7 5.1 Test Point Descriptions ................................................................................................. 7 5.2 Signal Connections ..................................................................................................... 8 Test Setup and Procedure .................................................................................................... 9 6.1 Test Equipment .......................................................................................................... 9 6.2 Recommended Test Setup ........................................................................................... 10 6.3 Test Procedure ......................................................................................................... 10 Test Data and Performance Curves ..................................................................................... 11 7.1 Efficiency ................................................................................................................ 11 7.2 Load Regulation ........................................................................................................ 12 7.3 Line Regulation ......................................................................................................... 12 7.4 Current Limit Inception ................................................................................................ 13 7.5 Current Limit Hiccup Mode ........................................................................................... 13 7.6 Load Transient Response ............................................................................................ 14 7.7 Output Ripple ........................................................................................................... 15 7.8 Startup and Shutdown - VIN .......................................................................................... 16 7.9 Startup and Shutdown - Enable ...................................................................................... 18 7.10 Pre-Bias Startup ........................................................................................................ 19 7.11 Switch Node and SYNC ............................................................................................... 19 7.12 Deadtimes .............................................................................................................. 20 7.13 Remote Temperature Sense ......................................................................................... 21 EVM Documentation .......................................................................................................... 21 8.1 Schematic ............................................................................................................... 21 8.2 PCB Layout ............................................................................................................. 22 8.3 Bill of Materials ......................................................................................................... 26 Description 1.1 2 3 4 5 6 7 8 2 Typical Applications Table of Contents SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated www.ti.com List of Figures 1 Circuit Diagram .............................................................................................................. 6 2 Photo of EVM ................................................................................................................ 7 3 Connection Diagram ........................................................................................................ 9 4 Efficiency Plot 1 ............................................................................................................ 11 5 Efficiency Plot 2 ............................................................................................................ 11 6 Load Regulation ........................................................................................................... 12 7 Line Regulation ............................................................................................................ 12 8 Current Limit Inception vs Temperature ................................................................................ 13 9 Current Limit Hiccup Mode ............................................................................................... 13 10 Load Transient Response; VIN = 12 V, VOUT = 1.2 V, 0 A to 10 A at 2 A/µs ....................................... Load Transient Response; VIN = 12 V, VOUT = 5.5 V, 0 A to 10 A at 2 A/µs ....................................... Input and Output Voltage Ripple; VIN = 12 V, VOUT = 1.2 V, IOUT = 0 A and 25 A .................................. Input and Output Voltage Ripple; VIN = 12 V, VOUT = 5.5 V, IOUT = 0 A and 15 A .................................. Startup with VIN Stepped to 12 V; VOUT = 1.2 V, 70-mΩ Load ...................................................... Shutdown After VIN Disconnected; VIN = 12 V, VOUT = 1.2 V, 200-mΩ Load ...................................... Startup with VIN Ramping Slowly 0 V – 8 V – 0 V; VOUT = 1.2 V, 200-mΩ Load ................................... Startup with VIN Stepped to 12 V; VOUT = 5.5 V, 340-mΩ Load ...................................................... Startup with UVLO/EN Stepped to 3 V; VIN = 12 V, VOUT = 1.2 V, 70-mΩ Load ................................... Shutdown with UVLO/EN Pulled To GND; VIN = 12 V, VOUT = 1.2 V, 70-mΩ Load ............................... Pre-bias Startup; VIN = 12 V, No Load, 0.6-V Pre-bias ............................................................... Switch Node and External SYNC Voltages; VIN = 12 V, VOUT = 1.2 V, FSYNC = 600 kHz .......................... Deadtime Prior To High-side MOSFET Turn-on; VIN = 12 V, VOUT = 1.2 V, 120-mΩ Load ....................... Deadtime Prior To High-side MOSFET Turn-off; VIN = 12 V, VOUT = 1.2 V, 120-mΩ Load ....................... D+ Voltage (ΔVBE) at -40°C, 25°C, 125°C Operating Temperatures................................................ Schematic .................................................................................................................. Top Copper (Top view) ................................................................................................... Internal Layer 2 (Top view) ............................................................................................... Internal Layer 3 (Top view) ............................................................................................... Internal Layer 4 (Top view) ............................................................................................... Internal Layer 5 (Top view) ............................................................................................... Bottom Copper (Bottom view) ........................................................................................... Top Layer Silkscreen (Top view) ........................................................................................ Bottom Layer Silkscreen (Bottom view) ................................................................................ 14 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated List of Figures 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 3 User's Guide SNVU233A – September 2013 – Revised October 2013 LM27403EVM Evaluation Module The LM27403EVM evaluation module (EVM) is a synchronous buck DC/DC regulator providing a fixed 1.2-V output at currents up to 25 A. The EVM is designed to operate from a single supply rail—no additional bias voltage is required. The regulator uses the LM27403 high performance, synchronous buck controller with voltage-mode PWM control loop, integrated MOSFET gate drivers, inductor DCR current sensing, and remote temperature sense. The EVM's output voltage has better than 1% setpoint accuracy and is adjustable between 0.6 V and 5.5 V simply by changing the lower feedback resistance. The switching frequency is 250 kHz and is synchronizable to a higher frequency if required. Nominal input voltage is 12 V but can vary from 3 V to 20V with suitable adjustment of the programmable UVLO. The LM27403 PWM controller is available in a 4-mm × 4-mm WQFN-24 PowerPAD™ package to enable high power density and superior thermal performance. Please consult the LM27403 datasheet for more details. Even though the LM27403 is WEBENCH® Designer enabled, the reader is also encouraged to avail of the LM27403 Design Tool, particularly for quick-start guidance with power train and compensation circuit component selection. spacer to force list of Figures title to next page spacer to force list of Figures title to next page 1 Description The LM27403EVM is designed to use a regulated or non-regulated input bus (3 V–20 V) to produce a tightly regulated output of 1.2 V at up to 25 A of load current. The EVM is intended to demonstrate the LM27403 PWM controller in a typical 12-V bus to low voltage application while providing a number of test points to evaluate the performance of the LM27403. 1.1 Typical Applications • • • • 1.2 EVM Features and Electrical Performance • • • • • • • • • • • 4 Point-of-load synchronous buck regulators High current density modules Communications, cloud, server, storage Embedded computing, FPGAs, ASICs, DSPs Nominal output voltage of 1.2 V with 1% feedback accuracy High efficiency at full load: 91% at 1.2 V, 25 A Wide input voltage operating range of 3 V to 20 V 250-kHz free-running switching frequency set by resistor Overcurrent protection via inductor DCR current sensing with thermal compensation Programmable thermal shutdown based on remote-sensed temperature Soft-start time of 8 ms Monotonic pre-bias output voltage startup Programmable input UVLO set to turn on and off at 6.5 V and 5.2 V, respectively Voltage-mode PWM control architecture supporting all-ceramic output capacitor design or ceramic/electrolytic implementation Output voltage adjustable from 0.6 V to 5.5 V by changing lower feedback resistance LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Electrical Performance Specifications www.ti.com • • • • • • 2 Remote output voltage sensing for optimal load regulation performance Power Good indicator Input circuit damping with optional electrolytic capacitor Synchronizable to an external clock signal up to 1.2 MHz Simple access to IC features including Power Good, enable, remote diode temperature sense, softstart and error amplifier Convenient test points for simple, non-invasive measurements of converter performance Electrical Performance Specifications Table 1. Electrical Performance Specifications Parameter Test Conditions MIN TYP MAX 7 12 20 UNITS INPUT CHARACTERISTICS Input voltage range, VIN Input voltage turn on, VIN(ON) 6.5 V 5.2 V VIN = 7 V, IOUT = 25 A 4.71 A VIN = 12 V, IOUT = 25 A 2.75 Set by UVLO/EN resistors Input voltage turn off, VIN(OFF) Input current, full load, IIN(MAX) (1) V Input current, no load, IIN(NL) VIN = 12 V, IOUT = 0 A Input current, disabled, IIN(OFF) VIN = 12 V, VUVLO/EN = 0 V A 20 mA 0.28 mA OUTPUT CHARACTERISTICS Output voltage, VOUT (1) 1.188 Output current, IOUT 1.200 0 Output voltage regulation, ΔVOUT Output voltage ripple, VOUT(AC) Load Regulation: IOUT = 0 A to 25 A 0.2% Line Regulation: VIN = 7 V to 20 V 0.2% VIN = 12 V, IOUT = 10 A Output overcurrent protection, IOCP 1.212 V 25 A 10 26 Soft-start time, tSS 28 mVpp 30 A 8 ms 250 kHz SYSTEMS CHARACTERISTICS Switching frequency (free running), FSW(NOM) (1) Switching frequency range (using SYNC) Peak efficiency, ηPK FSW(NOM) VIN = 12 V, IOUT = 10 A Full load efficiency, ηFULL Loop bandwidth, fc VIN = 7 V, IOUT = 25 A 91% VIN = 12 V, IOUT = 25 A 91% VIN = 20 V, IOUT = 25 A 89% VIN = 12 V, IOUT = 10 A Phase margin, φM Ambient temperature, TA System-level thermal shutdown, TOTP (1) 1200 kHz 93.5% 45 kHz 55 º 25 ºC 110 ºC The default output voltage and switching frequency are 1.2 V and 250 kHz, respectively. Efficiency and other parameters will change based on chosen output voltage, load current, and frequency. SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 5 Application Circuit Diagram Application Circuit Diagram RC2 CC3 DBT CCS 470 pF U1 CSS SS 47 nF RFB1 20 k 221 RRS 10 1 SS/TRACK 40V 0.2A 24 23 CBOOT 18 RFB2 820 pF 2 CBOOT VDD CS+ CRS 10 F VOUT CS± 3 www.ti.com RS RH 10 0.1 F FB 6 SYNC VDD 14 VIN FADJ PGOOD 5 D± 68 pF LG 15 D+ COMP LM27403SQ OTP 4 COMP 7 8 9 10 11 12 GND 13 LG VDD CVDD 10 F Q2 CIN1-3 CIN4 22 F 39 F RUV2 10 k CEN N/A OTP DEN 5.1V COTP 0.1 F RPG 20 k PGOOD ROTP 84.5 k VOUT CO1-4 QT MMBT3904 100 F 330 F RS10 D+ RVIN 2.2 CO5 GND GND VIN UVLO/EN RUV1 47.5 k 1 H 1.1 m GND SYNC VIN RS+ 10 L1 SW 16 CC2 RF 68.1 k S+ Q1 HG 17 UVLO /EN CC1 3.3 nF HG SW 3 CS 0.22 F RS 4.22 k CBT 20 k RC1 20 k Vin RSET 3.32 k RCS 3.32 k VIN S- CD 100 pF D± D+ CIN 1 F Figure 1. Circuit Diagram 6 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Photo www.ti.com 4 EVM Photo Figure 2. Photo of EVM 5 Signal Connections and Test Point Descriptions 5.1 Test Point Descriptions Table 2. Test Point Descriptions LABEL DESCRIPTION VIN Input voltage GND GND reference for VIN S+ Output voltage positive sense connection S– Output voltage negative sense connection IC_GND LM27403 GND SS Soft-start pin, tracking input COMP Error amplifier output SYNC SYNC input D+ Temperature sense NPN BJT collector/base UVLO/EN UVLO/Enable input, tie to GND to disable converter OTP Overtemperature set pin PGOOD Power good VDD Bias supply sub-regulator output GND GND reference HG High-side MOSFET gate driver output SW Switch node LG Low-side MOSFET gate driver output SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 7 Signal Connections and Test Point Descriptions 5.2 5.2.1 www.ti.com Signal Connections Input Voltage Monitoring The LM27403EVM provides two test points for measuring the input voltage. This allows the user to measure the actual input voltage without losses from input cables and connectors. All input voltage measurements should be made between VIN and GND test points. 5.2.2 Output Voltage Monitoring The LM27403EVM provides two test points for measuring the output voltage. This allows the user to measure the actual output voltage without losses from output cables and connectors. Output voltage measurements should be made between S+ and S- test points, or alternatively at the output voltage banana connections. 5.2.3 Power Good Voltage Output The LM27403EVM provides a test point for measuring the power good output voltage. A 20-kΩ resistor pull-up to VDD is included to allow the Power Good signal to be monitored without requiring an external pullup. For true open-drain operation with no pullup, remove Rpg. With Rpg removed, PGOOD can be connected to UVLO/EN of another LM27403EVM to provide sequential startup of the two LM27403-based regulators. 5.2.4 Soft-Start Voltage Monitoring / Track Input The LM27403EVM provides a test point for measuring the Soft-Start voltage and for applying a tracking voltage source. An external voltage from SS/TRACK to GND of 0 V to 0.6V can be used to adjust the output voltage. Of course, where multiple regulators are used (e.g. in a distributed power architecture application), the output voltage of one regulator can be applied to the SS/TRACK input of another regulator using a resistor divider to provide appropriate scaling. Coincident or ratiometric startup behaviors are thus possible. 5.2.5 UVLO / Enable Voltage Input The LM27403EVM provides a test point for measuring the UVLO/EN voltage. Shorting this test point to GND disables the regulator. The UVLO/EN voltage should not exceed the input voltage. 5.2.6 SYNC Input The LM27403EVM provides a test point for applying a synchronization (SYNC) input signal. The freerunning switching frequency is set at 250 kHz by resistor Rf. However, the regulator can align in frequency and phase with that of the applied SYNC signal up to 1.2 MHz. The applied SYNC voltage should not exceed 5.5 V. CAUTION Some parameters can be configured, such as control loop compensation, to values that can result in unexpected behavior of this EVM. Please refer to the LM27403 datasheet, LM27403 design tool, or WEBENCH® Power Designer for guidance related to component selection. 8 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Setup and Procedure www.ti.com 6 Test Setup and Procedure Figure 3 shows the recommended test setup to evaluate the LM27403 EVM. Working at an ESD workstation, make sure that any wrist straps, boot straps or mats are connected referencing the user to earth ground before power is applied to the EVM. Oscilloscope Power Supply - -s +s + Ammeter 1 A V Electronic Load COM COM Voltmeter 1 + - COM V Voltmeter 2 Figure 3. Connection Diagram 6.1 Test Equipment Voltage Source: The input voltage source VIN should be a 0–20-V variable dc source capable of supplying 10 A. Multimeters: • Voltmeter 1: Input voltage at VIN to GND • Voltmeter 2: Output voltage at S+ to S– (or using the output connector lugs if remote sense is used) • Ammeter 1: Input current (or use the power supply readout if its accuracy is deemed acceptable) Electronic Load: The output load should be an electronic constant-resistance or constant-current mode load capable of 0 Adc to 30 Adc at 1.2 V. Oscilloscope: A digital or analog oscilloscope can be used to measure pertinent converter waveforms. With the scope set to 20-MHz bandwidth and AC coupling, the output voltage ripple can be measured directly across an output capacitor with a short ground lead normally provided with the scope probe. Place the oscilloscope probe tip on the positive terminal of the output capacitor, holding the probe's ground barrel through the ground lead to the capacitor's negative terminal. It is not recommended to use a long leaded ground connection because this may induce additional noise given a large ground loop. To measure other waveforms, adjust the oscilloscope as needed. SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 9 Test Setup and Procedure www.ti.com Fan: Some of this EVM’s components may approach temperatures of 50°C during operation. Although not mandatory, a small fan capable of 200–400 LFM can be used to reduce component temperatures while the EVM is operating. Exercise care when touching the EVM while the fan is not running. Always exercise caution when touching any circuits that may be live or energized. Recommended Wire Gauge: • Input Source to VIN and GND: The recommended wire size is 1 × AWG #14 per input connection, with the total length of wire less than 4 feet (2 feet input, 2 feet return). • VOUT to LOAD: The minimum recommended wire size is 2 × AWG #14, with the total length of wire less than 4 feet (2 feet input, 2 feet return). 6.2 Recommended Test Setup 6.2.1 Input Connections • Prior to connecting the DC input source, it is advisable to limit the source current to 10 A maximum. Make sure the input source is initially set to 0 V and connected to VIN and GND banana connections as shown in Figure 3. While the on-board OSCON electrolytic capacitor provides input circuit damping, an additional high-ESR input capacitor may be required if long input lines are used. • Connect voltmeter 1 at VIN and GND test points to measure the input voltage. • Connect ammeter 1 to measure the input current. 6.2.2 Output Connections Connect an electronic load to VOUT and GND connections. Set the load to constant-resistance mode or constant-current mode at 0 Adc before input voltage is applied. Use short load lines to minimize voltage drop to the load. • Connect voltmeter 2 at S+ and S– (or output connectors' solder lugs) to measure the output voltage. • The output current level can be taken from the electronic load readout (if its accuracy is deemed acceptable). • 6.3 Test Procedure 6.3.1 • • • • • • • 6.3.2 Line, Load Regulation and Efficiency Set up the EVM as described above. Set load to constant resistance or constant current mode and to sink 0 Adc. Increase input source from 0 V to 12 V, using voltmeter 1 to measure input voltage. Use voltmeter 2 to measure output voltage, VOUT. Vary load from 0 to 25 Adc, VOUT should remain within load regulation specification. Vary input source voltage from 7 V to 20 V, VOUT should remain within line regulation specification. Decrease load to 0 A. Decrease input source voltage to 0 V. Control Loop Gain and Phase The 10-Ω positive sense resistor of the LM27403EVM is a convenient injection point for loop response analysis. • Reconfigure resistor Rc2 so that the compensator's RC lead network connects not to VOUT but to S+ (Rc2 is typically connected to VOUT to mitigate noise injection into FB when long sense lines are used). • Set up EVM as described previously. • Connect isolation transformer secondary across Rs+. • Connect input signal amplitude measurement (REF) probe to S+ and output signal amplitude measurement probe (TEST) to VOUT. • Connect ground leads to the GND test point as required. 10 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Data and Performance Curves www.ti.com • • • • 7 Apply 10 mV or less AC signal to the isolation transformer primary. Adjust amplitude as necessary. Sweep the frequency over the frequency range of interest (e.g. 100 Hz to 1 MHz) with 10 Hz or lower post filter. Measure the control loop gain and phase characteristic. Record the crossover frequency and phase margin. Disconnect isolation transformer before making other measurements (signal injection into the loop may interfere with the integrity of other measurements). Test Data and Performance Curves Figure 4 through Figure 24 present typical performance curves for the LM27403 EVM. Since actual performance data can be affected by measurement techniques and environmental variables, these curves are presented for reference and may differ from actual field measurements. 7.1 Efficiency 100 Efficiency (%) 95 90 VOUT = 5.3V VOUT = 1.8V 85 VOUT = 1.2V VOUT = 3.3V 80 Fsw = 250 kHz VIN = 12V 75 0 5 10 15 Output Current (A) 20 25 C001 Figure 4. Efficiency Plot 1 100 VIN = 3.3V VIN = 5V Efficiency (%) 95 90 85 VIN = 12V VIN = 20V 80 75 Fsw = 250 kHz VOUT = 1.2V 70 0 5 10 15 Output Current (A) 20 25 C001 Figure 5. Efficiency Plot 2 SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 11 Test Data and Performance Curves 7.2 www.ti.com Load Regulation Output Voltage (V) 1.210 1.205 1.200 1.195 Fs = 300 kHz VIN = 12V 1.190 0 5 10 15 20 Output Current (A) 25 C003 Figure 6. Load Regulation 7.3 Line Regulation Output Voltage (V) 1.2 1.15 1.1 1.05 Fs = 300 kHz IOUT = 12.5A 1 0 5 10 lnput Voltage (V) 15 20 C002 Figure 7. Line Regulation 12 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Data and Performance Curves www.ti.com 7.4 Current Limit Inception 29 Current Limit (A) 28.8 28.6 28.4 Fs = 250 kHz VIN = 12V VOUT = 1.2V 28.2 28 ±50 ±25 0 25 50 Temperature (ƒC) 75 100 125 C003 Figure 8. Current Limit Inception vs Temperature 7.5 Current Limit Hiccup Mode SW VOUT IOUT VIN = 12 V VOUT = 1.2 V FSW = 300 kHz Figure 9. Current Limit Hiccup Mode SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 13 Test Data and Performance Curves 7.6 www.ti.com Load Transient Response IOUT VOUT Figure 10. Load Transient Response; VIN = 12 V, VOUT = 1.2 V, 0 A to 10 A at 2 A/µs IOUT VOUT Figure 11. Load Transient Response; VIN = 12 V, VOUT = 5.5 V, 0 A to 10 A at 2 A/µs 14 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Data and Performance Curves www.ti.com 7.7 Output Ripple VOUT VOUT VIN VIN Figure 12. Input and Output Voltage Ripple; VIN = 12 V, VOUT = 1.2 V, IOUT = 0 A and 25 A VOUT VOUT VIN VIN Figure 13. Input and Output Voltage Ripple; VIN = 12 V, VOUT = 5.5 V, IOUT = 0 A and 15 A SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 15 Test Data and Performance Curves 7.8 www.ti.com Startup and Shutdown - VIN VIN VOUT PGOOD IOUT Figure 14. Startup with VIN Stepped to 12 V; VOUT = 1.2 V, 70-mΩ Load VIN PGOOD VOUT IOUT Figure 15. Shutdown After VIN Disconnected; VIN = 12 V, VOUT = 1.2 V, 200-mΩ Load 16 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Data and Performance Curves www.ti.com VOUT VUVLO2 1.15V VIN VUVLO-HYS VUVLO1 0.985V 165mV UVLO/EN Figure 16. Startup with VIN Ramping Slowly 0 V – 8 V – 0 V; VOUT = 1.2 V, 200-mΩ Load VIN VOUT PGOOD IOUT Figure 17. Startup with VIN Stepped to 12 V; VOUT = 5.5 V, 340-mΩ Load SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 17 Test Data and Performance Curves 7.9 www.ti.com Startup and Shutdown - Enable VOUT IOUT UVLO/EN PGOOD Figure 18. Startup with UVLO/EN Stepped to 3 V; VIN = 12 V, VOUT = 1.2 V, 70-mΩ Load VOUT IOUT PGOOD UVLO/EN Figure 19. Shutdown with UVLO/EN Pulled To GND; VIN = 12 V, VOUT = 1.2 V, 70-mΩ Load 18 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Test Data and Performance Curves www.ti.com 7.10 Pre-Bias Startup VOUT UVLO/EN SS/TRACK COMP valley of PWM ramp lower COMP clamp EN to SS delay Figure 20. Pre-bias Startup; VIN = 12 V, No Load, 0.6-V Pre-bias 7.11 Switch Node and SYNC SW SYNC Figure 21. Switch Node and External SYNC Voltages; VIN = 12 V, VOUT = 1.2 V, FSYNC = 600 kHz SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 19 Test Data and Performance Curves www.ti.com 7.12 Deadtimes LG SW Figure 22. Deadtime Prior To High-side MOSFET Turn-on; VIN = 12 V, VOUT = 1.2 V, 120-mΩ Load SW LG BOOT-SW Figure 23. Deadtime Prior To High-side MOSFET Turn-off; VIN = 12 V, VOUT = 1.2 V, 120-mΩ Load 20 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Documentation www.ti.com 7.13 Remote Temperature Sense ûVBE = 46.4 mV -40°C ûVBE = 59.4 mV 25°C ûVBE = 79.3 mV 125°C Figure 24. D+ Voltage (ΔVBE) at -40°C, 25°C, 125°C Operating Temperatures 8 EVM Documentation 8.1 Schematic Figure 25. Schematic SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 21 EVM Documentation 8.2 www.ti.com PCB Layout Figure 26 through Figure 33 show the design of the LM27403 6-layer PCB (2-oz copper). The EVM is largely a single-sided design, except for input and output bulk capacitors and a few signal components. Figure 26. Top Copper (Top view) Figure 27. Internal Layer 2 (Top view) 22 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Documentation www.ti.com Figure 28. Internal Layer 3 (Top view) Figure 29. Internal Layer 4 (Top view) SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 23 EVM Documentation www.ti.com Figure 30. Internal Layer 5 (Top view) Figure 31. Bottom Copper (Bottom view) 24 LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVM Documentation www.ti.com Figure 32. Top Layer Silkscreen (Top view) Figure 33. Bottom Layer Silkscreen (Bottom view) SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated LM27403EVM Evaluation Module 25 EVM Documentation 8.3 www.ti.com Bill of Materials Table 3. Bill of Materials Count RefDes 26 Description Part Number MFR 2 Cbt, Ct Capacitor, Ceramic, 0.1μF, 50V, X7R, 10%, 0603 Std Std 1 Cc1 Capacitor, Ceramic, 3300pF, 50V, X7R, 10%, 0603 Std Std 1 Cc2 Capacitor, Ceramic, 68pF, 50V, C0G/NPO, 5%, 0603 Std Std 1 Cc3 Capacitor, Ceramic, 820pF, 50V, C0G/NPO, 5%, 0603 Std Std 1 Ccs Capacitor, Ceramic, 470pF, 50V, X7R, 10%, 0603 Std Std 1 Cd Capacitor, Ceramic, 100pF, 50V, X7R, 10%, 0603 Std Std 1 Cdd Capacitor, Ceramic, 4.7μF, 10V, X5R, 10%, 0603 C0603C475K8PACTU Kemet 1 Cin Capacitor, Ceramic, 1μF, 25V, X5R, 10%, 0603 Std Std 3 Cin1, Cin2, Cin3 Capacitor, Ceramic, 22μF, 25V, X5R, 10%, 1210 12103D226KAT2A AVX 1 Cin4 Capacitor, OSCON, 39uF, 35V, 30mΩ 35SVPF39M Sanyo 4 Co1, Co2, Co3, Co4 Capacitor, Ceramic, 100μF, 6.3V, X5R, 20%, 1210 C1210C107M9PACTU Kemet 1 Co5 Capacitor, POSCAP, 330uF, 6.3V, 9mΩ 6TPF330M9L Sanyo 1 Crs Capacitor, Ceramic, 10μF, 6.3V, X5R, 20%, 0603 Std Std 1 Cs Capacitor, Ceramic, 0.22μF, 25V, X7R, 10%, 0603 Std Std 1 Css Capacitor, Ceramic, 47nF, 25V, X7R, 10%, 0603 Std Std 1 D1 Diode Zener, 5.1V, 300mW, SOD523 BZX585-B5V1 NXP 1 Dbt Diode Schottky, 30V, 200mA, SOD523 1PS79SB30 NXP 1 Dtemp Transistor, NPN, 40V, 0.2A, SOT-323 MMBT3904WT1G On Semi 1 Lout Inductor, 1uH, 1.1mΩ DCR, 30A Isat HMP1360-1R0-63 Delta 1 Qh MOSFET, N-Channel, 25V, TDSON-8 BSC032NE2LS Infineon 1 Ql MOSFET, N-Channel, 25V, TDSON-8 BSC010NE2LS Infineon 4 Rc1, Rfb1, Rfb2, Rpg Resistor, Chip, 20kΩ, 1/10W, 1%, 0603 Std Std 1 Rc2 Resistor, Chip, 221Ω, 1/10W, 1%, 0603 Std Std 2 Rcs, Rset Resistor, Chip, 3.32kΩ, 1/10W, 1%, 0603 Std Std 1 Ren1 Resistor, Chip, 47.5kΩ, 1/10W, 1%, 0603 Std Std 1 Ren2 Resistor, Chip, 10kΩ, 1/10W, 1%, 0603 Std Std 1 Rf Resistor, Chip, 68.1kΩ, 1/10W, 1%, 0603 Std Std 4 Rh, Rrs, Rs+, Rs- Resistor, Chip, 10Ω, 1/10W, 1% Std Std 1 Rin Resistor, Chip, 2.2Ω, 1/10W, 5%, 0603 Std Std 1 Rs Resistor, Chip, 4.22kΩ, 1/10W, 1%, 0603 Std Std 1 Rt Resistor, Chip, 84.5kΩ, 1/10W, 1%, 0603 Std Std 1 U1 IC, Synchronous Buck Controller with DCR Current Sensing and Thermal Compensation, 4-mm x 4-mm WQFN-24 PowerPAD™ package LM27403SQ TI 1 PCB PCB, FR4, 6 layer, 2" x 2" x 0.062" PCB1 Any 4 VIN, VOUT, GND, GND Banana Jack Power Terminal 108-0740-001 Emerson 4 H1, H2, H3, H4 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips panhead NY PMS 440 0025 PH B&F Fastener Supply 4 H5, H6, H7, H8 Standoff, Hex, 0.5"L #4-40 Nylon 1902C Keystone LM27403EVM Evaluation Module SNVU233A – September 2013 – Revised October 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated EVALUATION BOARD/KIT/MODULE (EVM) ADDITIONAL TERMS Texas Instruments (TI) provides the enclosed Evaluation Board/Kit/Module (EVM) under the following conditions: The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING LIMITED WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. Please read the User's Guide and, specifically, the Warnings and Restrictions notice in the User's Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI's environmental and/or safety programs, please visit www.ti.com/esh or contact TI. No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. REGULATORY COMPLIANCE INFORMATION As noted in the EVM User’s Guide and/or EVM itself, this EVM and/or accompanying hardware may or may not be subject to the Federal Communications Commission (FCC) and Industry Canada (IC) rules. For EVMs not subject to the above rules, this evaluation board/kit/module is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC or ICES-003 rules, which are designed to provide reasonable protection against radio frequency interference. Operation of the equipment may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. General Statement for EVMs including a radio User Power/Frequency Use Obligations: This radio is intended for development/professional use only in legally allocated frequency and power limits. Any use of radio frequencies and/or power availability of this EVM and its development application(s) must comply with local laws governing radio spectrum allocation and power limits for this evaluation module. It is the user’s sole responsibility to only operate this radio in legally acceptable frequency space and within legally mandated power limitations. Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization. For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant Caution This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. FCC Interference Statement for Class A EVM devices This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instruction manual, may cause harmful interference to radio communications. Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to correct the interference at his own expense. FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and receiver. • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. • Consult the dealer or an experienced radio/TV technician for help. For EVMs annotated as IC – INDUSTRY CANADA Compliant This Class A or B digital apparatus complies with Canadian ICES-003. Changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Concerning EVMs including radio transmitters This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device. Concerning EVMs including detachable antennas Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser) gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated. Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited for use with this device. Cet appareil numérique de la classe A ou B est conforme à la norme NMB-003 du Canada. Les changements ou les modifications pas expressément approuvés par la partie responsable de la conformité ont pu vider l’autorité de l'utilisateur pour actionner l'équipement. Concernant les EVMs avec appareils radio Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement. Concernant les EVMs avec antennes détachables Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de l'émetteur. SPACER SPACER SPACER SPACER SPACER SPACER SPACER SPACER 【Important Notice for Users of EVMs for RF Products in Japan】 】 This development kit is NOT certified as Confirming to Technical Regulations of Radio Law of Japan If you use this product in Japan, you are required by Radio Law of Japan to follow the instructions below with respect to this product: 1. 2. 3. Use this product in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for Enforcement of Radio Law of Japan, Use this product only after you obtained the license of Test Radio Station as provided in Radio Law of Japan with respect to this product, or Use of this product only after you obtained the Technical Regulations Conformity Certification as provided in Radio Law of Japan with respect to this product. Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. 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It is intended solely for use for preliminary feasibility evaluation in laboratory/development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical mechanical components, systems and subsystems. It should not be used as all or part of a finished end product. Your Sole Responsibility and Risk. You acknowledge, represent and agree that: 1. 2. 3. 4. You have unique knowledge concerning Federal, State and local regulatory requirements (including but not limited to Food and Drug Administration regulations, if applicable) which relate to your products and which relate to your use (and/or that of your employees, affiliates, contractors or designees) of the EVM for evaluation, testing and other purposes. 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