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LMX9838
SNOSAZ9F – JULY 2007 – REVISED DECEMBER 2014
LMX9838 Bluetooth Serial Port Module
1 Features
•
1
•
•
•
•
•
•
•
•
•
3 Description
The Texas Instruments LMX9838 Bluetooth Serial
Port module is a fully integrated Bluetooth 2.0
baseband controller, 2.4 GHz radio, crystal, antenna,
LDO and discreets; combined to form a complete
small form factor (10 mm x 17 mm x 2.0 mm)
Bluetooth node.
®
Complete Bluetooth 2.0 Stack Including
– Baseband and Link Manager
– Protocols: L2CAP, RFCOMM, SDP
– Profiles: GAP, SDAP, SPP
High Integration: Includes Processor, Antenna,
Crystal, EEPROM, LDO
Supporting up to 7 Active Bluetooth Data Links
and 1 Active SCO Link
Class 2 Operation
UART Command/Data Port Speed 921.6kbits/s
AAI for External PCM Codec
Better than -80dBm Input Sensitivity
FCC, IC, CE, and Japan MIC Certified
Bluetooth SIG QD ID: B012394
Compact Size: 10 mm x 17 mm x 2.0 mm
All hardware and firmware is included to provide a
complete solution from antenna through the complete
lower and upper layers of the Bluetooth stack, up to
the application including the Generic Access Profile
(GAP), the Service Discovery Application Profile
(SDAP), and the Serial Port Profile (SPP). The
module includes a configurable service database to
fulfil service requests for additional profiles on the
host. Moreover, the LMX9838 is qualified as a
Bluetooth endproduct, ready to be used in the end
application without additional testing and license cost.
Based on TI’s CompactRISC 16-bit processor
architecture and Digital Smart Radio technology, the
LMX9838 is optimized to handle the data and link
management processing requirements of a Bluetooth
node.
2 Applications
•
•
•
•
•
•
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Factory Automation and Control
Test and Measurement
Telematics
POS Terminals
Medical/Telemedicine
Data Logging Systems
Audio Gateways
Device Information(1)
PART NUMBER
LMX9838
PACKAGE
BODY SIZE (NOM)
PLGA (70)
17.00 mm × 10.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
4 Block Diagram
Link
Manager
Antenna
GPIO
PG6
PG7
UART
TXD
RXD
RTS#
CTS#
UART
Transport
POR
RESET#
32k+
2.4 GHz
Radio
BLUEtooth
Core
TM
Compact RISC
Processor
LFO
32 kHz
32kConfig
Options
XTAL
Voltage
Regulator
ROM
EPROM
Combined
System and
Patch RAM
CVSD
Codecs
Audio
Port
OP3
OP4/PG4
OP5
SCLK
SF
STD
SRD
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LMX9838
SNOSAZ9F – JULY 2007 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Block Diagram........................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
1
2
3
5
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
5
5
5
5
6
6
7
7
8
Absolute Maximum Ratings ......................................
Handling Ratings ......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Power Supply Requirements ....................................
Digital DC Characteristics ........................................
RF Receiver Performance Characteristics................
RF Transmitter Performance Characteristics............
RF Synthesizer Performance Characteristics ...........
Detailed Description .............................................. 9
8.1 Overview ................................................................... 9
8.2 Functional Block Diagram ......................................... 9
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 17
8.5 Programming - Command Interface........................ 21
9
Application and Implementation ........................ 26
9.1 Typical Applications ............................................... 26
10 Power Supply Recommendations ..................... 31
10.1 Power Supply Schematics ................................... 31
10.2 Filtered Power Supply ........................................... 33
10.3 Power Up .............................................................. 33
11 Regulatory Compliance ...................................... 35
11.1 FCC Instructions ................................................... 35
12 Device and Documentation Support ................. 38
12.1
12.2
12.3
12.4
12.5
Device Support ....................................................
Documentation Support .......................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
38
38
38
38
38
13 Mechanical, Packaging, and Orderable
Information ........................................................... 38
5 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (January 2014) to Revision F
Page
•
Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 1
•
Changed EN 301 489-17 v1.2.1 to EN 301 489-17 v2.2.1................................................................................................... 35
Changes from Revision D (April 2013) to Revision E
Page
•
Added two parameters for operating conditions..................................................................................................................... 5
•
Changed schematic .............................................................................................................................................................. 28
Changes from Revision C (April 2013) to Revision D
•
2
Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 36
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6 Pin Configuration and Functions
PLGA NAW0070A Package
70 Pins
Top View
Pin Functions
PAD NAME PAD LOCATION
I/O
DEFAULT LAYOUT
DESCRIPTION
SYSTEM INTERFACE SIGNALS
OP3
16
I
OP3: Pin checked during Startup Sequence for configuration option
OP4/PG4
26
OP4: I
PG4: I/O
OP4: Pin checked during Startup Sequence for configuration option
PG4: GPIO
OP5
25
I/O
OP5: Pin checked during Startup Sequence for configuration option
32K-
28
O
NC (if not used)
32.768 kHz Crystal Oscillator
32K+
27
I
GND (if not used)
32.768 kHz Crystal Oscillator
Host Serial Port Clear To Send (active low)
UART Interface Signals
CTS# (1)
15
I
GND (if not used)
RTS# (2)
14
O
NC (if not used)
RXD
12
I
Host Serial Port Receive Data
TXD
13
O
Host Serial Port Transmit Data
Host Serial Port Request To Send (active low)
AUXILIARY PORTS INTERFACE SIGNALS
PG6
7
I/O
GPIO - Default setup LINK STATUS indication
PG7
19
I/O
GPIO - Default setup RF traffic LED indication
RESET#
2
I
XOSCEN
8
O
Host main Clock Request. Toggles with Main crystal (X1) enable/disable
Low active, either
NC or connect to
host
Module Reset (active low)
AUDIO INTERFACE SIGNALS
SCLK
20
I/O
Audio PCM Interface Clock
SFS
21
I/O
Audio PCM Interface Frame Synchronization
SRD
23
I
Audio PCM Interface Receive Data Input
STD
22
O
Audio PCM Interface Transmit Data Output
(1)
(2)
Connect to GND if CTS is not use.
Treat As No Connect If RTS is not used. Pad required for mechanical stability.
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Pin Functions (continued)
PAD NAME PAD LOCATION
I/O
DEFAULT LAYOUT
DESCRIPTION
POWER, GROUND AND NO CONNECT SIGNALS
GND
3, 4, 17, 18, 24,
29, 30, 31, 32
I
MVCC
6
I
GND
Must be connected to ground plane
Module internal Voltage Regulator Input
NC
1, 5, 33, 34, 35,
36, 37, 38, 39, 40
NC
Place Pads for stability.
NC
41, 42, 43, 44,
45, 46, 47, 48,
49, 50, 51, 52,
53, 54, 55, 56,
57, 58, 59, 60,
61, 62, 63, 64,
65, 66, 67, 68,
69, 70
NC
DO NOT PLACE ANY PADS.
VCC_CORE
9
I/O
VCC
10
I
Voltage Regulator Input Baseband
VCC_IO
11
I
Power Supply I/O
4
Voltage Regulator Input/Output
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7 Specifications
7.1 Absolute Maximum Ratings (1)
The following conditions are true unless otherwise stated in the tables: TA = –40°C to +85°C. VCC = 3.3 V. RF system
performance specifications are ensured on Texas Instruments Flagstaff board rev 2.1 evaluation platform.
MIN
MAX
UNIT
VCC
Digital Voltage Regulator input
-0.2
4
V
VI
Voltage on any pad with GND = 0 V
-0.2
VCC + 0.2
V
TLNOPB
Lead Temperature NOPB (2) (3)
(solder 40 sec.)
250
°C
(1)
(2)
(3)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional. This device is a high performance RF integrated circuit and is ESD sensitive. Handling and
assembly of this device should be performed at ESD free workstations.
Reference IPC/JDEC J-STD-20C spec.
NOPB = No Pb (No Lead).
7.2 Handling Ratings
Tstg
Storage temperature range
V(ESD)
ESDMM
(1)
(2)
(3)
Electrostatic discharge
MIN
MAX
UNIT
–65
150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins (1)
2000
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins (2)
1000
V
200 (3)
ESD - Machine Model
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
All pins meet 200V Macine Model ESD rating except pins RXD, TXD, CTS, RTS, PG4, OP5, PG6, PG7, SCL, SDA, MDOD1, MWCS,
SFS, STD, SRD RATED AT 150v.
7.3 Recommended Operating Conditions
MIN
NOM
MAX
MVCC
Module internal Voltage Regulator input
3.0
3.3
3.6
V
VCC
Digital Voltage Regulator input
2.5
3.3
3.6
V
TR
Digital Voltage Regulator Rise Time
10
μs
TA
Ambient Operating Temperature Range
Fully Functional Bluetooth Node
-40
+25
+85
°C
VCC_IO (1)
Supply Voltage Digital I/O
1.8
3.3
3.6
V
VCC_CORE
Supply Voltage Output (2)
VCC_COREMAX
Supply Voltage Output Max Load
VCC_CORESHORT
When used as Supply Input (VCC grounded)
(1)
(2)
UNIT
1.8
V
5
1.6
1.8
mA
2
V
VCC must be > (VCC_IO - 0.5V) to avoid backdrive supply.
Should not be used for external supplies
7.4 Thermal Information
LMX9838
THERMAL METRIC (1)
NAW
UNIT
70 PINS
RθJA
(1)
Junction-to-ambient thermal resistance
45
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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7.5 Power Supply Requirements (1) (2)
PARAMETER
MIN
TYP (3)
MAX
UNIT
ICC-TX
Power supply current for continuous transmit
65
mA
ICC-RX
Power supply current for continuous receive
65
mA
IRXSL
Receive Data in SPP Link, Slave
IRXM
ISnM
ISC-TLDIS
(1)
(2)
(3)
26
mA
Receive Data in SPP Link, Master
23
mA
Sniff Mode, Sniff interval 1 second
6.5
mA
Scanning, No Active Link, TL Disabled
1.1
mA
Power supply requirements based on Class II output power.
Based on UART Baudrate 115.2kbit/s.
VCC = 3.3 V, Ambient Temperature = +25 °C.
7.6 Digital DC Characteristics
MIN
MAX
VIH
Logical 1 Input Voltage high
(except oscillator I/O)
PARAMETER
1.8 V ≤ VCC_IO ≤ 3.0 V
3.0 V ≤ VCC_IO ≤ 3.6 V
0.7 x VCC_IO
2.0
VCC_IO + 0.2
VCC_IO + 0.2
V
VIL
Logical 0 Input Voltage low
(except oscillator I/O)
1.8 V ≤ VCC_IO ≤ 3.0 V
3.0 V ≤ VCC_IO ≤ 3.6 V
-0.2
-0.2
0.25 x VCC_IO
0.8
V
VOH
Logical 1 Output Voltage high
(except oscillator I/O)
VOL
Logical 0 Output Voltage low
(except oscillator I/O)
VHYS
Hysteresis Loop Width (1)
IIH
Logical 1 Input leakage High
IIL
Logical 0 Input leakage Low
IOH
Logical 1 Output Current
VOH = 2.4 V, VCC_IO = 3.0 V
-10
mA
IOL
Logical 0 Output Current
VOH = 0.4 V, VCC_IO = 3.0 V
10
mA
(1)
6
TEST CONDITIONS
VCC_IO = 1.8 V
VCC_IO = 3.0 V
0.7 x VCC_IO
2.4
UNIT
V
0.4
V
10
µA
0.1 x VCC
V
-10
µA
Specified by design.
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7.7 RF Receiver Performance Characteristics
All tests performed are based on Bluetooth Test Specification revision 2.0. All tests are measured at antenna port unless
otherwise specified. TA = –40°C to +85°C--VDD_RF = 2.8 V unless otherwise specified. RF system performance specifications
are ensured on Texas Instruments Flagstaff board rev 2.1 evaluation platform. All RF parameters are tested prior to the
antenna.
PARAMETER
RXsense
PinRF
Receive Sensitivity
Intermodulation Performance
RSSI
RSSI Dynamic Range at LNA
Input
OOB
(1)
(2)
MAX
UNIT
BER < 0.001
2.402 GHz
-80
-76
dBm
2.441 GHz
-80
-76
dBm
2.480 GHz
-80
-76
dBm
Maximum Input Level
IMP (2)
(2)
TYP (1)
TEST CONDITIONS
F1= + 3 MHz,
F2= + 6 MHz,
PinRF = -64 dBm
MIN
-10
0
dBm
-38
-36
dBm
-72
-52
dBm
PinRF = -10 dBm,
30 MHz < FCWI < 2 GHz,
BER < 0.001
-10
dBm
PinRF = -27 dBm,
2000 MHz < FCWI < 2399 MHz,
BER < 0.001
-27
dBm
PinRF = -27 dBm,
2498 MHz < FCWI < 3000 MHz,
BER < 0.001
-27
dBm
PinRF = -10 dBm,
3000 MHz < FCWI < 12.75 GHz,
BER < 0.001
-10
dBm
Out Of Band Blocking
Performance
Typical operating conditions are at 2.75V operating voltage and 25°C ambient temperature.
The f0 = -64 dBm Bluetooth modulated signal, f1 = -39dbm sine wave, f2 = -39 dBm Bluetooth modulated signal, f0 = 2f1 - f2, and |f2 - f1|
= n * 1MHz, where n is 3, 4, or 5. For the typical case, n = 3.
7.8 RF Transmitter Performance Characteristics
All tests performed are based on Bluetooth Test Specification revision 2.0. All tests are measured at antenna port unless
otherwise specified. TA = -40°C to +85°C--VDD_RF = 2.8V unless otherwise specified. RF system performance specifications
are ensured on Texas Instruments Flagstaff board rev 2.1 evaluation platform. All RF parameters are tested prior to the
antenna.
PARAMETER
MIN
TYP (1)
MAX
UNIT
2.402 GHz
−4
0
+3
dBm
2.441 GHz
−4
0
+3
dBm
TEST CONDITIONS
POUTRF
Transmit Output Power
2.480 GHz
−4
0
+3
dBm
MOD ΔF1AVG
Modulation Characteristics
Data = 00001111
140
165
175
kHz
MOD ΔF2MAX (2)
Modulation Characteristics
Data = 10101010
115
125
ΔF2AVG/DF1AVG
(3)
Modulation Characteristics
0.8
20 dB Bandwidth
POUT2*fo (4)
PA 2nd Harmonic Suppression
ZRFOUT (5)
RF Output Impedance/Input
Impedance of RF Port (RF_inout)
(1)
(2)
(3)
(4)
(5)
kHz
Maximum gain setting:
f0 = 2402 MHz,
Pout = 4804 MHz
Pout @ 2.5 GHz
1000
kHz
-30
dBm
47
Ω
Typical operating conditions are at 2.75V operating voltage and 25°C ambient temperature.
ΔF2max ≥ 115 kHz for at least 99.9% of all Δf2max.
Modulation index set between 0.28 and 0.35.
Out-of-Band spurs only exist at 2nd and 3rd harmonics of the CW frequency for each channel.
Not tested in production.
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7.9 RF Synthesizer Performance Characteristics
All tests performed are based on Bluetooth Test Specification revision 2.0. All tests are measured at antenna port unless
otherwise specified. TA = -40°C to +85°C. VDD_RF = 2.8V unless otherwise specified. RF system performance specifications
are ensured on Texas Instruments Flagstaff board rev 2.1 evaluation platform. All RF parameters are tested prior to the
antenna.
PARAMETER
fVCO
VCO Frequency Range
tLOCK
Lock Time
Δf0offset (1)
Initial Carrier Frequency
Tolerance
Δf0drift (1)
tD - Tx
(1)
8
Initial Carrier Frequency Drift
Transmitter Delay Time
TEST CONDITIONS
MIN
TYP
2402
f0 ± 20 kHz
MAX
UNIT
2480
MHz
120
µs
During preamble
-75
0
75
kHz
DH1 data packet
-25
0
25
kHz
DH3 data packet
-40
0
40
kHz
DH5 data packet
-40
0
40
kHz
Drift Rate
-20
0
20
kHz/50µs
From Tx data to antenna
4
µs
Frequency accuracy is dependent on crystal oscillator chosen. The crystal must have a cumulative accuracy of < ±20ppm to meet
Bluetooth specifications.
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8 Detailed Description
8.1 Overview
LMX9838 is a fully certified Bluetooth 2.0 module, with integrated processor, radio, antenna, LDO, crystal, and
passive components to form a small form factor plug-n-play solution. The built-in Bluetooth stacks up to the
application layer allows users to communicate directly with SPP commands, and develop additional SPP-based
Bluetooth profiles on Host through UART interface.
8.2 Functional Block Diagram
Link
Manager
Antenna
GPIO
PG6
PG7
UART
TXD
RXD
RTS#
CTS#
UART
Transport
POR
RESET#
32k+
2.4 GHz
Radio
BLUEtooth
Core
TM
Compact RISC
Processor
LFO
32 kHz
32kConfig
Options
XTAL
Voltage
Regulator
ROM
EPROM
Combined
System and
Patch RAM
CVSD
Codecs
Audio
Port
OP3
OP4/PG4
OP5
SCLK
SF
STD
SRD
8.3 Feature Description
8.3.1 Features Overview
The firmware supplied in the on-chip ROM memory offers a complete Bluetooth (v2.0) stack including profiles
and command interface. This firmware features point-to-point and point-to-multipoint link management supporting
data rates up to the theoretical maximum over RFComm of 704 kbps. The internal memory supports up to 7
active Bluetooth data links and one active SCO link.
The on-chip Patch RAM provided for lowest cost and risk, allows the flexibility of firmware upgrade.
The module is lead free and RoHS (Restriction of Hazardous Substances) compliant.
For more information on those quality standards, please visit our green compliance website at
http://focus.ti.com/quality/docs/qualityhome.tsp.
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Feature Description (continued)
8.3.2 Hardware
• Baseband and Link Management Processors based on TI's CompactRISC Core
• Embedded ROM and Patch RAM Memory
• Auxiliary Host Interface Ports:
– Link Status
– Transceiver Status (Tx or Rx)
• Advanced Power Management (APM) Features
• Supports Low-Power Mode with Optional 32.768 kHz Oscillator
• Full Radio Path Integrated Including Antenna
• On-Chip Reference Crystal for Bluetooth Operation
• Single Supply Voltage
8.3.3 Firmware
•
•
Additional Profile Support on Host. e.g:
– Dial Up Networking (DUN)
– Facsimile Profile (FAX)
– File Transfer Protocol (FTP)
– Object Push Profile (OPP)
– Synchronization Profile (SYNC)
– Headset (HSP)
– Handsfree Profile (HFP)
– Basic Imaging Profile (BIP)
– Basic Printing Profile (BPP)
On-Chip Application Including:
– Default Connections
– Command Interface:
– Link Setup and Configuration (also Multipoint)
– Configuration of the Module
– Service Database Modifications
– UART Transparent Mode
– Optimized Cable Replacement:
– Automatic Transparent Mode
– Event Filter
8.3.4 Compliance
• FCC compliance: The device complies with Part 15 of FCC Rules. Operation is subject to the following two
conditions:
– This device may not cause harmful interference
– This device must accept any interference received, including interference that may cause undesired
operation
•
Compliant with IC for Canada, CE for Europe, and MIC for Japan. See Regulatory Compliance.
8.3.5 Package
•
10
Complete system interface provided in Lead Grid Array on underside for surface mount assembly
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Feature Description (continued)
8.3.6 Baseband and Link Management Processors
Baseband and Lower Link control functions are implemented using a combination of Texas Instruments'
CompactRISC 16-bit processor and the Bluetooth Lower Link Controller. These processors operate from
integrated ROM memory and RAM and execute on-board firmware implementing all Bluetooth functions.
8.3.7 Bluetooth Lower Link Controller
The integrated Bluetooth Lower Link Controller (LLC) complies with the Bluetooth Specification version 2.0 and
implements the following functions:
• Adaptive Frequency Hopping
• Interlaced Scanning
• Fast Connect
• Support for 1, 3, and 5 slot packet types
• 79 Channel hop frequency generation circuitry
• Fast frequency hopping at 1600 hops per second
• Power management control
• Access code correlation and slot timing recovery
8.3.8 Bluetooth Upper Layer Stack
The integrated upper layer stack is prequalified and includes the following protocol layers:
• L2CAP
• RFComm
• SDP
8.3.9 Profile Support
The on-chip application of the LMX9838 allows full stand-alone operation, without any Bluetooth protocol layer
necessary outside the module. It supports the Generic Access Profile (GAP), the Service Discovery Application
Profile (SDAP), and the Serial Port Profile (SPP).
The on-chip profiles can be used as interfaces to additional profiles executed on the host. The LMX9838 includes
a configurable service database to answer requests with the profiles supported.
8.3.10 Application With Command Interface
The module supports automatic slave operation eliminating the need for an external control unit. The
implemented transparent option enables the chip to handle incoming data raw, without the need for packaging in
a special format. The device uses a pin to block unallowed connections. This pincode can be fixed or
dynamically set.
Acting as master, the application offers a simple but versatile command interface for standard Bluetooth
operation like inquiry, service discovery, or serial port connection. The firmware supports up to seven slaves.
Default Link Policy settings and a specific master mode allow optimized configuration for the application specific
requirements. See the Integrated Firmware section.
8.3.11 Memory
The LMX9838 introduces 16 kB of combined system and Patch RAM memory that can be used for data and/or
code upgrades of the ROM based firmware. Due to the flexible startup used for the LMX9838 operating
parameters like the Bluetooth Device Address (BD_ADDR) are defined during boot time. This allows reading out
the parameters of an internal EEPROM or programming them directly over UART.
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Feature Description (continued)
8.3.12 Transport Port - UART
The LMX9838 provides one Universal Asynchronous Receiver Transmitter (UART). The UART interface consists
out of Receive (RX), Transmit (TX), Ready-to-Send (RTS) and Clear-to-Send signals. RTS and CTS are used for
hardware handshaking between the host and the LMX9838. Since the LMX9838 acts as gateway between the
bluetooth and the UART interface, Texas Instruments recommends to use the handshaking signals especially for
transparent operation. In case two signals are used CTS needs to be pulled to GND. Refer to LMX9838 Software
User’s Guide, literature number SNOA498 for detailed information on 2-wire operation.
The UART interface supports formats of 8-bit data with or without parity, with one or two stop bits. It can operate
at standard baud rates from 2400bits/s up to a maximum baud rate of 921.6kbits/s. DMA transfers are supported
to allow for fast processor independent receive and transmit operation.
The UART baudrate is configured during startup by checking option pins OP3, OP4 and OP5. Table 2 gives the
correspondence between the OP pins settings and the UART speed.
The UART offers wakeup from the power save modes via the multi-input wakeup module. When the LMX9838 is
in low power mode, RTS# and CTS# can function as Host_WakeUp and Bluetooth_WakeUp respectively.
Table 1 represents the operational modes supported by the firmware for implementing the transport via the
UART.
Table 1. UART Operation Modes
ITEM
RANGE
DEFAULT at POWER-UP
Baud Rate
2.4 to 921.6 kbits/s
Either configured by option pins, NVS
Flow Control
RTS#/CTS# or None
RTS#/CTS#
Parity
Odd, Even, None
None
Stop Bits
1,2
1
Data Bits
8
8
OP3, OP4, OP5 can be strapped to the host logic 0 and 1 levels to set the host interface boot-up configuration.
Alternatively all OP3, OP4, OP5 can be hardwired over 1k Ohm pullup/pulldown resistors. See Table 2.
Table 2. UART Frequency Settings
OP3
(1)
(2)
(3)
12
(1)
OP4
(2)
OP5 (3)
FUNCTION
1
0
0
UART speed read from NVS
1
0
1
UART speed 9.6 kbps
1
1
0
UART speed 115.2 kbps
1
1
1
UART speed 921.6 kbps
If OP3 is 1, must use 1K pull up
If OP4 is 1, must use 1K pull up
If OP5 is 1, must use 1K pull up
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8.3.13 Audio Port
8.3.13.1 Advanced Audio Interface
The Advanced Audio Interface (AAI) is an advanced version of the Synchronous Serial Interface (SSI) that
provides a full-duplex communications port to a variety of industry-standard 13/14/15/16-bit linear or 8-bit log
PCM codecs, DSPs, and other serial audio devices.
The interface allows the support one codec or interface. The firmware selects the desired audio path and
interface configuration by a parameter that is located in RAM (imported from non-volatile storage or programmed
during boot-up). The audio path options include the OKI MSM7717 codec, the Winbond W681360/W681310
codecs and the PCM slave through the AAI.
In case an external codec or DSP is used the LMX9838 audio interface generates the necessary bit and frame
clock driving the interface.
Table 3 summarizes the audio path selection and the configuration of the audio interface at the specific modes.
The LMX9838 supports one SCO link.
Table 3. Audio Path Configuration
INTERFACE
FORMAT
AAI BIT CLOCK
AAI FRAME
CLOCK
AAI FRAME SYNC
PULSE LENGTH
Advanced audio interface
8-bit log PCM
(a-law only)
520 kHz
8 kHz
14 Bits
Advanced audio interface
8-bit log PCM
A-law and u-law
520 kHz
8 kHz
14 Bits
Winbond W681360
Advanced audio interface
13-bit linear
520 kHz
8 kHz
13 Bits
PCM slave (1)
Advanced audio interface
8/16 bits
128 - 1024 kHz
8 kHz
8/16 Bits
AUDIO SETTING
OKI MSM7717
Winbond W681310
(1)
In PCM slave mode, parameters are stored in NVS. Bit clock and frame clock must be generated by the host interface.
8.3.13.1.1 PCM Slave Configuration Example
PCM slave uses the slot 0, 1 slot per frame, 16 bit linear mode, long frame sync, normal frame sync. In this case,
0x03E0 should be stored in NVS. See LMX9838 Software User’s Guide, literature number SNOA498 for more
details.
8.3.14 Auxiliary Ports
8.3.14.1 RESET#
The RESET# is active low and will put radio and baseband into reset.
8.3.15 Digital Smart Radio
8.3.15.1 General Purpose I/Os
The LMX9838 device offers 3 pins which either can be used as indication and configuration pins or can be used
for General Purpose functionality. The selection is made out of settings derived out of the power up sequence.
In General Purpose configuration the pins are controlled hardware specific commands giving the ability to set the
direction, set them to high or low or enable a weak pull-up.
In alternate function the pins have pre-defined indication functionality. Please see Table 4 for a description on the
alternate indication functionality.
Table 4. Alternate GPIO Pin Configuration
PIN
DESCRIPTION
OP4/PG4
Operation Mode pin to configure
Transport Layer settings during boot-up
PG6
GPIO - Link Status indication
PG7
RF Traffic indication
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8.3.16 Functional Architecture
The integrated Digital Smart Radio utilizes a heterodyne receiver architecture with a low intermediate frequency
(2 MHz) such that the intermediate frequency filters can be integrated on chip. The receiver consists of a lownoise amplifier (LNA) followed by two mixers. The intermediate frequency signal processing blocks consist of a
poly-phase bandpass filter (BPF), two hard-limiters (LIM), a frequency discriminator (DET), and a post-detection
filter (PDF). The received signal level is detected by a received signal strength indicator (RSSI).
The received frequency equals the local oscillator frequency (fLO) plus the intermediate frequency (fIF):
fRF = fLO + fIF (supradyne).
The radio includes a synthesizer consisting of a phase detector, a charge pump, an (off-chip) loop-filter, an RFfrequency divider, and a voltage controlled oscillator (VCO).
The transmitter utilizes IQ-modulation with bit-stream data that is gaussian filtered. Other blocks included in the
transmitter are a VCO buffer and a power amplifier (PA).
8.3.17 Receiver Front-End
The receiver front-end consists of a low-noise amplifier (LNA) followed by two mixers and two low-pass filters for
the I- and Q-channels.
The intermediate frequency (IF) part of the receiver front-end consists of two IF amplifiers that receive input
signals from the mixers, delivering balanced I- and Q-signals to the poly-phase bandpass filter. The poly-phase
bandpass filter is directly followed by two hard-limiters that together generate an AD-converted RSSI signal.
8.3.18 Poly-Phase Bandpass Filter
The purpose of the IF bandpass filter is to reject noise and spurious (mainly adjacent channel) interference that
would otherwise enter the hard limiting stage. In addition, it takes care of the image rejection.
The bandpass filter uses both the I- and Q-signals from the mixers. The out-of-band suppression should be
higher than 40 dB (f3 MHz). The bandpass filter is tuned over process spread and temperature
variations by the autotuner circuitry. A 5th order Butterworth filter is used.
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8.3.19 Hard-Limiter and RSSI
The I- and Q-outputs of the bandpass filter are each followed by a hard-limiter. The hard-limiter has its own
reference current. The RSSI (Received Signal Strength Indicator) measures the level of the RF input signal.
The RSSI is generated by piece-wise linear approximation of the level of the RF signal. The RSSI has a mV/dB
scale, and an analog-to-digital converter for processing by the baseband circuit. The input RF power is converted
to a 5-bit value. The RSSI value is then proportional to the input power (in dBm).
The digital output from the ADC is sampled on the BPKTCTL signal low-to-high transition.
8.3.20 Receiver Back-End
The hard-limiters are followed by a two frequency discriminators. The I-frequency discriminator uses the 90×
phase-shifted signal from the Q-path, while the Q-discriminator uses the 90× phase-shifted signal from the I-path.
A poly-phase bandpass filter performs the required phase shifting. The output signals of the I- and Qdiscriminator are substracted and filtered by a low-pass filter. An equalizer is added to improve the eye-pattern
for 101010 patterns.
After equalization, a dynamic AFC (automatic frequency offset compensation) circuit and slicer extract the
RX_DATA from the analog data pattern. It is expected that the Eb/No of the demodulator is approximately 17 dB.
8.3.21 Frequency Discriminator
The frequency discriminator gets its input signals from the limiter. A defined signal level (independent of the
power supply voltage) is needed to obtain the input signal. Both inputs of the frequency discriminator have
limiting circuits to optimize performance. The bandpass filter in the frequency discriminator is tuned by the
autotuning circuitry.
8.3.22 Post-Detection Filter and Equalizer
The output signals of the FM discriminator first go through a post-detection filter and then through an equalizer.
Both the post-detection filter and equalizer are tuned to the proper frequency by the autotuning circuitry. The
post-detection filter is a low-pass filter intended to suppress all remaining spurious signals, such as the second
harmonic (4 MHz) from the FM detector and noise generated after the limiter.
The post-detection filter also helps for attenuating the first adjacent channel signal. The equalizer improves the
eye-opening for 101010 patterns. The post-detection filter is a third order Butterworth filter.
8.3.23 Autotuning Circuitry
The autotuning circuitry is used for tuning the bandpass filter, the detector, the post-detection filter, the equalizer,
and the transmit filters for process and temperature variations. The circuit also includes an offset compensation
for the FM detector.
8.3.24 Synthesizer
The synthesizer consists of a phase-frequency detector, a charge pump, a low-pass loop filter, a programmable
frequency divider, a voltage-controlled oscillator (VCO), a delta-sigma modulator, and a lookup table.
The frequency divider consists of a divide-by-2 circuit (divides the 5 GHz signal from the VCO down to 2.5 GHz),
a divide-by-8-or-9 divider, and a digital modulus control. The delta-sigma modulator controls the division ratio and
also generates an input channel value to the lookup table.
8.3.25 Phase-Frequency Detector
The phase-frequency detector is a 5-state phase-detector. It responds only to transitions, hence phase-error is
independent of input waveform duty cycle or amplitude variations. Loop lockup occurs when all the negative
transitions on the inputs, F_REF and F_MOD, coincide. Both outputs (i.e., Up and Down) then remain high. This
is equal to the zero error mode. The phase-frequency detector input frequency range operates at 12 MHz.
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8.3.26 Transmitter Circuitry
The transmitter consists of ROM tables, two Digital to Analog (DA) converters, two low-pass filters, IQ mixers,
and a power amplifier (PA).
The ROM tables generate a digital IQ signal based on the transmit data. The output of the ROM tables is
inserted into IQ-DA converters and filtered through two low-pass filters. The two signal components are mixed up
to 2.5 GHz by the TX mixers and added together before being inserted into the transmit PA.
8.3.27 IQ-DA Converters and TX Mixers
The ROM output signals drive an I- and a Q-DA converter. Two Butterworth low-pass filters filter the DA output
signals. The 6 MHz clock for the DA converters and the logic circuitry around the ROM tables are derived from
the autotuner.
The TX mixers mix the balanced I- and Q-signals up to 2.4-2.5 GHz. The output signals of the I- and Q-mixers
are summed.
8.3.28 32 kHz Oscillator
An oscillator is provided (see Figure 1) that is tuned to provide optimum performance and low-power
consumption while operating with a 32.768 kHz crystal. An external crystal clock network is required between the
32k+ clock input (pad 27) and the 32k- clock output (pad 28) signals.The oscillator is built in a Pierce
configuration and uses two external capacitors. Table 5 provides the oscillator’s specifications.
In case the 32kHz is not used, it is recommended to leave 32k- open and connect 32k+ to GND.
Figure 1. 32.768 kHz Oscillator
Table 5. 32.768 kHz Oscillator Specifications
PARAMETER
VDD
Supply Voltage
IDDACT
Supply Current (Active)
f
Nominal Output Frequency
VPPOSC
Oscillating Amplitude
CONDITION
MIN
TYP
MAX
1.62
1.8
1.98
V
2
µA
32.768
kHz
1.8
Duty Cycle
UNIT
40%
—
V
60%
8.3.29 Integrated Firmware
The LMX9838 device includes the full Bluetooth stack up to RFComm to support the following profiles:
• GAP (Generic Access Profile)
• SDAP (Service Discovery Application Profile)
• SPP (Serial Port Profile)
Figure 2 shows the Bluetooth protocol stack with command interpreter interface. The command interpreter offers
a number of different commands to support the functionality given by the different profiles. Execution and
interface timing is handled by the control application.
The chip has an internal data area in RAM that includes the parameters shown in Table 6.
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Figure 2. LMX9838 Software Implementation
8.4 Device Functional Modes
8.4.1 Operation Modes
On boot-up, the application configures the module following the parameters in the data area.
8.4.1.1 Automatic Operation
8.4.1.1.1 No Default Connections Stored:
In Automatic Operation the module is connectable and discoverable and automatically answers to service
requests. The command interpreter listens to commands and links can be set up. The full command list is
supported.
If connected by another device, the module sends an event back to the host, where the RFComm port has been
connected, and switches to transparent mode.
8.4.1.1.2 Default Connections Stored
If default connections were stored on a previous session, once the LMX9838 is reset, it will attempt to connect
each device stored within the data RAM three times. The host will be notified about the success of the link setup
via a link status event.
8.4.1.1.3 Non-Automatic Operation
In Non-Automatic Operation, the LMX9838 does not check the default connections section within the Data RAM.
If connected by another device, it will NOT switch to transparent mode and continue to interpret data sent on the
UART.
8.4.1.1.4 Transparent Mode
The LMX9838 supports transparent data communication from the UART interface to a bluetooth link.
If activated, the module does not interpret the commands on the UART which normally are used to configure and
control the module. The packages don’t need to be formatted as described in Table 8. Instead all data are
directly passed through the firmware to the active bluetooth link and the remote device.
Transparent mode can only be supported on a point-to-point connection. To leave Transparent mode, the host
must send a UART_BREAK signal to the module.
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Device Functional Modes (continued)
8.4.1.1.5 Force Master Mode
In Force Master mode tries to act like an access point for multiple connections. For this it will only accept the link
if a Master/slave role switch is accepted by the connecting device. After successful link establishment the
LMX9838 will be Master and available for additional incoming links. On the first incoming link the LMX9838 will
switch to transparent depending on the setting for automatic or command mode. Additional links will only be
possible if the device is not in transparent mode.
8.4.2 Default Connections
The LMX9838 device supports the storage of up to 3 devices within its NVS. Those connections can either be
connected after reset or on demand using a specific command.
8.4.3 Event Filter
The LMX9838 uses events or indicators to notify the host about successful commands or changes at the
bluetooth interface. Depending on the application the LMX9838 can be configured. The following levels are
defined:
• No Events:
– The LMX9838 is not reporting any events. Optimized for passive cable replacement solutions.
• Standard LMX9838 events:
– Only necessary events will be reported.
• All events:
– Additional to the standard all changes at the physical layer will be reported.
8.4.4 Default Link Policy
Each Bluetooth Link can be configured to support M/S role switch, Hold Mode, Sniff Mode and Park Mode. The
default link policy defines the standard setting for incoming and outgoing connections.
8.4.5 Audio Support
The LMX9838 offers commands to establish and release synchronous connections (SCO) to support Headset or
Handsfree applications. The firmware supports one active link with all available package types (HV1, HV2, HV3),
routing the audio data between the bluetooth link and the advanced audio interface. In order to provide the
analog data interface, an external audio codec is required. The LMX9838 includes a list of codecs which can be
used.
Table 6. Operation Parameters Stored in LMX9838
PARAMETER
DEFAULT VALUE
DESCRIPTION
BDADDR
Preprogrammed by TI
Local Name
Serial port device
PinCode
0000
Bluetooth PinCode
Operation Mode
Automatic ON
Automatic mode ON or OFF
Default Connections
0
Up to seven default devices to connect to
SDP Database
1 SPP entry:
Name: COM1
Authentication and encryption
enabled
Service discovery database, control for supported profiles
UART Speed
9600
Sets the speed of the physical UART interface to the host
UART Settings
1 Stop bit, parity disabled
Parity and stop bits on the hardware UART interface
Ports to Open
0000 0001
Defines the RFComm ports to open
Link Keys
No link keys
Link keys for paired devices
Security Mode
2
Security mode
Page Scan Mode
Connectable
Connectable/Not connectable for other devices
18
Bluetooth device address
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Device Functional Modes (continued)
Table 6. Operation Parameters Stored in LMX9838 (continued)
PARAMETER
DEFAULT VALUE
DESCRIPTION
Inquiry Scan Mode
Discoverable
Discoverable/Not Discoverable/Limited Discoverable for other
devices
Default Link Policy
All modes allowed
Configures modes allowed for incoming or outgoing connections
(Role switch, Hold mode, Sniff mode...)
Default Link Timeout
20 seconds
The Default Link Timeout configures the timeout, after which the link
is assumed lost, if no packages have been received from the remote
device
Event Filter
Standard LMX9838 events reported
Defines the level of reporting on the UART
- no events
- standard events
- standard including ACL link events
none
Configures the settings for the external codec and the air format.
• Codecs:
- Winbond W681360
- OKI MSM7717 / Winbond W681310
- PCM Slave
• Air Format:
- CVSD
- µ-Law
- A-Law
Default Audio Settings
8.4.6 Low Power Modes
The LMX9838 supports different Low Power Modes to reduce power in different operating situations. The
modular structure of the LMX9838 allows the firmware to power down unused modules.
The Low power modes have influence on:
• UART transport layer
– enabling or disabling the interface
• Bluetooth Baseband activity
– firmware disables LLC and Radio if possible
8.4.6.1 Power Modes
The following LMX9838 power modes, which depend on the activity level of the UART transport layer and the
radio activity are defined:
The radio activity level mainly depends on application requirements and is defined by standard bluetooth
operations like inquiry/page scanning or an active link.
A remote device establishing or disconnecting a link may also indirectly change the radio activity level.
The UART transport layer by default is enabled on device power up. In order to disable the transport layer the
command “Disable Transport Layer” is used. Thus only the Host side command interface can disable the
transport layer. Enabling the transport layer is controlled by the HW Wakeup signalling. This can be done from
either the Host or the LMX9838. See the LMX9838 Software User’s Guide, literature number SNOA498 for
detailed information on timing and implementation requirements.
Table 7. Power Mode Activity
POWER MODE
UART ACTIVITY
RADIO ACTIVITY
REFERENCE CLOCK
PM0
OFF
OFF
none
PM1
ON
OFF
Main Clock
PM2
OFF
Scanning
Main Clock / 32.768 kHz
PM3
ON
Scanning
Main Clock
PM4
OFF
SPP Link
Main Clock
PM5
ON
SPP Link
Main Clock
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Figure 3. Transition Between Different Hardware Power Modes
8.4.7 Enabling and Disabling UART Transport
8.4.7.1 Hardware Wake-up Functionality
In certain usage scenarios the host is able to switch off the transport layer of the LMX9838 in order to reduce
power consumption. Afterwards both devices, host and LMX9838 are able to shut down their UART interfaces.
In order to save system connections the UART interface is reconfigured to hardware wake-up functionality. For a
detailed timing and command functionality, see the LMX9838 Software User’s Guide, AN-1699 literature number
SNOA498. The interface between host and LMX9838 is defined as described in Figure 4.
Figure 4. UART NULL Modem Connection
8.4.7.2 Disabling the UART Transport Layer
The Host can disable the UART transport layer by sending the “Disable Transport Layer” Command. The
LMX9838 will empty its buffers, send the confirmation event and disable its UART interface. Afterwards the
UART interface will be reconfigured to wake up on a falling edge of the CTS pin.
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8.4.7.3 LMX9838 Enabling The UART Interface
As the Transport Layer can be disabled in any situation the LMX9838 must first make sure the transport layer is
enabled before sending data to the host. Possible scenarios can be incoming data or incoming link indicators. If
the UART is not enabled the LMX9838 assumes that the Host is sleeping and waking it up by activating RTS. To
be able to react on that Wake up, the host has to monitor the CTS pin.
As soon as the host activates its RTS pin, the LMX9838 will first send a confirmation event and then start to
transmit the events.
8.4.7.4 Enabling the UART Transport Layer From The Host
If the host needs to send data or commands to the LMX9838 while the UART Transport Layer is disabled it must
first assume that the LMX9838 is sleeping and wake it up using its RTS signal. When the LMX9838 detects the
Wake-Up signal it activates the UART HW and acknowledges the Wake-Up signal by settings its RTS.
Additionally the Wake up will be confirmed by a confirmation event. When the Host has received this “Transport
Layer Enabled” event, the LMX9838 is ready to receive commands.
8.5 Programming - Command Interface
The LMX9838 offers Bluetooth functionality in either a self contained slave functionality or over a simple
command interface. The interface is listening on the UART interface.
The following sections describe the protocol transported on the UART interface between the LMX9838 and the
host in command mode (see Figure 5). In Transparent mode, no data framing is necessary and the device does
not listen for commands.
8.5.1 Framing
The connection is considered “Error free”. But for packet recognition and synchronization, some framing is used.
All packets sent in both directions are constructed per the model shown in Table 8.
8.5.2 Start and End Delimiter
The “STX” char is used as start delimiter: STX = 0x02. ETX = 0x03 is used as end delimiter.
8.5.3 Packet Type ID
This byte identifies the type of packet. See Table 9 for details.
8.5.4 Opcode
The opcode identifies the command to execute. The opcode values can be found within the LMX9838 Software
User’s Guide included with the LMX9838 Evaluation Board.
8.5.5 Data Length
Number of bytes in the Packet Data field. The maximum size is defined with 333 data bytes per packet.
8.5.6 Checksum
This is a simple Block Check Character (BCC) checksum of the bytes “Packet type”, “Opcode” and “Data
Length”. The BCC checksum is calculated as low byte of the sum of all bytes (that is, if the sum of all bytes is
0x3724, the checksum is 0x24).
Figure 5. Bluetooth Functionality
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Programming - Command Interface (continued)
Table 8. Package Framing
START
DELIMITER
PACKET TYPE
ID
OPCODE
DATA LENGTH
CHECK SUM
PACKET DATA
END
DELIMITER
1 Byte
1 Byte
1 Byte
2 Bytes
1 Byte
Bytes
1 Byte
- - - - - - - - - - - - - Checksum - - - - - - - - - - - - -
Table 9. Packet Type Identification
ID
DIRECTION
DESCRIPTION
0x52
'R'
REQUEST
(REQ)
A request sent to the Bluetooth module.
All requests are answered by exactly one confirm.
0x43
'C'
Confirm
(CFM)
The Bluetooth modules confirm to a request.
All requests are answered by exactly one confirm.
0x69
'i'
Indication
(IND)
Information sent from the Bluetooth module that is not a direct confirm to a request.
Indicating status changes, incoming links, or unrequested events.
0x72
'r'
Response
(RES)
An optional response to an indication.
This is used to respond to some type of indication message.
8.5.7 Command Set Overview
The LMX9838 has a well defined command set to:
• Configure the device:
– Hardware settings
– Local Bluetooth parameters
– Service database
• Set up and handle links
Table 10 through Table 20 show the actual command set and the events coming back from the device. A full
documented description of the commands can be found in the LMX9838 Software User’s Guide, literature
number SNOA498.
Note: For standard Bluetooth operation only commands from Table 10 through Table 12 will be used. Most of the
remaining commands are for configuration purposes only.
Table 10. Device Discovery
COMMAND
Inquiry
Remote Device Name
EVENT
DESCRIPTION
Inquiry Complete
Search for devices
Device Found
Lists BDADDR and class of device
Remote Device Name Confirm
Get name of remote device
Table 11. SDAP Client Commands
COMMAND
SDAP Connect
EVENT
DESCRIPTION
SDAP Connect Confirm
Create an SDP connection to remote device
SDAP Disconnect Confirm
Disconnect an active SDAP link
Connection Lost
Notification for lost SDAP link
SDAP Service Browse
Service Browse Confirm
Get the services of the remote device
SDAP Service Search
SDAP Service Search Confirm
Search a specific service on a remote device
SDAP Attribute Request
SDAP Attribute Request Confirm
Searches for services with specific attributes
SDAP Disconnect
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Table 12. SPP Link Establishment
COMMAND
EVENT
DESCRIPTION
Establishing SPP Link Confirm
Initiates link establishment to a remote device
Link Established
Link successfully established
Incoming Link
A remote device established a link to the local device
Set Link Timeout
Set Link Timeout Confirm
Confirms the Supervision Timeout for the existing Link
Get Link Timeout
Get Link Timeout Confirm
Get the Supervision Timeout for the existing Link
Release SPP Link
Release SPP Link Confirm
Initiate release of SPP link
SPP Send Data Confirm
Send data to specific SPP port
Incoming Data
Incoming data from remote device
Transparent Mode Confirm
Switch to Transparent mode on the UART
Establish SPP Link
SPP Send Data
Transparent Mode
Table 13. Storing Default Connections
COMMAND
EVENT
DESCRIPTION
Connect Default Connection
Connect Default Connection Confirm
Connects to either one or all stored default connections
Store Default Connection
Store Default Connection Confirm
Store device as default connection
Get list of Default Connections
List of Default Devices
Delete Default Connections
Delete Default Connections Confirm
Table 14. Bluetooth Low Power Modes
COMMAND
EVENT
DESCRIPTION
Set Default Link Policy
Set Default Link Policy Confirm
Defines the link policy used for any incoming or outgoing link
Get Default Link Policy
Get Default Link Policy Confirm
Returns the stored default link policy
Set Link Policy
Set Link Policy Confirm
Defines the modes allowed for a specific link
Get Link Policy
Get Link Policy Confirm
Returns the actual link policy for the link
Enter Sniff Mode
Enter Sniff Mode Confirm
Exit Sniff Mode
Exit Sniff Mode Confirm
Enter Hold Mode
Enter Hold Mode Confirm
Power Save Mode Changed
Remote device changed power save mode on the link
Table 15. Audio Control Commands
COMMAND
Establish SCO Link
EVENT
DESCRIPTION
Establish SCO Link Confirm
Establish SCO Link on existing RFComm Link
SCO Link Established Indicator
A remote device has established a SCO link to the local
device
Release SCO Link Confirm
Release SCO Link Audio Control
SCO Link Released Indicator
SCO Link has been released
Change SCO Packet Type Confirm
Changes Packet Type for existing SCO link
SCO Packet Type changed indicator
SCO Packet Type has been changed
Set Audio Settings
Set Audio Settings Confirm
Set Audio Settings for existing Link
Get Audio Settings
Get Audio Settings Confirm
Get Audio Settings for existing Link
Set Volume
Set Volume Confirm
Configure the volume
Get Volume
Get Volume Confirm
Get current volume setting
Mute
Mute Confirm
Mutes the microphone input
Release SCO Link
Change SCO Packet Type
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Table 16. Wake Up Functionality
COMMAND
Disable Transport Layer
EVENT
DESCRIPTION
Disabling the UART Transport Layer and activates the
Hardware Wakeup function
Transport Layer Enabled
Table 17. SPP Port Configuration and Status
COMMAND
Set Port Config
Get Port Config
EVENT
DESCRIPTION
Set Port Config Confirm
Set port setting for the virtual serial port link over the air
Get Port Config Confirm
Read the actual port settings for a virtual serial port
Port Config Changed
Notification if port settings were changed from remote device
SPP Get Port Status
SPP Get Port Status Confirm
Returns status of DTR, RTS (for the active RFComm link)
SPP Port Set DTR
SPP Port Set DTR Confirm
Sets the DTR bit on the specified link
SPP Port Set RTS
SPP Port Set RTS Confirm
Sets the RTS bit on the specified link
SPP Port BREAK
SPP Port BREAK
Indicates that the host has detected a break
SPP Port Overrun Error
SPP Port Overrun Error Confirm
Used to indicate that the host has detected an overrun error
SPP Port Parity Error
SPP Port Parity Error Confirm
Host has detected a parity error
SPP Port Framing Error
SPP Port Framing Error Confirm
Host has detected a framing error
SPP Port Status Changed
Indicates that remote device has changed one of the port
status bits
Table 18. Local Bluetooth Settings
COMMAND
EVENT
DESCRIPTION
Read Local Name
Read Local Name Confirm
Read actual friendly name of the device
Write Local Name
Write Local Name Confirm
Set the friendly name of the device
Read Local BDADDR
Read Local BDADDR Confirm
Change Local BDADDR
Change Local BDADDR Confirm
Store Class of Device
Store Class of Device Confirm
Set Scan Mode
Set Scan Mode Confirm
Change mode for discoverability and connectability
Note: The BDADDR is programmed by TI. It cannot be retrieved if erased!
Set Scan Mode Indication
Reports end of Automatic limited discoverable mode
Get Fixed Pin
Get Fixed Pin Confirm
Reads current PinCode stored within the device
Set Fixed Pin
Set Fixed Pin Confirm
Set the local PinCode
PIN request
a PIN code is requested during authentication of an ACL link
Get Security Mode
Get Security Mode Confirm
Get actual Security mode
Set Security Mode
Set Security Mode Confirm
Configure Security mode for local device (default 2)
Remove Pairing
Remove Pairing Confirm
Remove pairing with a remote device
List Paired Devices
List of Paired Devices
Get list of paired devices stored in the LMX9838 data memory
Set Default Link Timeout
Set Default Link Timeout Confirm
Store default link supervision timeout
Get Default Link Timeout
Get Default Link Timeout Confirm
Get stored default link supervision timeout
Force Master Role
Force Master Role Confirm
Enables/Disables the request for master role at incoming connections
24
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Table 19. Local Service Database Configuration
COMMAND
EVENT
DESCRIPTION
Store generic SDP Record
Store SDP Record Confirm
Create a new service record within the service database
Enable SDP Record
Enable SDP Record Confirm
Enable or disable SDP records
Delete All SDP Records
Delete All SDP Records Confirm
Ports to Open
Ports to Open Confirmed
Specify the RFComm Ports to open on startup
Table 20. Local Hardware Commands
COMMAND
EVENT
DESCRIPTION
Set Default Audio Settings
Set Default Audio Settings Confirm
Configure Default Settings for Audio Codec and Air Format,
stored in NVS
Get Default Audio Settings
Get Default Audio Settings Confirm
Get stored Default Audio Settings
Set Event Filter
Set Event Filter Confirm
Configures the reporting level of the command interface
Get Event Filter
Get Event Filter Confirm
Get the status of the reporting level
Read RSSI
Read RSSI Confirm
Returns an indicator for the incoming signal strength
Change UART Speed
Change UART Speed Confirm
Set specific UART speed; needs proper ISEL pin setting
Change UART Settings
Change UART Settings Confirm
Change configuration for parity and stop bits
Test Mode
Test Mode Confirm
Enable Bluetooth, EMI test, or local loopback
Restore Factory Settings
Restore Factory Settings Confirm
Reset
Dongle Ready
Soft reset
Stops the bluetooth firmware and executes the In-systemprogramming code
Firmware Upgrade
Set Clock Frequency
Set Clock Frequency Confirm
Write Clock Frequency setting in the NVS
Get Clock Frequency
Get Clock Frequency Confirm
Read Clock Frequency setting from the NVS
Set PCM Slave Configuration
Set PCM Slave Configuration Confirm
Write the PCM Slave Configuration in the NVS
Write ROM Patch
Write ROM Patch Confirm
Store ROM Patch in the Simply Blue module
Read Memory
Read Memory Confirm
Read from the internal RAM
Write Memory
Write Memory Confirm
Write to the internal RAM
Read NVS
Read NVS Confirm
Read from the NVS (EEPROM)
Write NVS
Write NVS Confirm
Write to the NVS (EEPROM)
Table 21. Initialization Commands
COMMAND
EVENT
DESCRIPTION
Set Clock and Baudrate
Set Clock and Baudrate Confirm
Write Baseband frequency and Baudrate used
Enter Bluetooth Mode
Enter Bluetooth Mode Confirm
Request SimplyBlue module to enter BT mode
Set Clock and Baudrate
Set Clock and Baudrate Confirm
Write Baseband frequency and Baudrate used
Table 22. GPIO Control Commands
COMMAND
EVENT
DESCRIPTION
Set GPIO WPU
Set GPIO WPU Confirm
Enable/Disable weak pull up resistor on GPIOs
Get GPIO Input State
Get GPIO Input States Confirm
Read the status of the GPIOs
Set GPIO Direction
Set GPIO Direction Confirm
Set the GPIOs direction (Input, Ouput)
Set GPIO Output High
Set GPIO Output High Confirm
Set GPIOs Output to logical High
Set GPIO Output Low
Set GPIO Output Low Confirm
Set GPIOs Output to logical Low
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Typical Applications
The following diagrams show two application examples for LMX9838 implementations.
Figure 6 illustrates a cable replacement application, requiring the physical UART interface to a data device like a
sensor. The LMX9838 just waits for an incoming link and forwards data between the data device and the
bluetooth link. PG6 acts as active link indicator and is used to enable the data transfer from the sensor. A
32.768khz crystal may be is used to reduce power consumption while waiting for the incoming link.
Figure 7 shows an example for the connection to a host controller, which can include a simple application to
control the LMX9838. The figure also includes the connection to a PCM codec, in case the host controller
application includes an audio profile. Reset, OP4 and OP5 are controlled by the host for full control of the
LMX9838 status.
Refer to the Power Supply Schematics section for more detailed descriptions for LMX9838 designs.
330:
1 k:
PG7
OP3
1 k:
OP4
LMX9838
OP5
CTS
RTS
RTS
CTS
RXD
TXD
TXD
RXD
PG6
EN
Data device
with Sensor
RESET#
32.768 KHZ (OPTIONAL)
22 pF
22 pF
Figure 6. Example For A Cable Replacement Application
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Typical Applications (continued)
330:
330:
1 k:
PG6
PG7
OP3
CTS
RTS
RXD
TXD
LMX9838
SCLK
SFS
STD
RTS
CTS
TXD
RXD
RESET#
GPIO1
OP5
GPIO2
OP4
GPIO3
Host
Controller
SRD
Audio Codec
Figure 7. Example For Host Controller Based Application With Audio Support
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9.1.1 Design Requirements
9.1.1.1 Evaluation Design
VCC
VCC
R1
1k
R2
1k
1
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
32
31
30
29
24
18
17
4
3
J1
2
OP3
U1
LMX9838
NC
PG7
NC
PG6
NC
OP5
NC
OP4/PG4
NC
OP3
NC
NC
NC
NC
NC
32k-
NC
32k+
NC
NC
NC
NC
NC
NC
NC
SRD
STD
NC
NC
SFS
NC
SCLK
NC
NC
NC
NC
NC
NC
NC
CTS#
NC
RTS#
NC
TXD
NC
RXD
NC
NC
NC
NC
VCC
NC
GND
VCC_IO
GND
MVCC
GND
NC
GND
NC
GND
XOSCEN
GND
VCC_CORE
GND
NC
GND
RESET#
GND
NC
R3
1k
J2
1
OP4
VCC
VCC
2
19
PG7
7
PG6
25
OP5
26
1
PG6
1
PG7
Y1
32.768 kHz
VCC C15
1 PF
C14
1 PF
C13
1 PF
C6
22 pF
2
5
VCC
6
40
1
SCLK 2
22
STD
3
21
SFS
4
20
SRD
5
C1+
12
R_IN 16
9
R_IN
T_OUT 8
V+
V-
10 R_OUT
INVALD
20
37
R7
OR
R8
OR
R9
OR
R10
NM
R11
10k
17
T_OUT
T_IN
14
R6
OR
+
1
J6
DC-015PBT
5V MAX
3
+ C11
1 PF
FORCEON READY
FORCEOFF GND
R13
OR
19
C1-
R_OUT
15
38
VCC
C2+
C2-
13 T_IN
J4
AUDIO
6
39
J7
BATTHOLDER
C9
100 pF
2
R15
NM
U2
MAX3225
4
42
23
TP6
VIN
U3
LP3965-3.3V
5
1
VOUT
VIN
4
BYPASS
2
3
GND
VEN
2
27
41
C9
100 nF
C5
22 pF
OP3
43
+ C12
1 PF
D2
BLUE
2
44
28
VCC
R5
330R
D1
RED
1 J3
OP4
16
R4
330R
2
OP5
TP7
GND
VCC
TP5 TP4 TP3 TP2 TP1
R16
NM
5
9
4
8
3
7
2
6
1
R17
OR
3
7
J8
DB9 MALE
11
1
18
R12
10k
C17
1 PF
R14
OR
C16
1PF
R18
NM
15
14
13
12
VCC
VCC
36
35
C3
100 nF
11
6
33
8
9
1
2
10
34
C4
2.2 PF
C7
2.2 PF
VCC_CORE
C2
2.2 PF
C1
100 nF
3
C8
100 nF
TP8
RESET
J5
UART
BAUD RATE SETTINGS
JUMPER
921K
115K
NVS
TXD
4
J1
SHORT SHORT SHORT
CTS#
5
J2
SHORT SHORT OPEN
RXD
6
J3
SHORT OPEN
RTS#
7
OPEN
VCC_CORE_IN 8
9
5
2
1
C18
NM
1
2
3
4
5
J9
SMA FEMALE
3
1
C19
1 PF
S1
SKQTLCE010
4
2
J10
VCC_CORE
1
2
Network required if using external source.
Vcc grounded if Vcc_core using external source.
(for Vcc_core using external source, refer to figure 12)
Vcc_core open if using internal regulator.
(for Vcc_core using internal source, refer to figures 10 and 11)
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9.1.1.2 Evaluation Design Reflow Profile:
OVEN
210
260
250
220
200
180
170
160
150
140
210
260
250
220
200
180
170
160
150
140
210
260
250
220
200
180
170
160
150
140
210
260
250
220
200
180
170
160
150
140
62 cm / 62 min
Figure 8. Reflow Temperature Process
9.1.2 Detailed Design Procedure
9.1.2.1 Soldering
The LMX9838 bumps are designed to melt as part of the Surface Mount Assembly (SMA) process. In order to
ensure reflow of all solder bumps and maximum solder joint reliability while minimizing damage to the package,
recommended reflow profiles should be used.
Table 23, Table 24 and Figure 9 provide the soldering details required to properly solder the LMX9838 to
standard PCBs. The illustration serves only as a guide and TI is not liable if a selected profile does not work.
See IPC/JEDEC J-STD-020C, July 2004 for more information.
Table 23. Soldering Details
PARAMETER
VALUE
PCB Land Pad Diameter
13 mil
PCB Solder Mask Opening
19 mil
PCB Finish (HASL details)
Defined by customer or manufacturing facility
Stencil Aperture
17 mil
Stencil Thickness
5 mil
Solder Paste Used
Defined by customer or manufacturing facility
Flux Cleaning Process
Defined by customer or manufacturing facility
Reflow Profiles
See Figure 9
Table 24. Classification Reflow Profiles (1) (2)
PROFILE FEATURE
NOPB ASSEMBLY
Average Ramp-Up Rate (TsMAX to Tp)
3°C/second maximum
Preheat:
Temperature Min (TsMIN)
Temperature Max (TsMAX)
Time (tsMIN to tsMAX)
(1)
(2)
150°C
200°C
60 – 180 seconds
See IPC/JEDEC J-STD-020C, July 2004.
All temperatures refer to the top side of the package, measured on the package body surface.
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Table 24. Classification Reflow Profiles(1)(2) (continued)
PROFILE FEATURE
NOPB ASSEMBLY
Time maintained above:
Temperature (TL)
Time (tL)
217°C
60 – 150 seconds
Peak/Classification Temperature (Tp)
250 + 0°C
Time within 5°C of actual Peak Temperature (tp)
20 – 40 seconds
Ramp-Down Rate
6°C/second maximum
Time 25 °C to Peak Temperature
8 minutes maximum
Reflow Profiles
See Figure 9
9.1.3 Application Performance Plots
Figure 9. Typical Reflow Profiles
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10 Power Supply Recommendations
10.1 Power Supply Schematics
The different possibilities to power supply the LMX9838 depend on the IO interface logic level.
Figure 10 represents an example of system functional schematic for the LMX9838 using a 3.0V to 3.3V IO
interface.
Figure 11 represents an example of system functional schematic for the LMX9838 using a 2.5V to 3.0V IO
interface.
Figure 12 represents an example of system functional schematic for the LMX9838 using a 1.8V to 2.5V IO
interface.
Figure 13 represents an example of system functional schematic for the LMX9838 using a 1.8V IO interface.
10.1.1 Frequency and BAUDRATE Selection
MVCC
2.2 PF
MVCC
3.0V ~3.3V
100 nF
NC
100 nF
100 nF
2.2 PF
2.2 PF
10
9
11
6
MVCC
VCC VCC_CORE VCC_IO
Optional 32 kHz
If not used
-32k+ = GND
-32k- = NC
27
Y1
28
RXD
32k+
TXD
32k-
RTS
32.768 kHz
C2
CTS
C1
LMX9838
23
Advanced Audio Interface
Connect to PCM codec
or leave open
22
21
20
RESET#
12
13
UART System Bus
Connected to Host
14
15
2
Reset line connected to host
SRD
VCC_IO
STD
SFS
1k
1k
1k
SCLK
For No Connects
Reference Table 5
All Common
GROUND
Reference
Table 5
OP3
OP4
OP5
16
26
25
Frequency Baud
Rate selector
Settings shown for
921600 BPS
For other baudrates
reference Table 7
NC
Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
Figure 10. 3.0 V to 3.3 V Example Functional System Schematic
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Power Supply Schematics (continued)
VCC_IO
2.2 PF
2.5V ~ 3.0V
3.0V+
100 nF
NC
100 nF
100 nF
2.2 PF
2.2 PF
10
9
11
6
MVCC
VCC VCC_CORE VCC_IO
Optional 32 kHz
If not used
-32k+ = GND
-32k- = NC
27
Y1
28
RXD
32k+
TXD
32k-
RTS
32.768 kHz
C2
CTS
C1
LMX9838
23
Advanced Audio Interface
Connect to PCM codec
or leave open
22
21
20
RESET#
12
13
UART System Bus
Connected to Host
14
15
2
Reset line connected to host
SRD
STD
VCC_IO
SFS
1k
1k
1k
SCLK
All Common
GROUND
Reference
Table 5
For No Connects
Reference Table 5
OP3
OP4
OP5
16
Frequency Baud
Rate selector
Settings shown for
921600 BPS
26
25
For other baudrates
reference Table 7
NC
Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Recommended Operating Conditions.
Figure 11. 2.5 V to 3.0 V Example Functional System Schematic
1.8V
1.8V ~ 2.5V
3.0V+
2.2 PF 100 nF
100 nF
100 nF
2.2 PF
2.2 PF
10
9
VCC
Optional 32 kHz
If not used
-32k+ = GND
-32k- = NC
27
Y1
28
6
11
MVCC
VCC_CORE VCC_IO
32k+
RXD
32k-
RTS
TXD
32.768 kHz
C2
CTS
C1
LMX9838
23
Advanced Audio Interface
Connect to PCM codec
or leave open
22
21
20
RESET#
12
13
UART System Bus
Connected to Host
14
15
2
Reset line connected to host
SRD
STD
VCC_IO
SFS
1k
SCLK
For No Connects
Reference Table 5
All Common
GROUND
Reference
Table 5
OP3
OP4
OP5
16
26
25
1k
1k
Frequency Baud
Rate selector
Settings shown for
921600 BPS
For other baudrates
reference Table 7
NC
Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Recommended Operating Conditions.
Figure 12. 1.8 V to 2.5 V Example Functional System Schematic
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Power Supply Schematics (continued)
1.8V
3.0V+
1.8V
2.2 PF 100 nF
100 nF
100 nF
2.2 PF
2.2 PF
10
9
VCC
Optional 32 kHz
If not used
-32k+ = GND
-32k- = NC
27
Y1
28
6
11
MVCC
VCC_CORE VCC_IO
RXD
32k+
TXD
32k-
RTS
32.768 kHz
C2
CTS
C1
LMX9838
23
Advanced Audio Interface
Connect to PCM codec
or leave open
22
21
20
RESET#
12
13
UART System Bus
Connected to Host
14
15
2
Reset line connected to host
SRD
STD
VCC_IO
SFS
1k
1k
1k
SCLK
For No Connects
Reference Table 5
All Common
GROUND
Reference
Table 5
OP3
OP4
OP5
Frequency Baud
Rate selector
Settings shown for
921600 BPS
16
26
25
For other baudrates
reference Table 7
NC
Notes:
Capacitor values C1 and C2 may vary depending on design and crystal manufacturer specification.
MVCC can be connected to 3.0V and above in this configuration. Please see Recommended Operating Conditions.
Figure 13. 1.8 V Example Functional System Schematic
10.2 Filtered Power Supply
It is important to provide the LMX9838 with adequate ground planes and a filtered power supply. It is highly
recommended that a 2.2 μF and a 100 nF bypass capacitor be placed as close as possible to the power supply
pins VCC, MVCC, and VCC_IO.
10.3 Power Up
The LMX9838 contains an internal EEPROM initialized during power up or hardware reset. During this
initialization phase it is recommended not to:
• Send a command to the LMX9838: The command will be ignored.
• Power OFF/ON the LMX9838: The EEPROM initialization phase will be interrupted and the EEPROM will not
be recognized which leaves the device in a lockup situation.
• Issue a Hardware Reset: The EEPROM initialization phase will be interrupted and the EEPROM will not be
recognized which leaves the device in a lockup situation.
Once the initialization phase is completed the module sends the “SimplyBlue Ready Event” (refer to the
LMX9838 Software User's Guide, AN-1699 [SNOA498]) to declare its fully functional state.
It is therefore recommended to wait for the “SimplyBlue Ready Event” message before stating using the LM9838
by sending a command or issuing a Reset or Power On cycle.
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Power Up (continued)
Figure 14. LMX9838 Power-Up Sequence
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11 Regulatory Compliance
The LMX9838 has been tested and approved to be compliant to the following regulatory standards:
CE Compliance:
• EN 300 328 v1.8.1
• EN 301 489-17 v2.2.1
IC Compliance:
• IC-1520A-LMX9838
• RSS-GEN Issue 1
• RSS-210 Issue 7 Annex 8 and RSS-GEN issue 2
FCC Compliance:
• FCC ID: ED9LMX9838
• FCC Part 15 Subpart C
Japan MIC Compliance:
• Type Certification No. 007-AB0235
11.1 FCC Instructions
11.1.1 Safety Information For RF Exposure
11.1.1.1 FCC Radiation Exposure Statement:
This module may only be installed by the OEM or an OEM integrator. The antenna used for this transmitter must
not be co-located or operating in conjunction with any other antenna or transmitter. OEM integrators and Endusers and installers must be provided with antenna installation instructions and transmitter operating conditions
for satisfying RF exposure compliance.
Only the antenna filed under FCC ID: ED9LMX9838 can be used with this device.
11.1.1.2 End Product Labeling
FCC ID label on the final system must be labeled with “Contains TX FCC ID: ED9LMX9838 “or “Contains
transmitter module FCC ID: ED9LMX9838”.
IC label on the final system must be labeled with “Contains TX IC: 1520A-LMX9838” or “Contains transmitter
module IC: 1520A-LMX9838”.
11.1.1.3 End Product Manual Information
In the user manual, final system integrator must ensure that there is no instruction provided in the user manual to
install or remove the transmitter module.
LMX9838SB must be installed and used in strict accordance with the manufacturer’s instructions as described in
the user documentation that comes with the product.
The following information is required to be incorporated in the user manual of final system.
USA-Federal Communications Commission (FCC)
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part
15 of FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a
residential installation. This equipment generates, uses, and can radiate radio frequency energy. If not installed
and used in accordance with the instructions, it may cause harmful interference to radio communications.
However, there is no ensured specification that interference will not occur in a particular installation.
If this equipment does cause harmful interference to radio or television reception, which can be determined by
tuning the equipment off and on, the user is encouraged to try and correct the interference by one or more of the
following measures:
• Reorient or relocate the receiving antenna.
• Increase the distance between the equipment and the receiver.
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LMX9838
SNOSAZ9F – JULY 2007 – REVISED DECEMBER 2014
www.ti.com
FCC Instructions (continued)
•
•
Connect the equipment to outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
Any changes or modifications not expressly approved by the party responsible for compliance could void the
user’s authority to operate the equipment.
Caution: Exposure to Radio Frequency Radiation.
This device must not be co-located or operating in conjunction with any other antenna or transmitter.
Canada – Industry Canada (IC)
This device complies with RSS 210 of Industry Canada.
Operation is subject to the following two conditions:
(1) this device may not cause interference, and
(2) this device must accept any interference, including interference that may cause undesired operation of this
device.”
L ‘ utilisation de ce dispositif est autorisée seulement aux conditions suivantes :
(1) il ne doit pas produire d’interference et
(2) l’ utilisateur du dispositif doit étre pr?t ? accepter toute interference radioélectrique reçu, m?me si celle-ci est
susceptible de compromettre le fonctionnement du dispositif.
Caution: Exposure to Radio Frequency Radiation.
The installer of this radio equipment must ensure that the antenna is located or pointed such that it does not emit
RF field in excess of Health Canada limits for the general population; consult Safety Code 6, obtainable from
Health Canada’s website www.hc-sc.gc.ca/rpb.
36
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LMX9838
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SNOSAZ9F – JULY 2007 – REVISED DECEMBER 2014
FCC Instructions (continued)
UL
UL CERTIFICATE
UL UL UL for
ULTYPE
UL CERTIFICATION
UL UL UL UL
UL UL UL UL UL UL UL UL UL UL
Applicant
Texas Instruments Inc.
UL UL UL UL UL UL UL UL UL UL
Address and representative
Category of specific radio equipment
12500 TI Blvd., Dallas, TX-75243, USA
Mr. Richard Templeton
Radio equipment for Article 2-1-19 of Certification
Ordinance
UL UL UL UL UL UL UL UL UL UL
Manufacturer
Model or Product Name
Texas Instruments Inc.
Bluetooth 2.0 Module: Model:LMX9838
UL UL UL UL UL UL UL UL UL UL
Type of radio wave, frequency
and antenna power
Type Certification No.
FID 2402 MHz~2480 MHz (1 MHz Interval, 79 Channels)
0.000018 W/MHz~0.000063 W/MHz
007-AB0235
UL UL UL UL UL UL UL UL UL UL
Date of Certification
November 6, 2013
UL Japan, Inc. hereby declares that this equipment is certified for type certification pursuant to Article
38-24-1 of the Radio Law (Law No. 131 of 1950).
UL UL UL UL UL UL UL UL UL UL
UL UL UL UL UL UL UL UL UL UL
UL UL UL UL UL UL UL UL UL UL
UL UL UL UL UL UL UL UL UL UL
UL Japan, Inc.
Verification Service
WiSE(Wireless - interoperability - Security - EMC)
Radio Certification Section
4383-326 Asama-cho, Ise-shi, Mie-ken, 516-0021 Japan
TEL: +81-596-24-8116 FAX: +81-596-8095
UL UL UL UL UL UL UL UL UL UL
UL UL UL UL UL UL UL UL UL UL
Note 1: Whenever there has been a change in the information mentioned in Item (1) of Paragraph 4 of Article 17 of ordinance
concerning technical regulations conformity certification etc of specified radio equipment, a certified dealer shall
submit without delay to the Minister of Internal Affairs and Communications under Paragraph 5 and 6 of Article 17 of ordinance
concerning technical regulations conformity certification etc of specified radio equipment.
UL UL UL UL UL UL UL UL UL UL
Note2: A certified dealer shall conduct an examination on specified radio equipment and maintain the examination records as
Specified by Paragraph 2 of Article 38-25 of Japanese Radio Law.
00183
1/1
Figure 15.
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12 Device and Documentation Support
12.1 Device Support
LMX9838DONGLE Evaluation Module http://www.ti.com/tool/lmx9838dongle
12.2 Documentation Support
12.2.1 Related Documentation
Application Notes, Software, and Tools http://www.ti.com/tool/lmx9838-sw
LMX9838 Software User’s Guide, SNOA498
12.3 Trademarks
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
38
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Product Folder Links: LMX9838
PACKAGE OPTION ADDENDUM
www.ti.com
3-May-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LMX9838SB/NOPB
NRND
PLGA
NAW
70
Green (RoHS
& no Sb/Br)
Call TI
Level-4-250C-72 HR
-40 to 85
LMX9838SB
FCC ID: ED9LMX9838
IC: 1520A-LMX9838
LMX9838SBX/NOPB
NRND
PLGA
NAW
70
Green (RoHS
& no Sb/Br)
Call TI
Level-4-250C-72 HR
-40 to 85
LMX9838SB
FCC ID: ED9LMX9838
IC: 1520A-LMX9838
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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