REF102

REF102 REF 102 REF 102 SBVS022A – SEPTEMBER 2000 – REVISED NOVEMBER 2003 10V Precision Voltage Reference FEATURES q +10V ±0.0025V OUTPUT q VERY LOW DRIFT: 2.5ppm/°C max q EXCELLENT STABILITY: 5ppm/1000hr typ q EXCELLENT LINE REGULATION: 1ppm/V max q EXCELLENT LOAD REGULATION: 10ppm/mA max q LOW NOISE: 5µVPP typ, 0.1Hz to 10Hz q WIDE SUPPLY RANGE: 11.4VDC to 36VDC q LOW QUIESCENT CURRENT: 1.4mA max q PACKAGE OPTIONS: PLASTIC DIP, SO-8 APPLICATIONS q PRECISION-CALIBRATED VOLTAGE STANDARD q D/A AND A/D CONVERTER REFERENCE q PRECISION CURRENT REFERENCE q ACCURATE COMPARATOR THRESHOLD REFERENCE q DIGITAL VOLTMETERS q TEST EQUIPMENT q PC-BASED INSTRUMENTATION DESCRIPTION The REF102 is a precision 10V voltage reference. The drift is laser-trimmed to 2.5ppm/°C max C-grade over the industrial temperature range. The REF102 achieves its precision without a heater. This results in low power, fast warm-up, excellent stability, and low noise. The output voltage is extremely insensitive to both line and load variations and can be externally adjusted with minimal effect on drift and stability. Single supply operation from 11.4V to 36V and excellent overall specifications make the REF102 an ideal choice for demanding instrumentation and system reference applications. R5 Trim 5 V+ 2 50kΩ R2 14kΩ R3 8kΩ – R1 22kΩ A1 + 6 VOUT R6 7kΩ R4 4kΩ DZ1 8 4 Noise Common Reduction Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000-2003, Texas Instruments Incorporated www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Input Voltage ...................................................................................... +40V Operating Temperature P, U ................................................................................. –25°C to +85°C Storage Temperature Range P, U ............................................................................... –40°C to +125°C Lead Temperature (soldering, 10s) ............................................... +300°C (SO, 3s) ........................................................... +260°C Short-Circuit Protection to Common or V+ .............................. Continuous NOTE: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) MAX INITIAL ERROR (mV) ±10 ±10 ±10 ±5 ±5 ±5 ±2.5 ±2.5 ±2.5 MAX DRIFT (PPM/°C) ±10 ±10 ±10 ±5 ±5 ±5 ±2.5 ±2.5 ±2.5 PACKAGE DESIGNATOR D D P D D P D D P SPECIFIED TEMPERATURE RANGE –25°C to +85°C " " " " " " " " PACKAGE MARKING REF102AU REF102AU/2K5 REF102AP REF102BU REF102BU/2K5 REF102BP REF102CU REF102CU/2K5 REF102CP ORDERING NUMBER REF102AU REF102AU/2K5 REF102AP REF102BU REF102BU/2K5 REF102BP REF102CU REF102CU/2K5 REF102CP TRANSPORT MEDIA, QUANTITY Tube, 100 Tape and Reel, 2500 Tube, 50 Tube, 100 Tape and Reel, 2500 Tube, 50 Tube, 100 Tape and Reel, 2500 Tube, 50 PRODUCT REF102AU " REF102AP REF102BU " REF102BP REF102CU " REF102CP PACKAGE-LEAD SO-8 SO-8 DIP-8 SO-8 SO-8 DIP-8 SO-8 SO-8 DIP-8 NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN CONFIGURATIONS Top View DIP, SO NC V+ NC 1 2 3 8 7 6 5 Noise Reduction NC VOUT Trim Com 4 NC = Not Connected 2 REF102 www.ti.com SBVS022A ELECTRICAL CHARACTERISTICS At TA = +25°C and VS = +15V power supply, unless otherwise noted. REF102A PARAMETER OUTPUT VOLTAGE Initial vs Temperature (1) vs Supply (Line Regulation) vs Output Current (Load Regulation) vs Time M Package P, U Packages (2) Trim Range (3) Capacitive Load, max NOISE OUTPUT CURRENT INPUT VOLTAGE RANGE QUIESCENT CURRENT WARM-UP TIME (4) TEMPERATURE RANGE Specification REF102A, B, C ✻ Specifications same as REF102A. NOTES: (1) The “box” method is used to specify output voltage drift vs temperature. See the Discussion of Performance section. (2) Typically 5ppm/1000hrs after 168hr powered stabilization. (3) Trimming the offset voltage affects drift slightly. See Installation and Operating Instructions for details. (4) With noise reduction pin floating. See Typical Characteristics for details. IOUT = 0 To 0.1% 15 CONDITIONS TA = 25°C MIN 9.99 TYP MAX 10.01 10 2 20 40 5 20 ±3 1000 0.1Hz to 10Hz +10, –5 +11.4 +36 +1.4 ✻ 5 ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ ✻ MIN 9.995 REF102B TYP MAX 10.005 5 1 10 20 ✻ MIN 9.9975 REF102C TYP MAX 10.0025 2.5 1 10 20 UNITS V ppm/°C ppm/V ppm/mA ppm/mA ppm/1000hr ppm/1000hr % pF µVPP mA V mA µs VS = 11.4V to 36V IL = 0mA to +10mA IL = 0mA to –5mA TA = +25°C –25 +85 ✻ ✻ ✻ ✻ °C REF102 SBVS022A www.ti.com 3 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +15V, unless otherwise noted. POWER TURN-ON RESPONSE POWER TURN-ON RESPONSE with 1µF CN VOUT VOUT VIN VIN Time (5µs/div) Power Turn-On Time (10ms/div) Power Turn-On POWER SUPPLY REJECTION vs FREQUENCY 130 +1.5 LOAD REGULATION Power Supply Rejection (dB) 110 100 90 80 70 60 1 100 Frequency (Hz) 1k 10k Output Voltage Change (mV) 120 +1.0 +0.5 0 −0.5 −1.0 −1.5 –5 0 +5 +10 Output Current (mA) RESPONSE TO THERMAL SHOCK +600 1.6 QUIESCENT CURRENT vs TEMPERATURE Output Voltage Change (µV) +300 Quiescent Current (mA) 1.4 0 1.2 –300 TA = +25°C –600 0 REF102C Immersed in +85°C Fluorinert Bath TA = +85°C 1.0 0.8 15 30 Time (s) 45 60 −75 −50 −25 0 +25 +50 +75 +100 +125 Temperature (°C) 4 REF102 www.ti.com SBVS022A TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +15V, unless otherwise noted. TYPICAL REF102 REFERENCE NOISE 20Ω 6 2kΩ Oscilloscope Noise Voltage (µV) 4 – 2 0 −2 −4 −6 Low Frequency Noise (1s/div) (See Noise Test Circuit) 100µF DUT 15.8kΩ 8kΩ 2µF OPA227 + Gain = 100V/V f −3dB = 0.1Hz and 10Hz Noise Test Circuit. THEORY OF OPERATION Refer to the diagram on the first page of this data sheet. The 10V output is derived from a compensated buried zener diode DZ1, op amp A1, and resistor network R1 – R6. Approximately 8.2V is applied to the non-inverting input of A1 by DZ1. R1, R2, and R3 are laser-trimmed to produce an exact 10V output. The zener bias current is established from the regulated output voltage through R4. R5 allows user-trimming of the output voltage by providing for small external adjustment of the amplifier gain. Because the temperature coefficient (TCR) of of R5 closely matches the TCR of R1, R2 and R3 , the voltage trim has minimal effect on the reference drift. The output voltage noise of the REF102 is dominated by the noise of the zener diode. A capacitor can be connected between the Noise Reduction pin and ground to form a lowpass filter with R6 and roll off the high-frequency noise of the zener. REF102 is specified by the more commonly-used “box method.” The “box” is formed by the high and low specification temperatures and a diagonal, the slope of which is equal to the maximum specified drift. Since the shape of the actual drift curve is not known, the vertical position of the box is not known, either. It is, however, bounded by VUPPER BOUND and VLOWER BOUND (see Figure 1). Figure 1 uses the REF102CU as an example. It has a drift specification of 2.5ppm/°C maximum and a specification temperature range of –25°C to +85°C. The “box” height, V1 to V2, is 2.75mV. REF102CU VUPPER BOUND +10.00275 Output Voltage (V) V1 VNOMINAL +10.0000 V2 +9.99725 REF102CU VLOWER BOUND DISCUSSION OF PERFORMANCE The REF102 is designed for applications requiring a precision voltage reference where both the initial value at room temperature and the drift over temperature are of importance to the user. Two basic methods of specifying voltage reference drift versus temperature are in common usage in the industry—the “butterfly method” and the “box method.” The 2.75mV Worst-case ∆VOUT for REF102CU −25 0 +25 +50 Temperature (°C) +85 FIGURE 1. REF102CU Output Voltage Drift. REF102 SBVS022A www.ti.com 5 INSTALLATION AND OPERATING INSTRUCTIONS BASIC CIRCUIT CONNECTION Figure 2 shows the proper connection of the REF102. To achieve the specified performance, pay careful attention to layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected as indicated, being sure to minimize interconnection resistances. used. The circuit in Figure 3 has a minimum trim range of ±300mV. The circuit in Figure 4 has less range but provides higher resolution. The mismatch in TCR between RS and the internal resistors can introduce some slight drift. This effect is minimized if RS is kept significantly larger than the 50kΩ internal resistor. A TCR of 100ppm/°C is normally sufficient. V+ + 1µF Tantalum VOUT 6 2 (1) 2 V+ + 1µF Tantalum 6 (2) REF102 VTRIM 5 REF102 RL 1 RL 2 RL 3 20k Ω Output Voltage Adjust +10V 4 Minimum range (±300mV) and minimal degradation of drift. 4 (1) (2) FIGURE 3. REF102 Optional Output Voltage Adjust. NOTES: (1) Lead resistances here of up to a few ohms have negligible effect on performance. (2) A resistance of 0.1Ω in series with these leads will cause a 1mV error when the load current is at its maximum of 10mA. This results in a 0.01% error of 10V. V+ + 1µF Tantalum VOUT 6 REF102 VTRIM 5 RS 1M Ω 4 20k Ω Output Voltage Adjust +10V 2 FIGURE 2. REF102 Installation. OPTIONAL OUTPUT VOLTAGE ADJUSTMENT Optional output voltage adjustment circuits are shown in Figures 3 and 4. Trimming the output voltage will change the voltage drift by approximately 0.008ppm/°C per mV of trimmed voltage. In the circuit in Figure 3, any mismatch in TCR between the two sections of the potentiometer will also affect drift, but the effect of the ∆TCR is reduced by a factor of five by the internal resistor divider. A high quality potentiometer, with good mechanical stability, such as a cermet, should be Higher resolution, reduced range (typically ±25mV). FIGURE 4. REF102 Optional Output Voltage, Fine Adjust. 6 REF102 www.ti.com SBVS022A OPTIONAL NOISE REDUCTION The high-frequency noise of the REF102 is dominated by the zener diode noise. This noise can be greatly reduced by connecting a capacitor between the Noise Reduction pin and ground. The capacitor forms a low-pass filter with R6 (refer to the figure on page 1) and attenuates the high-frequency noise generated by the zener. Figure 5 shows the effect of a 1µF noise reduction capacitor on the high-frequency noise of the REF102. R6 is typically 7kΩ so the filter has a –3dB frequency of about 22Hz. The result is a reduction in noise from about 800µVPP to under 200µVPP. If further noise reduction is required, use the circuit in Figure 14. APPLICATIONS INFORMATION High accuracy, extremely low drift, outstanding stability, and low cost make the REF102 an ideal choice for all instrumentation and system reference applications. Figures 6 through 14 show a variety of useful application circuits. V+ (1.4V to 26V) 2 REF102 6 1.4mA < (5V −IL) RS < 5.4mA 4 RS IL −10V Out NO CN −15V a) Resistor Biased –10V Reference V+ (1.4V to 26V) 2 R1 2kΩ C1 1000pF 4 −10V Out REF102 6 10V CN = 1µF OPA227 FIGURE 5. Effect of 1µF Noise Reduction Capacitor on Broadband Noise (f–3dB = 1MHz) b) Precision –10V Reference. See SBVA008 for more detail. FIGURE 6. –10V Reference Using a) Resistor or b) OPA227. REF102 SBVS022A www.ti.com 7 V+ 2 – V+ V+ 220Ω +10V IL REF102 6 OPA227 + 2N2905 2 2 R1 = VCC − 10V IL (TYP) 6 REF102 6 IL +10V IL 4 +10V REF102 a) −20mA < IL < +20mA (OPA227 also improves transient immunity) 4 b) −5mA < IL < +100mA 4 c) IL (MAX) = IL (TYP) +10mA IL (MIN) = IL (TYP) −5mA FIGURE 7. +10V Reference With Output Current Boosted to: a) ±20mA, b) +100mA, and c) IL (TYP) +10mA, –5A. +15V 28mA 2 6 357Ω 1/2W 28.5mA +5V 350 Ω Strain Gauge Bridge REF102 5 4 RG – 6 OPA227 + 3 −5V – INA126 8 2 10 V OUT x100 + 357Ω 1/2W –15V FIGURE 8. Strain Gauge Conditioner for 350Ω Bridge. V+ 2 V+ 2 6 REF102 2 25kΩ 4 3 1 25kΩ 25kΩ INA105 25kΩ 6 5 +10V Out −10V Out REF102 6 R 4 – I OUT LOAD Can be connected to ground or −VS . OPA277 + IOUT = 10V , R ≥ 1kΩ R See SBVA007 for more details. See SBVA001 for more details and ISINK Circuit. FIGURE 9. ±10V Reference. FIGURE 10. Positive Precision Current Source. 8 REF102 www.ti.com SBVS022A 31.4V to 56V 2 V+ 2 REF102 6 +30V 6 REF102 +10V INA105 2 5 4 2 4 REF102 6 +20V – 6 3 + +5V 4 2 1 +10V REF102 6 FIGURE 13. +5V and +10V Reference. 4 V+ NOTES: (1) REF102s can be stacked to obtain voltages in multiples of 10V. (2) The supply voltage should be between 10n + 1.4 and 10n + 26, where n is the number of REF102s. (3) Output current of each REF102 must not exceed its rated output current of +10, −5mA. This includes the current delivered to the lower REF102. 2 2kΩ 6 REF102 (1) VOUT 1 FIGURE 11. Stacked References. 4 R2 2kΩ C2 V+ V+ 2 2 2kΩ 1µF 2– 6 OPA227 3+ R1 1k Ω 6 REF102 2 INA105 5 4 +5V Out REF102 (2) VOUT 2 +10V 1µF VREF C1 4 –5V Out V+ 2 VREF = (V01 + V02 … VOUT N) N – 6 + REF102 (N) 6 VOUT N 2kΩ eN = 5µVPP (f = 0.1Hz to 1MHz) √N See SBVA002 for more details. 1 3 4 FIGURE 12. ±5V Reference. FIGURE 14. Precision Voltage Reference with Extremely Low Noise. REF102 SBVS022A www.ti.com 9 PACKAGE OPTION ADDENDUM www.ti.com 6-Apr-2007 PACKAGING INFORMATION Orderable Device REF102AM REF102AP REF102APG4 REF102AU REF102AU/2K5 REF102AU/2K5G4 REF102AUG4 REF102BM REF102BP REF102BPG4 REF102BU REF102BUG4 REF102CM REF102CP REF102CPG4 REF102CU REF102CUG4 REF102RM REF102SM (1) Status (1) OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE OBSOLETE Package Type TO-99 PDIP PDIP SOIC SOIC SOIC SOIC TO-99 PDIP PDIP SOIC SOIC TO-99 PDIP PDIP SOIC SOIC TO-99 TO-99 Package Drawing LMC P P D D D D LMC P P D D LMC P P D D LMC LMC Pins Package Eco Plan (2) Qty 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 50 50 100 100 50 50 100 100 50 50 100 TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI MSL Peak Temp (3) Call TI N / A for Pkg Type N / A for Pkg Type Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Level-2-260C-1 YEAR Call TI N / A for Pkg Type N / A for Pkg Type Level-2-260C-1 YEAR Level-2-260C-1 YEAR Call TI N / A for Pkg Type N / A for Pkg Type Level-2-260C-1 YEAR Level-2-260C-1 YEAR Call TI Call TI 2500 Green (RoHS & no Sb/Br) 2500 Green (RoHS & no Sb/Br) 100 Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD TBD The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 6-Apr-2007 retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MMBC008 – MARCH 2001 LMC (O–MBCY–W8) METAL CYLINDRICAL ø ø 0.370 (9,40) 0.335 (8,51) 0.335 (8,51) 0.305 (7,75) 0.040 (1,02) 0.010 (0,25) 0.185 (4,70) 0.165 (4,19) 0.040 (1,02) MAX 0.500 (12,70) MIN Seating Plane ø 0.021 (0,53) 0.016 (0,41) 0.105 (2,67) 0.095 (2,41) 0.160 (4,06) ø 0.140 (3,56) 3 2 1 4 5 8 6 7 0.105 (2,67) 0.095 (2,41) 0.200 (5,08) 0.034 (0,86) 0.028 (0,71) 45° 0.045 (1,14) 0.029 (0,74) 4202483/A 03/01 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Leads in true position within 0.010 (0,25) R @ MMC at seating plane. Pin numbers shown for reference only. Numbers may not be marked on package. Falls within JEDEC MO-002/TO-99. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 MECHANICAL DATA MPDI001A – JANUARY 1995 – REVISED JUNE 1999 P (R-PDIP-T8) 0.400 (10,60) 0.355 (9,02) 8 5 PLASTIC DUAL-IN-LINE 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.325 (8,26) 0.300 (7,62) 0.015 (0,38) 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.010 (0,25) NOM Gage Plane 0.020 (0,51) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0.010 (0,25) M 0.430 (10,92) MAX 4040082/D 05/98 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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