SN74CB3Q16211GQLR

SN74CB3Q16211 SCDS167A – MAY 2004 – REVISED JULY 2022 SN74CB3Q16211 24-Bit Switch 2.5-V/3.3-V Low-Voltage FET Bus Switch 1 Features 2 Applications • • • • • • • • • • • • • • • • • • • • • • Member of the Texas Instruments Widebus® family High-bandwidth data path (up to 500 MHz(1)) 5-V tolerant I/Os with device powered up or powered down Low and flat ON-state resistance (ron) characteristics over operating range (ron = 5 Ω typical) Rail-to-rail switching on data I/O ports – 0-V to 5-V switching with 3.3-V VCC – 0-V to 3.3-V switching with 2.5-V VCC Bidirectional data flow, with near-zero propagation delay Low input or output capacitance minimizes loading and signal distortion (Cio(OFF) = 4 pF typical) Fast switching frequency (fOE = 20 MHz maximum) Data and control inputs provide undershoot clamp diodes Low power consumption (ICC = 1 mA typical) VCC operating range from 2.3 V to 3.6 V Data I/Os support 0-V to 5-V signaling levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, and 5 V) Control inputs can be driven by TTL or 5-V/3.3-V CMOS outputs Ioff supports partial-power-down mode operation Latch-up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) Supports both digital and analog applications: PCI interface, differential signal interface, memory interleaving, bus isolation, low-distortion signal gating 1 AV receiver Blu-ray recorder and player Embedded PC Portable audio dock DLP front projection system 3 Description The SN74CB3Q16211 device is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q16211 device provides an optimized interface solution ideally suited for broadband communications, networking, and dataintensive computing systems. Device Information(1) PART NUMBER PACKAGE BODY SIZE TSSOP (56) 14.00 mm × 6.10 mm TVSOP (56) 11.30 mm × 4.40 mm SSOP (56) 18.40 mm × 7.49 mm BGA MICROSTAR JUNIOR (56) 7.00 mm × 4.50 mm SN74CB3Q16211 (1) For all available packages, see the orderable addendum at the end of the data sheet. 54 2 1A1 1B1 SW 42 14 1A12 1B12 SW 56 1OE A B VCC 41 15 2A1 Charge Pump 2B1 SW 29 28 2A12 SW 2B12 55 2OE EN† † EN is the internal enable signal applied to the switch. Simplified Schematic, Each FET Switch (SW) 1 Terminal numbers shown are for the DGG, DGV, and DL packages. Logic Diagram (Positive Logic) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Description (continued).................................................. 2 6 Pin Configuration and Functions...................................3 7 Specifications.................................................................. 4 7.1 Absolute Maximum Ratings........................................ 4 7.2 Handling Ratings.........................................................4 7.3 Recommended Operating Conditions.........................4 7.4 Electrical Characteristics.............................................5 7.5 Switching Characteristics............................................5 7.6 Typical Characteristics................................................ 6 8 Parameter Measurement Information............................ 7 9 Device and Documentation Support..............................8 9.1 Documentation Support.............................................. 8 9.2 Receiving Notification of Documentation Updates......8 9.3 Support Resources..................................................... 8 9.4 Trademarks................................................................. 8 9.5 Electrostatic Discharge Caution..................................8 9.6 Glossary......................................................................8 10 Mechanical, Packaging, and Orderable Information...................................................................... 8 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision * (May 2004) to Revision A (July 2022) Page • Updated document to new TI data sheet format - no specification changes...................................................... 1 • Removed Ordering Information table..................................................................................................................1 • Added Applications............................................................................................................................................. 1 • Added Device Information table..........................................................................................................................1 • Updated the numbering format for tables, figures, and cross-references throughout the document..................1 • Changed the BGA package from: GQL to: ZQL in the Pin Configuration and Functions section.......................3 • Moved Tstg to Handling Ratings table................................................................................................................. 4 • Added Mechanical, Packaging, and Orderable Information section................................................................... 8 5 Description (continued) The SN74CB3Q16211 device is organized as two 12-bit bus switches with separate output-enable (1 OE, 2 OE) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE is low, the associated 12-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Table 5-1. Function Table (Each 12-Bit Bus Switch) 2 INPUT OE INPUT/OUTPUT A FUNCTION L B A port = B port H Z Disconnect Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 6 Pin Configuration and Functions NC 1A1 1A2 1A3 1A4 1A5 1A6 GND 1A7 1A8 1A9 1A10 1A11 1A12 2A1 2A2 VCC 2A3 GND 2A4 2A5 2A6 2A7 2A8 2A9 2A10 2A11 2A12 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 1OE 2OE 1B1 1B2 1B3 1B4 1B5 GND 1B6 1B7 1B8 1B9 1B10 1B11 1B12 2B1 2B2 2B3 GND 2B4 2B5 2B6 2B7 2B8 2B9 2B10 2B11 2B12 Figure 6-1. DGG, DGV, or DL Package, 56-Pin TSSOP and TVSOP (Top View) 1 2 3 4 5 6 A B C D 1 2 3 4 5 6 A 1A2 1A1 NC 1OE 2OE 1B1 B 1A5 1A4 1A3 1B2 1B3 1B4 C 1A7 GND 1A6 1B5 GND 1B6 D 1A10 1A8 1A9 1B8 1B7 1B9 E 1A12 1A11 1B10 1B11 F 2A1 2A2 2B1 1B12 G GND 2A3 2B3 GND 2B2 2A5 2A6 2B6 2B5 2B4 E H VCC 2A4 F J 2A7 2A8 2A9 2B9 2B8 2B7 K 2A10 2A11 2A12 2B12 2B11 2B10 G NC − No internal connection Figure 6-3. Functions Table H J K Figure 6-2. ZQL Package, 56-Pin BGA (Top View) Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 3 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)(1) MIN MAX –0.5 4.6 V VIN Control input voltage range(2) (3) –0.5 7 V VI/O Switch I/O voltage range(2) (3) (4) –0.5 7 V IIK Control input clamp current VIN < 0 –50 mA II/OK I/O port clamp current VI/O < 0 –50 mA ±64 mA ±100 mA VCC II/O Supply voltage range(2) ON-state switch current(5) Continuous current through VCC or GND terminals θJA (1) (2) (3) (4) (5) (6) Package thermal impedance(6) DGG package 64 DGV package 48 DL package 56 GQL package 42 UNIT °C/W Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions for II/O. The package thermal impedance is calculated in accordance with JESD 51-7. 7.2 Handling Ratings PARAMETER Tstg DEFINITION Storage temperature range MIN MAX UNIT –65 150 °C 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted)(1) VCC Supply voltage VIH High-level control input voltage VIL Low-level control input voltage VI/O Data input/output voltage TA Operating free-air temperature (1) 4 MIN MAX 2.3 3.6 UNIT VCC = 2.3 V to 2.7 V 1.7 5.5 VCC = 2.7 V to 3.6 V 2 5.5 VCC = 2.3 V to 2.7 V 0 0.7 VCC = 2.7 V to 3.6 V 0 0.8 0 5.5 V –40 85 °C V V V All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 7.4 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted)(1) PARAMETER VIK VCC = 3.6 V, IIN MIN TYP(2) TEST CONDITIONS MAX II = –18 mA Control inputs VCC = 3.6 V, VIN = 0 to 5.5 V IOZ (3) VCC = 3.6 V, VO = 0 to 5.5 V, VI = 0 Switch OFF, VIN = VCC or GND Ioff VCC = 0, VO = 0 to 5.5 V, VI = 0 ICC VCC = 3.6 V, II/O = 0, Switch ON or OFF, VIN = VCC or GND Other inputs at VCC or GND ∆ICC (4) Control inputs VCC = 3.6 V, One input at 3 V, ICCD (5) Per control input A and B ports open, Control input switching at 50% duty cycle Cin Control inputs VCC = 3.3 V, VCC = 3.6 V, 1 UNIT –1.8 V ±1 µA ±1 µA 1 µA 3 mA 30 VIN = 5.5 V, 3.3 V, or 0 µA mA/ MHz 0.15 0.25 3.5 5 pF Cio(OFF) VCC = 3.3 V, VIN = VCC or GND, Switch OFF, VI/O = 5.5 V, 3.3 V, or 0 4 5 pF Cio(ON) VCC = 3.3 V, VIN = VCC or GND, Switch ON, VI/O = 5.5 V, 3.3 V, or 0 10 12.5 pF VCC = 2.3 V, TYP at VCC = 2.5 V VI = 0, IO = 30 mA 5 8 VI = 1.7 V, IO = –15 mA 5 9 VI = 0, IO = 30 mA 5 6.5 VI = 2.4 V, IO = –15 mA 5 8 ron (6) VCC = 3 V (1) (2) (3) (4) (5) (6) Ω VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. This parameter specifies the dynamic power-supply current associated with the operating frequency of a single control input (see Figure 7-2). Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. 7.5 Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 8-1) PARAMETER (1) (2) VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V FROM (INPUT) TO (OUTPUT) fOE (1) OE A or B 10 20 tpd (2) A or B B or A 0.15 0.25 ns ten OE A or B 1.5 8 1.5 8 ns tdis OE A or B 1 7.5 1 7.5 ns MIN MAX MIN MAX UNIT MHz Maximum switching frequency for control input (VO > VCC, VI = 5 V, RL ≥ 1 MΩ, CL = 0). The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 5 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 7.6 Typical Characteristics ron − ON−State Resistance − Ω 16 VCC = 3.3 V TA = 25°C IO = −15 mA 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VI − V Figure 7-1. Typical ron vs VI 12 VCC = 3.3 V TA = 25°C A and B Ports Open 10 ICC − mA 8 One OE Switching 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 OE Switching Frequency − MHz Figure 7-2. Typical ICC vs OE Switching Frequency 6 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 8 Parameter Measurement Information VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT Input Generator VI S1 RL VO 50 Ω CL (see Note A) RL TEST VCC S1 RL VI CL tpd(s) 2.5 V ± 0.2 V 3.3 V ± 0.3 V Open Open 500 Ω 500 Ω VCC or GND VCC or GND 30 pF 50 pF tPLZ/tPZL 2.5 V ± 0.2 V 3.3 V ± 0.3 V 2 × VCC 2 × VCC 500 Ω 500 Ω GND GND 30 pF 50 pF 0.15 V 0.3 V tPHZ/tPZH 2.5 V ± 0.2 V 3.3 V ± 0.3 V GND GND 500 Ω 500 Ω VCC VCC 30 pF 50 pF 0.15 V 0.3 V V∆ VCC Output Control (VIN) VCC/2 VCC/2 0V tPLZ tPZL VCC VCC/2 VCC/2 0V tPLH VCC/2 Output Waveform 1 S1 at 2 × VCC (see Note B) VCC VCC/2 VCC/2 VOL Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES (tpd(s)) VOL + V∆ VOL tPHZ tPZH tPHL VOH Output Open GND 50 Ω VG2 Output Control (VIN) 2 × VCC VCC/2 VOH – V∆ VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. t PZL and tPZH are the same as ten. G. tPLH and t PHLare the same as t pd(s). The t pd propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). H. All parameters and waveforms are not applicable to all devices. Figure 8-1. Test Circuit and Voltage Waveforms Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 7 SN74CB3Q16211 www.ti.com SCDS167A – MAY 2004 – REVISED JULY 2022 9 Device and Documentation Support 9.1 Documentation Support 9.1.1 Related Documentation For related documentation, see the following: • Texas Instruments, CBT-C, CB3T, and CB3Q Signal-Switch Families application report 9.2 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 9.3 Support Resources TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 9.4 Trademarks TI E2E™ is a trademark of Texas Instruments. Widebus® is a registered trademark of Texas Instruments. All trademarks are the property of their respective owners. 9.5 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 9.6 Glossary TI Glossary This glossary lists and explains terms, acronyms, and definitions. 10 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser based versions of this data sheet, refer to the left hand navigation. 8 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: SN74CB3Q16211 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74CB3Q16211DGGR ACTIVE TSSOP DGG 56 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CB3Q16211 SN74CB3Q16211DGVR ACTIVE TVSOP DGV 56 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 BW211 SN74CB3Q16211DL ACTIVE SSOP DL 56 20 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CB3Q16211 SN74CB3Q16211DLR ACTIVE SSOP DL 56 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CB3Q16211 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of