SN74CBT16245
16-BIT FET BUS SWITCH
SCDS070C – JULY 1998 – REVISED OCTOBER 2000
D
D
D
D
D
D
Member of Texas Instruments’ Widebus
Family
Standard ’16245-Type Pinout
5-Ω Switch Connection Between Two Ports
TTL-Compatible Input Levels
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
NC
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
NC
description
The SN74CBT16245 device provides 16 bits of
high-speed TTL-compatible bus switching in a
standard ’16245 device pinout. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
The device is organized as two 8-bit low-impedance
switches with separate output-enable (OE) inputs.
When OE is low, the switch is on, and data can
flow from the A port to the B port, or vice versa.
When OE is high, the switch is open, and the
high-impedance state exists between the two
ports.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
NC – No internal connection
ORDERING INFORMATION
TOP-SIDE
MARKING
Tube
SN74CBT16245DL
Tape and reel
SN74CBT16245DLR
TSSOP – DGG
Tape and reel
SN74CBT16245DGGR
TVSOP – DGV
Tape and reel
SN74CBT16245DGVR
SSOP – DL
–40°C
40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
CBT16245
CBT16245
CY245
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each 8-bit bus switch)
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74CBT16245
16-BIT FET BUS SWITCH
SCDS070C – JULY 1998 – REVISED OCTOBER 2000
logic diagram (positive logic)
1A1
47
2
37
12
1A8
1B1
1B8
48
1OE
2A1
36
13
26
23
2A8
2B1
2B8
25
2OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
DL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN
MAX
VCC
VIH
Supply voltage
4
5.5
High-level control input voltage
2
VIL
TA
Low-level control input voltage
Operating free-air temperature
–40
UNIT
V
V
0.8
V
85
°C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74CBT16245
16-BIT FET BUS SWITCH
SCDS070C – JULY 1998 – REVISED OCTOBER 2000
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
II
ICC
∆ICC‡
Control inputs
Ci
Control inputs
Cio(OFF)
TEST CONDITIONS
VCC = 4.5 V,
VCC = 0,
II = –18 mA
VI = 5.5 V
VCC = 5.5 V,
VCC = 5.5 V,
VI = 5.5 V or GND
IO = 0,
VCC = 5.5 V,
VI = 3 V or 0
One input at 3.4 V,
VO = 3 V or 0,
VCC = 4 V,
TYP at VCC = 4 V
OE = VCC
ron§
VCC = 4.5 V
MIN
TYP†
MAX
UNIT
–1.2
V
10
±1
VI = VCC or GND
Other inputs at VCC or GND
µA
3
µA
2.5
mA
3.5
pF
4.5
pF
VI = 2.4 V,
II = 15 mA
14
20
VI = 0
II = 64 mA
II = 30 mA
5
7
5
7
Ω
VI = 2.4 V,
II = 15 mA
8
12
† All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C.
‡ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER
tpd¶
ten
VCC = 4 V
VCC = 5 V
± 0.5 V
MIN
MIN
FROM
(INPUT)
TO
(OUTPUT)
A or B
B or A
0.35
OE
A or B
6.1
MAX
1.2
UNIT
MAX
0.25
ns
5.6
ns
tdis
A or B
7.5
3.9
7.7
ns
OE
¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when
driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SN74CBT16245
16-BIT FET BUS SWITCH
SCDS070C – JULY 1998 – REVISED OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
TEST
S1
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
7V
S1
500 Ω
From Output
Under Test
Open
GND
CL = 50 pF
(see Note A)
500 Ω
3V
Output
Control
LOAD CIRCUIT
1.5 V
1.5 V
0V
tPLZ
tPZL
3V
Input
1.5 V
1.5 V
0V
tPLH
1.5 V
3.5 V
1.5 V
1.5 V
VOL
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOL + 0.3 V
VOL
tPHZ
tPZH
tPHL
VOH
Output
Output
Waveform 1
S1 at 7 V
(see Note B)
1.5 V
VOH
VOH – 0.3 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74CBT16245DGGR
ACTIVE
TSSOP
DGG
48
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16245
Samples
SN74CBT16245DGVR
ACTIVE
TVSOP
DGV
48
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CY245
Samples
SN74CBT16245DL
ACTIVE
SSOP
DL
48
25
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16245
Samples
SN74CBT16245DLR
ACTIVE
SSOP
DL
48
1000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
CBT16245
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of