SN74CBT6800ADGVR

SN74CBT6800A 10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS SCDS005N – MARCH 1993 – REVISED MARCH 2001 D D D DB, DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW) 5-Ω Switch Connection Between Two Ports TTL-Compatible Input Levels Outputs Are Precharged by Bias Voltage to Minimize Signal Distortion During Live Insertion ON A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND description The SN74CBT6800A provides ten bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switch allows bidirectional connections to be made while adding near-zero propagation delay. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise. 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 BIASV The SN74CBT6800A is organized as one 10-bit switch with a single enable (ON) input. When ON is low, the switch is on, and port A is connected to port B. When ON is high, the switch between port A and port B is open. When ON is high or VCC is 0 V, B port is precharged to BIASV through the equivalent of a 10-kΩ resistor. ORDERING INFORMATION TOP-SIDE MARKING Tube SN74CBT6800ADW Tape and reel SN74CBT6800ADWR SSOP – DB Tape and reel SN74CBT6800ADBR CT6800A SSOP (QSOP) – DBQ Tape and reel SN74CBT6800ADBQR CBT6800A TSSOP – PW Tape and reel SN74CBT6800APWR CT6800A SOIC – DW –40°C 40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA CBT6800A TVSOP – DGV Tape and reel SN74CBT6800ADGVR CT6800A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUT ON FUNCTION L A port = B port H A port = Z B port = BIASV Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74CBT6800A 10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS SCDS005N – MARCH 1993 – REVISED MARCH 2001 logic diagram (positive logic) 13 BIASV 2 23 A1 B1 11 14 A10 B10 1 ON absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Bias voltage range, BIASV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN MAX VCC BIASV Supply voltage 4 5.5 V Supply voltage 1.3 VCC V VIH VIL High-level control input voltage 2 Low-level control input voltage UNIT V 0.8 V TA Operating free-air temperature –40 85 °C NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74CBT6800A 10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS SCDS005N – MARCH 1993 – REVISED MARCH 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK II VCC = 4.5 V, VCC = 5.5 V, II = –18 mA VI = 5.5 V or GND IO ICC VCC = 4.5 V, VCC = 5.5 V, BIASV = 2.4 V, ∆ICC‡ Control inputs Ci Control inputs Co(OFF) VCC = 5.5 V, VI = 3 V or 0 MIN TYP† MAX UNIT –1.2 V ±5 IO = 0, One input at 3.4 V, VO= 0 VI = VCC or GND 0.25 Other inputs at VCC or GND 50 µA 2.5 mA 3.5 pF 4.5 pF VO = 3 V or 0, Switch off VCC = 4 V, TYP at VCC = 4 V VI = 2.4 V, II = 15 mA 11 20 VI = 0 II = 64 mA II = 30 mA 3 7 3 7 ron§ VCC = 4.5 V µA mA Ω VI = 2.4 V, II = 15 mA 6 15 † All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. ‡ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. § Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER TEST CONDITIONS tpd¶ tPZH BIASV = GND tPZL BIASV = 3 V tPHZ BIASV = GND tPLZ BIASV = 3 V FROM (INPUT) TO (OUTPUT) A or B B or A ON A or B ON A or B VCC = 4 V VCC = 5 V ± 0.5 V MIN MIN MAX 0.35 UNIT MAX 0.25 6 2 5.1 6 2 5.6 5.5 1 5 5.5 2 5.9 ns ns ns ¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74CBT6800A 10-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS SCDS005N – MARCH 1993 – REVISED MARCH 2001 PARAMETER MEASUREMENT INFORMATION 7V 500 Ω From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V Open Output Control (low-level enabling) LOAD CIRCUIT 3V 1.5 V 1.5 V 0V tPZL 3V Input 1.5 V 1.5 V 0V tPLH 1.5 V tPLZ 3.5 V 1.5 V tPZH tPHL VOH Output Output Waveform 1 S1 at 7 V (see Note B) 1.5 V VOL Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 23-Apr-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74CBT6800APWR ACTIVE TSSOP PW 24 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CT6800A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of