SN74LV11AD


      
  
SCES345D − DECEMBER 2000 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 7 ns at 5 V D Typical VOLP (Output Ground Bounce) D D D D 1A 1B 2A 2B 2C 2Y GND 2.3 V at VCC = 3.3 V, TA = 25°C Support Mixed-Mode Voltage Operation on All Ports Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3C 3B 3A 3Y SN54LV11A . . . FK PACKAGE (TOP VIEW) 1B 1A NC VCC 1C D SN54LV11A . . . J OR W PACKAGE SN74LV11A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) 2A NC 2B NC 2C description/ordering information These triple 3-input positive-AND gates are designed for 2-V to 5.5-V VCC operation. 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y NC 3C NC 3B 2Y GND NC 3Y 3A The ’LV11A devices perform the Boolean function Y + A • B • C or Y + A ) B ) C in positive logic. 4 NC − No internal connection These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. ORDERING INFORMATION PACKAGE† TA TOP-SIDE MARKING Tube of 50 SN74LV11AD Reel of 2500 SN74LV11ADR SOP − NS Reel of 2000 SN74LV11ANSR 74LV11A SSOP − DB Reel of 2000 SN74LV11ADBR LV11A Tube of 90 SN74LV11APW Reel of 2000 SN74LV11APWR Reel of 250 SN74LV11APWT TVSOP − DGV Reel of 2000 SN74LV11ADGVR LV11A CDIP − J Tube of 25 SNJ54LV11AJ SNJ54LV11AJ CFP − W Tube of 150 SNJ54LV11AW SNJ54LV11AW LCCC − FK Tube of 55 SNJ54LV11AFK SNJ54LV11AFK SOIC − D −40°C to 85°C TSSOP − PW −55°C −55 C to 125 125°C C ORDERABLE PART NUMBER LV11A LV11A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2005, Texas Instruments Incorporated 


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SCES345D − DECEMBER 2000 − REVISED APRIL 2005 FUNCTION TABLE (each gate) INPUTS A B C OUTPUT Y H H H H L X X L X L X L X X L L logic diagram, each gate (positive logic) A B C Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Output voltage range applied in high or low state, VO (see Notes 1 and 2) . . . . . . . . . . −0.5 V to VCC + 0.5 V Voltage range applied to any output in the power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . −0.5 V to 7 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 

      
  
SCES345D − DECEMBER 2000 − REVISED APRIL 2005 recommended operating conditions (see Note 4) SN54LV11A VCC VIH High-level input voltage VIL Low-level input voltage VI VO Input voltage IOH IOL ∆t/∆v MIN MAX 2 5.5 Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 2 5.5 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 VCC × 0.7 Output voltage 0 0.5 0 VCC −50 VCC × 0.3 5.5 0 VCC −50 −2 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V V V V µA −2 −6 −6 −12 −12 VCC = 2 V VCC = 2.3 V to 2.7 V 50 50 2 2 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 6 6 12 12 200 200 100 100 20 20 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V V VCC × 0.3 VCC × 0.3 VCC × 0.3 5.5 VCC = 2 V VCC = 2.3 V to 2.7 V UNIT V 0.5 VCC × 0.3 VCC × 0.3 0 Input transition rise or fall rate MAX 1.5 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V Low-level output current MIN 1.5 VCC = 2 V VCC = 2.3 V to 2.7 V High-level output current SN74LV11A mA µA mA ns/V TA Operating free-air temperature −55 125 −40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV11A PARAMETER VOH VOL TEST CONDITIONS IOH = −50 µA IOH = −2 mA 2 V to 5.5 V IOL = 50 µA IOL = 2 mA IOL = 6 mA IOL = 12 mA VI = 5.5 V or GND VI = VCC or GND, Ioff Ci VI or VO = 0 to 5.5 V VI = VCC or GND IO = 0 MIN TYP SN74LV11A MAX MIN VCC−0.1 2 VCC−0.1 2 3V 2.48 2.48 4.5 V 3.8 2.3 V IOH = −6 mA IOH = −12 mA II ICC VCC TYP MAX UNIT V 3.8 2 V to 5.5 V 0.1 0.1 2.3 V 0.4 0.4 3V 0.44 0.44 4.5 V V 0.55 0.55 0 to 5.5 V ±1 ±1 µA 5.5 V 20 20 µA 0V 5 5 µA 3.3 V 1.9 1.9 pF %   #&'!$# #"'# (' # " &'!$0" ' "/# ($" & "0"*(!"#+ %$'$"' $$ $# "' ("&$# $'" "/# /$*+ ",$ #'!"# '""'0" " '/  $#/" ' ##" "" (' - #"+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 

      
  
SCES345D − DECEMBER 2000 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE A, B, or C Y CL = 15 pF 6.9* A, B, or C Y CL = 50 pF 9.9 MIN SN54LV11A SN74LV11A UNIT MIN MAX MIN MAX 13.8* 1* 16* 1 16 ns 17.5 1 21 1 21 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE TA = 25°C MIN TYP MAX A, B, or C Y CL = 15 pF 5.2* A, B, or C Y CL = 50 pF 7.2 SN54LV11A SN74LV11A UNIT MIN MAX MIN MAX 8.8* 1* 10.5* 1 10.5 ns 12.3 1 14 1 14 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tpd tpd FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE TA = 25°C MIN TYP MAX A, B, or C Y CL = 15 pF 3.9* A, B, or C Y CL = 50 pF 5.4 SN54LV11A SN74LV11A UNIT MIN MAX MIN MAX 5.9* 1* 7* 1 7 ns 7.9 1 9 1 9 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25°C (see Note 5) SN74LV11A PARAMETER MIN MAX 0.2 0.8 V −0.8 V VOL(P) VOL(V) Quiet output, maximum dynamic VOL Quiet output, minimum dynamic VOL 0 VOH(V) VIH(D) Quiet output, minimum dynamic VOH 3.2 High-level dynamic input voltage UNIT TYP V 2.31 V VIL(D) Low-level dynamic input voltage NOTE 5: Characteristics are for surface-mount packages only. 0.99 V VCC 3.3 V TYP UNIT 5V 15.4 operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS CL = 50 pF, %   #&'!$# #"'# (' # " &'!$0" ' "/# ($" & "0"*(!"#+ %$'$"' $$ $# "' ("&$# $'" "/# /$*+ ",$ #'!"# '""'0" " '/  $#/" ' ##" "" (' - #"+ 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 10 MHz 13.9 pF 

      
  
SCES345D − DECEMBER 2000 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input 0V tw tsu VCC 50% VCC Input 50% VCC th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input 50% VCC tPHL tPLH In-Phase Output 50% VCC tPHL Out-of-Phase Output 0V 50% VCC VOH 50% VCC VOL tPLH Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VCC Output Control 50% VCC 50% VCC 0V tPLZ tPZL 50% VCC tPZH 50% VCC ≈VCC VOL + 0.3 V VOL tPHZ VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LV11AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A SN74LV11ADBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A SN74LV11ADGVR ACTIVE TVSOP DGV 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A SN74LV11ADR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A SN74LV11ANSR ACTIVE SO NS 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 74LV11A SN74LV11APW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A SN74LV11APWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV11A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of