SN74LV4051ATPWREP

         SCLS501D − MAY 2003 − REVISED MAY 2004 D Controlled Baseline D D D D D D D D D Individual Switch Controls D Extremely Low Input Current D Latch-Up Performance Exceeds 100 mA Per − One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of −40°C to 105°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† 2-V to 5.5-V VCC Operation Supports Mixed-Mode Voltage Operation on All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches D JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) D, DW, OR PW PACKAGE (TOP VIEW) Y4 Y6 COM Y7 Y5 INH GND GND † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC Y2 Y1 Y0 Y3 A B C description/ordering information This 8-channel CMOS analog multiplexer/demultiplexer is designed for 2-V to 5.5-V VCC operation. The SN74LV4051A handles both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. ORDERING INFORMATION −40°C −40 C to 105 105°C C ORDERABLE PART NUMBER PACKAGE‡ TA TOP-SIDE MARKING SOIC − D Tape and reel SN74LV4051ATDREP LV4051ATEP SOIC − DW Tape and reel SN74LV4051ATDWREP§ LV4051ATEP TSSOP − PW Tape and reel SN74LV4051ATPWREP L4051EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. § Product Preview. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2004, Texas Instruments Incorporated    !"# $ %&'# "$  (&)*%"# +"#', +&%#$ %! # $('%%"#$ (' #-' #'!$  '."$ $#&!'#$ $#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1  "** (""!'#'$, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 
         SCLS501D − MAY 2003 − REVISED MAY 2004 FUNCTION TABLE INPUTS A ON CHANNEL L L Y0 L H Y1 H L Y2 L H H Y3 H L L Y4 H L H Y5 H H L Y6 L H H H Y7 H X X X None INH C L L L L L L L L L L B logic diagram (positive logic) 3 13 A 14 11 15 B 12 10 1 C 5 9 2 INH 2 4 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 COM Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 
         SCLS501D − MAY 2003 − REVISED MAY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7.0 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7.0 V Switch I/O voltage range, VIO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA I/O diode current, IIOK (VIO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Switch through current, IT (VIO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 4) VCC Supply voltage VIH High-level input voltage, control inputs VIL VI VIO ∆t/∆v MIN 2‡ VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V Input transition rise or fall rate VCC = 4.5 V to 5.5 V V 0.5 VCC  0.3 VCC  0.3 0 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V V VCC  0.7 0 Input/output voltage UNIT 1.5 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V Control input voltage 5.5 VCC  0.7 VCC  0.7 VCC = 2 V VCC = 2.3 V to 2.7 V Low-level input voltage, control inputs MAX VCC  0.3 5.5 V V VCC 200 V 100 ns/V 20 TA Operating free-air temperature −40 105 °C ‡ With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages. NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 
         SCLS501D − MAY 2003 − REVISED MAY 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER ron TEST CONDITIONS On-state switch resistance ron(p) ∆ron Peak on-state resistance Difference in on-state resistance between switches IT = 2 mA, VI = VCC or GND, VINH = VIL, (see Figure 1) IT = 2 mA, VI = VCC to GND, VINH = VIL IT = 2 mA, VI = VCC to GND, VINH = VIL VCC MIN TA = 25°C TYP MAX MIN MAX 2.3 V 38 180 225 3V 30 150 190 4.5 V 22 75 100 2.3 V 113 500 600 3V 54 180 225 4.5 V 31 100 125 2.3 V 2.1 30 40 3V 1.4 20 30 4.5 V 1.3 UNIT Ω Ω Ω 15 20 ±0.1 ±1 µA II Control input current VI = 5.5 V or GND 0 to 5.5 V IS(off) Off-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH, (see Figure 2) 5.5 V ±0.1 ±1 µA IS(on) On-state switch leakage current VI = VCC or GND, VINH = VIL (see Figure 3) 5.5 V ±0.1 ±1 µA Supply current VI = VCC or GND f = 10 MHz 20 µA ICC CIC Control input capacitance 5.5 V 3.3 V 2 pF CIS Common terminal capacitance 3.3 V 23.4 pF COS Switch terminal capacitance 3.3 V 5.7 pF CF Feedthrough capacitance 3.3 V 0.5 pF switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) PARAMETER 4 TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM CL = 15 pF, (see Figure 4) 1.9 10 16 ns MIN MIN MAX UNIT tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 6.6 18 23 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 7.4 18 23 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF, (see Figure 5) 3.8 12 18 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 7.8 28 35 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 11.5 28 35 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
         SCLS501D − MAY 2003 − REVISED MAY 2004 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) PARAMETER TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM CL = 15 pF, (see Figure 4) 1.2 6 10 ns MIN MIN MAX UNIT tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 4.7 12 15 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 5.7 12 15 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF, (see Figure 4) 2.5 9 12 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 5.5 20 25 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 8.8 20 25 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) PARAMETER TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM CL = 15 pF, (see Figure 4) 0.6 4 7 ns MIN MIN MAX UNIT tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 3.5 8 10 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF, (see Figure 5) 4.4 8 10 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF, (see Figure 4) 1.5 6 8 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 4 14 18 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF, (see Figure 5) 6.2 14 18 ns POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 
         SCLS501D − MAY 2003 − REVISED MAY 2004 analog switch characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Frequency response (switch on) Crosstalk (control input to signal output) Feedthrough attenuation (switch off) Sine-wave distortion TA = 25°C TYP MAX FROM (INPUT) TO (OUTPUT) TEST CONDITIONS VCC 20 Yn or COM CL = 50 pF, RL = 600 Ω,, fin = 1 MHz (sine wave) (see Note 5 and Figure 6) 2.3 V COM or Yn 3V 25 4.5 V 35 CL = 50 pF, RL = 600 Ω,, fin = 1 MHz (square wave) (see Figure 7) 2.3 V 20 3V 35 4.5 V 60 CL = 50 pF, RL = 600 Ω,, fin = 1 MHz (see Note 6 and Figure 8) 2.3 V −45 3V −45 4.5 V −45 CL = 50 pF, RL = 10 kΩ, fin = 1 kHz (sine wave) (see Figure 9) 2.3 V 0.1 3V 0.1 4.5 V 0.1 INH COM or Yn COM or Yn Yn or COM COM or Yn Yn or COM VI = 2 Vp-p VI = 2.5 Vp-p VI = 4 Vp-p MIN UNIT MHz mV dB % NOTES: 5. Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads −3 dB. 6. Adjust fin voltage to obtain 0-dBm input. operating characteristics, VCC = 3.3 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 10 MHz PARAMETER MEASUREMENT INFORMATION VCC VINH = VIL VCC VI = VCC or GND VO (ON) GND r on + 2 mA V VI − VO Figure 1. On-State Resistance Test Circuit 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VI – VO 2 10 –3 W TYP UNIT 5.9 pF 
         SCLS501D − MAY 2003 − REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION VCC VINH = VIH VCC A VI (OFF) VO GND Condition 1: VI = 0, VO = VCC Condition 2: VI = VCC, VO = 0 Figure 2. Off-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC VI A (ON) Open GND VI = VCC or GND Figure 3. On-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC Output (ON) Input 50 Ω CL GND Figure 4. Propagation Delay Time, Signal Input to Signal Output POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 
         SCLS501D − MAY 2003 − REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION VCC 50 Ω VINH VCC VI S1 VO TEST S1 S2 tPLZ/tPZL tPHZ/tPZH GND VCC VCC GND 1 kΩ S2 CL GND TEST CIRCUIT VCC VCC VINH 50% 50% 0V 0V tPZH tPZL ≈VCC VOH VO 50% 50% VOL ≈0 V (tPZL, tPZH) VCC VCC VINH 50% 50% 0V 0V tPHZ tPLZ ≈VCC VOH VO VOL + 0.3 V VOL VOH − 0.3 V ≈0 V (tPLZ, tPHZ) VOLTAGE WAVEFORMS Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output VCC VINH = GND 0.1 µF fin VI VCC (ON) GND 50 Ω VO RL CL VCC/2 NOTE A: fin is a sine wave. Figure 6. Frequency Response (Switch On) 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
         SCLS501D − MAY 2003 − REVISED MAY 2004 PARAMETER MEASUREMENT INFORMATION VCC 50 Ω VINH VCC VO GND 600 Ω RL VCC/2 CL VCC/2 Figure 7. Crosstalk (Control Input, Switch Output) VCC VINH = VCC 0.1 µF VI fin 50 Ω VCC (OFF) VO GND 600 Ω RL CL VCC/2 VCC/2 Figure 8. Feedthrough Attenuation (Switch Off) VCC VINH = GND 10 µF fin 600 Ω 10 µF VCC (ON) GND VO RL CL VCC/2 Figure 9. Sine-Wave Distortion POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LV4051ATDREP ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 LV4051ATEP SN74LV4051ATPWREP ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 L4051EP V62/03664-01XE ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 L4051EP V62/03664-01YE ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 105 LV4051ATEP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of