SN74LV4053ANSR

SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 2Y1 2Y0 3Y1 3-COM 3Y0 INH GND GND 15 3 14 4 13 5 12 6 11 7 10 8 9 2Y0 3Y1 3-COM 3Y0 INH GND VCC 2-COM 1-COM 1Y1 1Y0 A B C 1 16 2 15 3 14 4 13 5 12 6 11 10 7 8 Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. 2-COM 1-COM 1Y1 1Y0 A B 9 GND The ’LV4053A devices handle both analog and digital signals. Each channel permits signals with amplitudes up to 5.5 V (peak) to be transmitted in either direction. 16 2 SN74LV4053A . . . RGY PACKAGE (TOP VIEW) description/ordering information These triple 2-channel CMOS analog multiplexers/demultiplexers are designed for 2-V to 5.5-V VCC operation. 1 VCC D All Ports High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Individual Switch Controls Extremely Low Input Current Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) C D D D D D SN54LV4053A . . . J OR W PACKAGE SN74LV4053A . . . D, DB, DGV, N, NS, OR PW PACKAGE (TOP VIEW) 2Y1 D 2-V to 5.5-V VCC Operation D Support Mixed-Mode Voltage Operation on ORDERING INFORMATION PACKAGE† TA Tube of 25 SN74LV4053AN SN74LV4053AN QFN − RGY Reel of 1000 SN74LV4053ARGYR LW053A Tube of 40 SN74LV4053AD Reel of 2500 SN74LV4053ADR SOP − NS Reel of 2000 SN74LV4053ANSR 74LV4053A SSOP − DB Reel of 2000 SN74LV4053ADBR LW053A Tube of 90 SN74LV4053APW Reel of 2000 SN74LV4053APWR Reel of 250 SN74LV4053APWT TVSOP − DGV Reel of 2000 SN74LV4053ADGVR LW053A CDIP − J Tube of 25 SNJ54LV4053AJ SNJ54LV4053AJ CFP − W Tube of 150 SNJ54LV4053AW SNJ54LV4053AW TSSOP − PW −55°C 55°C to 125°C † TOP-SIDE MARKING PDIP − N SOIC − D −40°C 40°C to 85°C ORDERABLE PART NUMBER LV4053A LW053A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright © 2005, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 FUNCTION TABLE INPUTS B A ON CHANNELS INH C L L L L 1Y0, 2Y0, 3Y0 L L L H 1Y1, 2Y0, 3Y0 L L H L 1Y0, 2Y1, 3Y0 L L H H 1Y1, 2Y1, 3Y0 L H L L 1Y0, 2Y0, 3Y1 L H L H 1Y1, 2Y0, 3Y1 L H H L 1Y0, 2Y1, 3Y1 L H H H 1Y1, 2Y1, 3Y1 H X X X None logic diagram (positive logic) 15 14 A 12 2 2 1Y1 2Y0 2Y1 9 5 3 INH 1Y0 10 1 C 1-COM 11 13 B 2-COM 6 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3Y0 3Y1 3-COM SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Switch I/O voltage range, VIO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA I/O diode current, IIOK (VIO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Switch through current, IT (VIO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 5) SN54LV4053A VCC Supply voltage VCC = 2 V VIH High level input voltage, High-level voltage control inputs MIN MAX MIN MAX 2‡ 5.5 2‡ 5.5 1.5 1.5 VCC = 2.3 V to 2.7 V VCC × 0.7 VCC × 0.7 VCC = 3 V to 3.6 V VCC × 0.7 VCC × 0.7 VCC = 4.5 V to 5.5 V VCC × 0.7 VCC × 0.7 VCC = 2 V VIL Low level input voltage, Low-level voltage control inputs VI Control input voltage VIO Input/output voltage 0.5 Input transition rise or fall rate VCC × 0.3 VCC = 3 V to 3.6 V VCC × 0.3 VCC × 0.3 VCC × 0.3 V VCC × 0.3 0 5.5 0 5.5 V 0 VCC 0 VCC V VCC = 2.3 V to 2.7 V 200 200 VCC = 3 V to 3.6 V 100 100 20 20 Operating free-air temperature V 0.5 VCC × 0.3 VCC = 4.5 V to 5.5 V TA UNIT V VCC = 2.3 V to 2.7 V VCC = 4.5 V to 5.5 V Δt/Δv SN74LV4053A −55 125 −40 85 ns/V °C ‡ With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. It is recommended that only digital signals be transmitted at these low supply voltages. NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS PARAMETER VCC TA = 25°C MIN SN54LV4053A TYP MAX MIN MAX SN74LV4053A MIN MAX IT = 2 mA,, VI = VCC or GND, VINH = VIL (see Figure 1) 2.3 V 41 180 225 225 3V 30 150 190 190 4.5 V 23 75 100 100 IT = 2 mA, VI = VCC to GND, VINH = VIL 2.3 V 139 500 600 600 3V 63 180 225 225 4.5 V 35 100 125 125 Difference in on-state on state resistance between switches IT = 2 mA, VI = VCC to GND, VINH = VIL 2.3 V Control input current VI = 5.5 V or GND IS(off) On-state switch resistance ron ron(p) Peak on-state on state resistance UNIT Ω Ω 2 30 40 40 3V 1.6 20 30 30 4.5 V 1.3 15 20 20 0 to 5.5 V ±0.1 ±1 ±1 μA Off-state switch leakage current VI = VCC and VO = GND, or VI = GND and VO = VCC, VINH = VIH (see Figure 2) 5.5 V ±0.1 ±1 ±1 μA IS(on) On-state switch leakage current VI = VCC or GND, VINH = VIH (see Figure 3) 5.5 V ±0.1 ±1 ±1 μA ICC Supply current VI = VCC or GND 5.5 V 20 20 μA CIC Control input capacitance CIS Δron II Ω 2 pF Common terminal capacitance 8.2 pF COS Switch terminal capacitance 5.6 pF CF Feedthrough capacitance 0.5 pF switching characteristics over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM TA = 25°C MIN MIN MAX SN74LV4053A MIN MAX UNIT MAX CL = 15 pF (see Figure 4) 2.5 10 16 16 ns tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 5) 7.6 18 23 23 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 5) 7.7 18 23 23 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 4.4 12 18 18 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 8.8 28 35 35 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 11.7 28 35 35 ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 SN54LV4053A TYP POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS COM or Yn Yn or COM TA = 25°C MIN SN54LV4053A MIN MAX SN74LV4053A MIN MAX UNIT TYP MAX CL = 15 pF (see Figure 4) 1.6 6 10 10 ns tPLH tPHL Propagation delay time tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 5) 5.3 12 15 15 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 5) 6.1 12 15 15 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 2.9 9 12 12 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 6.1 20 25 25 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 8.9 20 25 25 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS TA = 25°C MIN SN54LV4053A TYP MAX MIN MAX SN74LV4053A MIN MAX UNIT tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 15 pF (see Figure 4) 0.9 4 7 7 ns tPZH tPZL Enable delay time INH COM or Yn CL = 15 pF (see Figure 5) 3.8 8 10 10 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 15 pF (see Figure 5) 4.6 8 10 10 ns tPLH tPHL Propagation delay time COM or Yn Yn or COM CL = 50 pF (see Figure 4) 1.8 6 8 8 ns tPZH tPZL Enable delay time INH COM or Yn CL = 50 pF (see Figure 5) 4.3 14 18 18 ns tPHZ tPLZ Disable delay time INH COM or Yn CL = 50 pF (see Figure 5) 6.3 14 18 18 ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 analog switch characteristics FROM (INPUT) PARAMETER Frequency response (switch on) COM or Yn Crosstalk (between any switches) Feedthrough attenuation (switch off) TEST CONDITIONS Yn or COM COM or Yn Crosstalk (control input to signal output) Sine-wave distortion TO (OUTPUT) Yn or COM INH COM or Yn COM or Yn Yn or COM COM or Yn Yn or COM VCC TA = 25°C TYP CL = 50 pF, p , RL = 600 Ω, fin i = 1 MHz (sine wave) (see Note 6 and Figure 6) 2.3 V 30 3V 35 4.5 V 50 CL = 50 pF, p , RL = 600 Ω, fin = 1 MHz (sine wave) (see Note 7 and Figure 7) 2.3 V −45 3V −45 4.5 V −45 CL = 50 pF, p , RL = 600 Ω, fin = 1 MHz (square wave) (see Figure 8) 2.3 V 20 3V 35 4.5 V 65 CL = 50 pF, p , RL = 600 Ω, fin = 1 MHz (see Note 7 and Figure 9) 2.3 V −45 3V −45 4.5 V −45 CL = 50 pF, RL = 10 kΩ, kΩ fin = 1 kHz ( i wave)) (sine (see Figure 10) 2.3 V 0.1 3V 0.1 4.5 V 0.1 VI = 2 Vp-p VI = 2.5 Vp-p VI = 4 Vp-p UNIT MHz dB mV dB % NOTES: 6. Adjust fin voltage to obtain 0-dBm output. Increase fin frequency until dB meter reads −3 dB. 7. Adjust fin voltage to obtain 0-dBm input. operating characteristics, VCC = 3.3 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, f = 10 MHz PARAMETER MEASUREMENT INFORMATION VCC VINH = VIL VCC VI = VCC or GND VO (ON) GND r on + 2 mA V VI − VO Figure 1. On-State Resistance Test Circuit 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VI – VO 2 10 –3 W TYP UNIT 5.3 pF SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = VIH VCC A VI VO (OFF) GND Condition 1: VI = 0, VO = VCC Condition 2: VI = VCC, VO = 0 Figure 2. Off-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC A VI Open (ON) GND VI = VCC or GND Figure 3. On-State Switch Leakage-Current Test Circuit VCC VINH = VIL VCC Input Output (ON) 50 Ω GND CL Figure 4. Propagation Delay Time, Signal Input to Signal Output POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC 50 Ω VINH VCC VI S1 VO GND 1 kΩ TEST S1 S2 tPLZ/tPZL tPHZ/tPZH GND VCC VCC GND S2 CL TEST CIRCUIT VCC VCC VINH 50% 50% 0V 0V tPZL tPZH ≈VCC VOH VO 50% 50% VOL ≈0 V (tPZL, tPZH) VCC VCC VINH 50% 50% 0V 0V tPLZ tPHZ ≈VCC VOH VO VOL + 0.3 V VOL (tPLZ, tPHZ) VOH − 0.3 V ≈0 V VOLTAGE WAVEFORMS Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output VCC VINH = GND VCC fin VO (ON) 50 Ω 0.1 μF GND RL CL VCC/2 NOTE A: fin is a sine wave. Figure 6. Frequency Response (Switch On) 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = GND VCC fin VO1 (ON) 0.1 μF 600 Ω 50 Ω GND RL CL VCC/2 VCC VINH = VCC VCC fin (OFF) VO2 GND 600 Ω RL CL VCC/2 Figure 7. Crosstalk Between Any Two Switches 50 Ω VCC VINH VCC VO GND 600 Ω RL VCC/2 CL VCC/2 Figure 8. Crosstalk Between Control Input and Switch Output VCC VINH = VCC 0.1 μF VCC fin VO (OFF) 50 Ω 600 Ω GND VCC/2 RL CL VCC/2 Figure 9. Feedthrough Attenuation (Switch Off) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN54LV4053A, SN74LV4053A TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS SCLS430K − MAY 1999 − REVISED APRIL 2005 PARAMETER MEASUREMENT INFORMATION VCC VINH = GND 10 μF fin 10 μF VCC VO (ON) 600 Ω GND RL VCC/2 Figure 10. Sine-Wave Distortion 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CL PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LV4053AD ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV4053A Samples SN74LV4053ADBR ACTIVE SSOP DB 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053ADE4 ACTIVE SOIC D 16 40 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LV4053A Samples SN74LV4053ADGVR ACTIVE TVSOP DGV 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053ADR ACTIVE SOIC D 16 2500 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LV4053A Samples SN74LV4053AN ACTIVE PDIP N 16 25 RoHS & Green NIPDAU N / A for Pkg Type -40 to 85 SN74LV4053AN Samples SN74LV4053ANSR ACTIVE SO NS 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 74LV4053A Samples SN74LV4053APW ACTIVE TSSOP PW 16 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053APWR ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053APWRG4 ACTIVE TSSOP PW 16 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053APWT ACTIVE TSSOP PW 16 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 LW053A Samples SN74LV4053ARGYR ACTIVE VQFN RGY 16 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 LW053A Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of