SN74LVC1G07
SCES296AE – FEBRUARY 2000 – REVISED SN74LVC1G07
SEPTEMBER 2020
SCES296AE – FEBRUARY 2000 – REVISED SEPTEMBER 2020
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SN74LVC1G07 Single Buffer/Driver With Open-Drain Output
1 Features
•
•
•
•
•
•
•
•
•
•
Available in the Ultra Small 0.64-mm2
Package (DPW) With 0.5-mm Pitch
Supports 5-V VCC Operation
Input and Open-Drain Output Accept
Voltages up to 5.5 V
Can Translate Up or Down
Max tpd of 4.2 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
Ioff Supports Live Insertion, Partial-Power-Down
Mode, and Back-Drive Protection
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
3 Description
AV Receiver
Blu-ray Player and Home Theater
DVD Recorder and Player
Desktop or Notebook PC
Digital Radio or Internet Radio Player
Digital Video Camera (DVC)
Embedded PC
GPS: Personal Navigation Device
Mobile Internet Device
Network Projector Front End
Portable Media Player
Pro Audio Mixer
Smoke Detector
Solid State Drive (SSD): Enterprise
High-Definition (HDTV)
Tablet: Enterprise
Audio Dock: Portable
DLP Front Projection System
DVR and DVS
Digital Picture Frame (DPF)
Digital Still Camera
This single buffer/driver is designed for 1.65-V to
5.5-V VCC operation.
The output of the SN74LVC1G07 device is open drain
and can be connected to other open-drain outputs to
implement active-low wired-OR or active-high wiredAND functions. The maximum sink current is 32 mA.
The SN74LVC1G07 is available in a variety of
packages, including the ultra-small DPW package
with a body size of 0.8 mm × 0.8 mm.
Device Information
DEVICE NAME
PACKAGE(1)
BODY SIZE
SN74LVC1G07DBV
SOT-23 (5)
2.9mm × 1.6mm
SN74LVC1G07DCK
SC70 (5)
2.0mm × 1.25mm
SN74LVC1G07DPW X2SON (5)
0.8mm × 0.8mm
SN74LVC1G07DRY
SON (6)
1.45mm × 1.0mm
SN74LVC1G07DSF
SON (6)
1.0mm × 1.0mm
SN74LVC1G07DRL
SOT (5)
1.6mm x 1.2mm
SN74LVC1G07YZP
DSBGA (6)
1.38mm x 0.88mm
SN74LVC1G07YZV
DSBGA (4)
0.88mm x 0.88mm
(1)
For all available packages, see the orderable addendum at
the end of the datasheet.
A
Y
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
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SCES296AE – FEBRUARY 2000 – REVISED SEPTEMBER 2020
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Switching Characteristics, –40°C to 85°C...................6
6.7 Switching Characteristics, –40°C to 125°C.................6
6.8 Operating Characteristics........................................... 6
6.9 Typical Characteristics................................................ 7
7 Parameter Measurement Information............................ 8
7.1 (Open Drain)............................................................... 8
8 Detailed Description........................................................9
8.1 Overview..................................................................... 9
8.2 Functional Block Diagram........................................... 9
8.3 Feature Description.....................................................9
8.4 Device Functional Modes............................................9
9 Application and Implementation.................................. 10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
10 Power Supply Recommendations..............................11
11 Layout........................................................................... 11
11.1 Layout Guidelines....................................................11
11.2 Layout Example.......................................................11
12 Device and Documentation Support..........................12
12.1 Trademarks............................................................. 12
12.2 Electrostatic Discharge Caution..............................12
12.3 Glossary..................................................................12
13 Mechanical, Packaging, and Orderable
Information.................................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision AD (May 2016) to Revision AE (September 2020)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
Changes from Revision AC (April 2014) to Revision AD (April 2016)
Page
• Changed 4 pin to 5 pin on DPW package in Device Information table............................................................... 1
• Added DRL, YZP, and YZV package information and body size dimensions to Device Information table ........ 1
• Moved "Tstg Storage temperature range" from ESD Ratings table to Absolute Maximum Ratings table........... 4
• Added " Tj Junction temperature range" to Absolute Maximum ratings table.....................................................4
• Split "TA Operating free-air temperature" into package specific temperature ranges in Recommended
Operating Conditions table................................................................................................................................. 5
• Changed "H" to "Z" in Output Y column of Function Table ................................................................................ 9
Changes from Revision AB (March 2014) to Revision AC (April 2014)
Page
• Updated Handling Ratings table. ....................................................................................................................... 4
• Added Thermal Information table. ..................................................................................................................... 5
• Added Typical Characteristics. .......................................................................................................................... 7
• Added Application and Implementation section. ..............................................................................................10
• Added Power Supply Recommendations section. ........................................................................................... 11
Changes from Revision AA (July 2013) to Revision AB (February 2014)
Page
• Updated Features............................................................................................................................................... 1
• Added Applications............................................................................................................................................. 1
• Added Device Information table..........................................................................................................................1
• Added Pin Functions table. ................................................................................................................................3
• Moved Tstg to Handling Ratings table................................................................................................................. 4
Changes from Revision Z (November 2012) to Revision AA (July 2013)
Page
• Extended maximum temperature operating range from 85°C to 125°C............................................................. 5
2
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SCES296AE – FEBRUARY 2000 – REVISED SEPTEMBER 2020
5 Pin Configuration and Functions
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
N.C.
1
N.C.
VCC
5
A
A
2
GND
3
GND
5
1
DRL PACKAGE
(TOP VIEW)
VCC
2
3
4
A
2
GND
3
VCC N.C.
5
1
Y
4
1
VCC
6
A
2
5
N.C.
GND
3
4
Y
N.C.
A
GND
1
6
2
5
3
4
VCC
N.C.
Y
Y
YZP PACKAGE
(TOP VIEW)
Y
4
N.C.
DSF PACKAGE
(TOP VIEW)
DRY PACKAGE
(TOP VIEW)
DNU
A
GND
N.C. – No internal connection
See mechanical drawings for dimensions.
A1
A2
B1
B2
C1
C2
VCC
YZV PACKAGE
(TOP VIEW)
A
GND
A1
B1
A2
B2
VCC
Y
DPW PACKAGE
(TOP VIEW)
GND
N.C.
A
1
5
3
2
4
VCC
Y
Y
Pin Functions
PIN
DESCRIPTION
NAME
DBV, DCK,
DRL
DRY, DSF
DPW
YZP
NC
1
1, 5
1
A1, B2
–
A
2
2
2
B1
A1
Input
GND
3
3
3
C1
B1
Ground
Y
4
4
4
C2
B2
Output
VCC
5
6
5
A2
A2
Power pin
YZV
Not connected
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
VCC
MIN
MAX
Supply voltage range
–0.5
6.5
V
range(2)
–0.5
6.5
V
–0.5
6.5
V
VI
Input voltage
VO
Voltage range applied to any output in the high-impedance or power-off state(2)
state(2) (3)
–0.5
UNIT
VO
Voltage range applied to any output in the high or low
6.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
150
°C
150
°C
Continuous current through VCC or GND
Tstg
Storage temperature range
Tj
Junction temperature range
(1)
(2)
(3)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the Recommended Operating Conditions table.
6.2 ESD Ratings
MIN
V(ESD)
(1)
(2)
4
Electrostatic discharge
MAX
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins(1)
0
2000
Charged device model (CDM), per JEDEC specification JESD22C101, all pins(2)
0
1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
VCC
Operating
Supply voltage
Data retention only
High-level input voltage
MAX
1.65
5.5
1.7
VCC = 3 V to 3.6 V
VI
Input voltage
VO
Output voltage
V
2
0.7 × VCC
VCC = 1.65 V to 1.95 V
Low-level input voltage
0.35 × VCC
VCC = 2.3 V to 2.7 V
0.7
VCC = 3 V to 3.6 V
0.8
VCC = 4.5 V to 5.5 V
0.3 × VCC
5.5
V
0
5.5
V
4
VCC = 2.3 V
Low-level output current
Δt/Δv
Input transition rise or fall rate
8
16
VCC = 3 V
(1)
Operating free-air temperature
mA
24
VCC = 4.5 V
32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
20
VCC = 3.3 V ± 0.3 V
10
VCC = 5 V ± 0.5 V
TA
V
0
VCC = 1.65 V
IOL
V
0.65 × VCC
VCC = 2.3 V to 2.7 V
VCC = 4.5 V to 5.5 V
VIL
UNIT
1.5
VCC = 1.65 V to 1.95 V
VIH
MIN
ns/V
5
DSBGA package
–40
85
All other packages
–40
125
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6.4 Thermal Information
SN74LVC1G07
THERMAL
METRIC(1)
DBV
DCK
DRL
DRY
YZP
DPW
5 PINS
5 PINS
5 PINS
6 PINS
5 PINS
4 PINS
RθJA
Junction-to-ambient thermal resistance
229
278
243
439
130
340
RθJC(top)
Junction-to-case (top) thermal resistance
164
93
78
277
54
215
RθJB
Junction-to-board thermal resistance
62
65
78
271
51
294
ψJT
Junction-to-top characterization parameter
44
2
10
84
1
41
ψJB
Junction-to-board characterization parameter
62
64
77
271
50
294
RθJC(bot)
Junction-to-case (bottom) thermal resistance
–
–
–
–
–
250
(1)
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TYP(1)
IOL = 100 µA
VOL
TYP
0.1
IOL = 4 mA
1.65 V
0.45
0.45
IOL = 8 mA
2.3 V
0.3
0.3
0.4
0.4
0.55
0.55
0.55
0.55
3V
IOL = 32 mA
4.5 V
VI = 5.5 V or GND
UNIT
MAX
0.1
IOL = 16 mA
A input
MAX
1.65 V to 5.5 V
IOL = 24 mA
II
–40°C TO 125°C
RECOMMENDED
–40°C TO 85°C
VCC
V
0 to 5.5 V
±5
±5
µA
0
±10
±10
µA
1.65 V to 5.5 V
10
10
µA
3 V to 5.5 V
500
500
µA
Ioff
VI or VO = 5.5 V
ICC
VI = 5.5 V or GND,
IO = 0
ΔICC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
Ci
VI = VCC or GND
3.3 V
4
4
pF
Co
VO = VCC or GND
3.3 V
5
5
pF
(1)
All typical values are at VCC = 3.3 V, TA = 25°C.
6.6 Switching Characteristics, –40°C to 85°C
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1)
–40°C TO 85°C
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.4
8.3
1
5.5
1.5
4.2
1
3.5
UNIT
ns
6.7 Switching Characteristics, –40°C to 125°C
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 7-1)
–40°C TO 125°C
RECOMMENDED
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.4
8.6
1
6
1.5
4.7
1
4
UNIT
ns
6.8 Operating Characteristics
TA = 25°C
Cpd
6
PARAMETER
TEST CONDITIONS
Power dissipation capacitance
f = 10 MHz
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
TYP
TYP
TYP
TYP
3
3
4
6
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UNIT
pF
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6.9 Typical Characteristics
2.5
6
TPD
TPD
5
2
TPD - ns
TPD - ns
4
1.5
1
3
2
0.5
1
0
-100
-50
0
50
Temperature - °C
100
150
0
0
1
D001
Figure 6-1. TPD Across Temperature at 3.3V Vcc
2
3
Vcc - V
4
5
6
D002
Figure 6-2. TPD Across Vcc at 25°C
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7 Parameter Measurement Information
7.1 (Open Drain)
VLOAD
S1
RL
From Output
Under Test
Open
TEST
GND
RL
CL
(see Note A)
S1
tPZL (see Notes E and F)
VLOAD
tPLZ (see Notes E and G)
VLOAD
tPHZ/tPZH
VLOAD
LOAD CIRCUIT
INPUT
VCC
VI
VCC
VCC
3V
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VM
tr/tf
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
VLOAD
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
CL
RL
V∆
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tw
tsu
VI
VM
Input
VM
th
VM
VM
Data Input
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VI
VM
Input
VM
0V
VM
VM
VOL
tPHL
tPLZ
VLOAD/2
VM
tPZH
VOH
Output
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VM
VM
tPZL
VOH
Output
VI
Output
Control
tPHL
tPLH
VI
VM
VOL
VOL
tPHZ
Output
Waveform 2
S1 at VLOAD
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + V∆
VM
VLOAD/2 − V∆
VLOAD/2
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VM.
G. tPLZ is measured at VOL + V∆.
H. All parameters and waveforms are not applicable to all devices.
Figure 7-1. Load Circuit and Voltage Waveforms
8
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8 Detailed Description
8.1 Overview
The SN74LVC1G07 device contains one open-drain buffer with a maximum sink current of 32 mA. This device is
fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing
damaging current backflow through the device when it is powered down.
The DPW package technology is a major breakthrough in IC packaging. The DPW 0.64 mm square footprint
saves significant board space over other package options while still retaining the traditional manufacturing
friendly lead pitch of 0.5 mm.
8.2 Functional Block Diagram
A
Y
8.3 Feature Description
•
•
•
•
Wide operating voltage range.
– Operates from 1.65 V to 5.5 V.
Allows down voltage translation.
Inputs and outputs accept voltages to 5.5 V.
Ioff feature allows voltages on the inputs and outputs, when VCC is 0 V.
8.4 Device Functional Modes
Function Table
INPUT
A
OUTPUT
Y
L
L
H
Z
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design
implementation to confirm system functionality.
9.1 Application Information
The SN74LVC1G07 is a high drive CMOS device that can be used to implement a high output drive buffer, such
as an LED application. It can sink 32 mA of current at 4.5 V making it ideal for high drive and wired-OR/AND
functions. It is good for high speed applications up to 100 MHz. The inputs are 5.5 V tolerant allowing it to
translate up/down to VCC.
9.2 Typical Application
Basic LED Driver
Buffer Function
VPU
VPU
VCC
uC or Logic
LVC1G07
Wired OR
uC or Logic
uC or Logic
LVC1G07
uC or Logic
LVC1G07
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it may drive currents that would exceed maximum limits. The high drive will also create fast
edges into light loads so routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
• Rise time and fall time specs. See (Δt/ΔV) in the Recommended Operating Conditions table.
• Specified high and low levels. See (VIH and VIL) in the Recommended Operating Conditions table.
• Inputs are over-voltage tolerant allowing them to go as high as (VI max) in the Recommended Operating
Conditions table at any valid VCC.
2. Recommend Output Conditions
• Load currents should not exceed (IO max) per output and should not exceed (Continuous current through
VCC or GND) total current for the part. These limits are located in the Absolute Maximum Ratings table.
• Outputs should not be pulled above 5.5 V.
10
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9.2.3 Application Curves
1600
Icc
Icc
Icc
Icc
1400
1200
1.8V
2.5V
3.3V
5V
Icc - µA
1000
800
600
400
200
0
0
20
40
Frequency - MHz
60
80
D001
Figure 9-1. Icc vs Frequency
10 Power Supply Recommendations
The power supply can be any voltage between the min and max supply voltage rating located in the
Recommended Operating Conditions table.
Each Vcc pin should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is
recommended for devices with a single supply. If there are multiple Vcc pins then a 0.01-μF or 0.022-μF
capacitor is recommended for each power pin. It is acceptable to parallel multiple bypass caps to reject different
frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be
installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions
of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only
3 of the 4 buffer gates are used. Such input pins should not be left unconnected because the undefined voltages
at the outside connections result in undefined operational states. Specified below are the rules that must be
observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or low
bias to prevent them from floating. The logic level that should be applied to any particular unused input depends
on the function of the device. Generally, they will be tied to Gnd or Vcc, whichever is more convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Unused Input
Output
Input
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12 Device and Documentation Support
12.1 Trademarks
All other trademarks are the property of their respective owners.
12.2 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.3 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
12
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: SN74LVC1G07
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74LVC1G07DBVR
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(C075, C07F, C07J,
C07K, C07R, C
07T)
(C07H, C07P, C07S)
SN74LVC1G07DBVRE4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
C07F
Samples
SN74LVC1G07DBVRG4
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
C07F
Samples
SN74LVC1G07DBVT
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(C075, C07F, C07J,
C07K, C07R)
(C07H, C07P, C07S)
SN74LVC1G07DBVTE4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
C07F
Samples
SN74LVC1G07DBVTG4
ACTIVE
SOT-23
DBV
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
C07F
Samples
SN74LVC1G07DCK3
ACTIVE
SC70
DCK
5
3000
RoHS &
Non-Green
SNBI
Level-1-260C-UNLIM
-40 to 125
(CVF, CVZ)
Samples
SN74LVC1G07DCKR
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
(CVH, CVP, CVS)
SN74LVC1G07DCKRE4
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
(CVH, CVP, CVS)
SN74LVC1G07DCKRG4
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
(CVH, CVP, CVS)
SN74LVC1G07DCKT
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
CVH
SN74LVC1G07DCKTE4
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
CVH
SN74LVC1G07DCKTG4
ACTIVE
SC70
DCK
5
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
(CV5, CVF, CVJ, CV
K, CVR, CVT)
Addendum-Page 1
Samples
Samples
Samples
Samples
Samples
Samples
Samples
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable Device
6-Dec-2022
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
CVH
SN74LVC1G07DPWR
ACTIVE
X2SON
DPW
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
L4
Samples
SN74LVC1G07DRLR
ACTIVE
SOT-5X3
DRL
5
4000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(CV7, CVR)
Samples
SN74LVC1G07DRLRG4
ACTIVE
SOT-5X3
DRL
5
4000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
(CV7, CVR)
Samples
SN74LVC1G07DRY2
ACTIVE
SON
DRY
6
5000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
CV
Samples
SN74LVC1G07DRYR
ACTIVE
SON
DRY
6
5000
RoHS & Green
Call TI | NIPDAUAG
| NIPDAU
Level-1-260C-UNLIM
-40 to 125
CV
Samples
SN74LVC1G07DRYRG4
ACTIVE
SON
DRY
6
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
CV
Samples
SN74LVC1G07DSF2
ACTIVE
SON
DSF
6
5000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
CV
Samples
SN74LVC1G07DSFR
ACTIVE
SON
DSF
6
5000
RoHS & Green NIPDAU | NIPDAUAG
Level-1-260C-UNLIM
-40 to 125
CV
Samples
SN74LVC1G07YZPR
ACTIVE
DSBGA
YZP
5
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
(CV7, CVN)
Samples
SN74LVC1G07YZVR
ACTIVE
DSBGA
YZV
4
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
CV
N
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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