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SN74LVC1G0832DCKT

SN74LVC1G0832DCKT

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SC70-6

  • 描述:

    AND/OR Gate Configurable 1 Circuit 3 Input (2, 1) Input SC-70-6

  • 数据手册
  • 价格&库存
SN74LVC1G0832DCKT 数据手册
SN74LVC1G0832 www.ti.com SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 Single 3-Input Positive AND-OR Gate Check for Samples: SN74LVC1G0832 FEATURES DESCRIPTION • This device is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Provides Down Translation to VCC Max tpd of 5 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (Vhys = 250 mV Typ @ 3.3 V) Can Be Used in Three Combinations: – AND-OR Gate – AND Gate – OR Gate Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Drive Protection Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1 6 By tying one input to GND or VCC, the SN74LVC1G0832 device offers two more functions. When C is tied to GND, this device performs as a 2−input AND gate (Y = A • B). When A is tied to VCC, the device works as a 2−input OR gate (Y = B + C). This device also works as a 2−input OR gate when B is tied to VCC (Y = A + C). NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. YZP PACKAGE (BOTTOM VIEW) DCK PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) A The SN74LVC1G0832 device is a single 3-input positive AND-OR gate. It performs the Boolean function Y = (A • B ) + C in positive logic. C A GND GND 2 5 VCC B 3 4 Y B 1 2 3 6 5 4 C VCC B 3 4 GND 2 5 A 1 6 Y VCC C Y 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2013, Texas Instruments Incorporated SN74LVC1G0832 SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Function Table (1) INPUTS B C OUTPUT Y X X H H H H X H X L L L L X L L A (1) X = Valid H or L Logic Diagram (Positive Logic) A B 1 3 4 C 6 Y Function Selection Table 2 LOGIC FUNCTION FIGURE 2-Input AND Gate Figure 1 2-Input OR Gate Figure 2 Y = (A • B) + C Figure 3 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 SN74LVC1G0832 www.ti.com SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 Logic Configurations Figure 1. 2-Input AND Gate Figure 2. 2-Input OR Gate Figure 3. Y = (A • B) + C Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 3 SN74LVC1G0832 SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Voltage range applied to Y output in the high-impedance or power-off state (2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range DBV package 215 DCK package 259 YZP package (1) (2) (3) (4) 4 °C/W 123 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 SN74LVC1G0832 www.ti.com SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 Recommended Operating Conditions (1) VCC Supply voltage Operating Data retention only VCC = 1.65 V to 1.95 V VIH High-level input voltage Low-level input voltage VO Output voltage IOH High-level output current MAX 5.5 1.5 0.65 × VCC 5.5 1.7 5.5 2 5.5 0.7 × VCC 5.5 VCC = 1.65 V to 1.95 V 0 0.35 × VCC VCC = 2.3 V to 2.7 V 0 VCC = 3 V to 3.6 V 0 VCC = 4.5 V to 5.5 V 0 VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VIL MIN 1.65 0 VCC = 2.3 V –8 –16 Input transition rise or fall rate TA Operating free-air temperature mA 4 8 16 VCC = 3 V mA 24 VCC = 4.5 V 32 VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 VCC = 5 V ± 0.5 V (1) V –32 VCC = 2.3 V Δt/Δv V –24 VCC = 1.65 V Low-level output current VCC –4 VCC = 4.5 V IOL V V VCC = 1.65 V VCC = 3 V UNIT ns/V 5 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 5 SN74LVC1G0832 SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 www.ti.com Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC IOH = –100 µA VOH VCC – 0.1 1.2 1.2 IOH = –8 mA 2.3 V 1.9 1.9 2.4 2.4 2.3 2.3 VI = 5.5 V or GND 3V V 1.65 V to 5.5 V 0.1 0.1 1.65 V 0.45 0.45 2.3 V 0.3 0.3 0.4 0.4 0.55 0.55 0.55 0.6 0 to 5.5 V ±5 ±5 µA IOL = 16 mA VI = 5.5 V or GND VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND Ci VI = VCC or GND 3.8 3V 4.5 V VI = 5.5 V or GND Ioff 6 UNIT IOL = 100 µA IOL = 32 mA (1) MAX 4.5 V IOL = 8 mA 3.8 TYP (1) IOH = –32 mA IOL = 24 mA II MIN VCC – 0.1 IOL = 4 mA A, B, or C inputs –40°C to 125°C MAX 1.65 V IOH = –24 mA VOL TYP (1) IOH = –4 mA IOH = –16 mA 1.65 V to 5.5 V –40°C to 85°C MIN V 0 ±10 ±10 µA 1.65 V to 5.5 V 10 10 µA 3 V to 5.5 V 500 500 µA 3.3 V 7 pF All typical values are at VCC = 3.3 V, TA = 25°C. Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 SN74LVC1G0832 www.ti.com SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 Switching Characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 4) SN74LVC1G0832 –40°C to 85°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd A, B, or C Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 3.7 14 2.4 7 1.7 5 1.2 3.4 ns Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 5) SN74LVC1G0832 –40°C to 85°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd A, B, or C Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX 2.5 17.5 1.8 7.6 1.8 5.9 1.3 4 ns Switching Characteristics over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 5) SN74LVC1G0832 –40°C to 125°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd A, B, or C Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 2.5 17.5 1.8 7.6 1.8 5.9 1.3 4.5 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP f = 10 MHz 15 15 16 18 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 UNIT pF 7 SN74LVC1G0832 SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 www.ti.com Parameter Measurement Information VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 15 pF 15 pF 15 pF 15 pF 1 MW 1 MW 1 MW 1 MW 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPLZ VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + VD VOL tPHZ VM VOH – VD VOH »0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 4. Load Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 SN74LVC1G0832 www.ti.com SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 Parameter Measurement Information (continued) VLOAD S1 RL From Output Under Test Open TEST GND CL (see Note A) S1 Open VLOAD tPLH/tPHL tPLZ/tPZL tPHZ/tPZH RL GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC £2 ns £2 ns £2.5 ns £2.5 ns VM VLOAD CL RL VD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kW 500 W 500 W 500 W 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tW tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VI VM Input VM 0V tPLH VOH Output VM VOL tPHL VM VM 0V tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH VLOAD/2 VM tPZH VOH Output VM tPZL tPHL VM VI Output Control VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS Output Waveform 2 S1 at GND (see Note B) VOL + VD VOL tPHZ VM VOH – VD VOH »0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 5. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 9 SN74LVC1G0832 SCES606D – SEPTEMBER 2004 – REVISED DECEMBER 2013 www.ti.com REVISION HISTORY Changes from Revision C (January 2007) to Revision D Page • Updated document to new TI data sheet format. ................................................................................................................. 1 • Updated Features. ................................................................................................................................................................ 1 • Added ESD warning. ............................................................................................................................................................ 2 • Updated operating temperature range. ................................................................................................................................. 5 10 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G0832 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74LVC1G0832DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CDCR SN74LVC1G0832DBVT ACTIVE SOT-23 DBV 6 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CDCR SN74LVC1G0832DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (DCJ, DCR) SN74LVC1G0832DCKT ACTIVE SC70 DCK 6 250 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (DCJ, DCR) SN74LVC1G0832YZPR ACTIVE DSBGA YZP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 DCN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74LVC1G0832DCKT 价格&库存

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SN74LVC1G0832DCKT
  •  国内价格 香港价格
  • 1+7.813301+0.99510
  • 10+6.6238010+0.84360
  • 100+4.41970100+0.56290
  • 250+4.41970250+0.56290
  • 500+4.02330500+0.51240
  • 1000+3.008701000+0.38320
  • 2500+2.950402500+0.37580
  • 5000+2.927105000+0.37280

库存:0