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SN74LVC1G17-Q1
SCES663C – MARCH 2006 – REVISED JANUARY 2020
SN74LVC1G17-Q1 Single Schmitt-Trigger Buffer
1 Features
3 Description
•
•
•
•
•
•
•
This single Schmitt-trigger buffer is designed for
1.65-V to 5.5-V VCC operation.
1
•
Qualified for Automotive Applications
Supports 5-V VCC operation
Inputs accept voltages to 5.5 V
Max tpd of 8 ns at 3.3 V
Low power consumption, 20-μA Max ICC
±24-mA Output drive at 3.3 V
Ioff Supports live insertion, partial-power-down
mode, and back-drive protection
ESD protection exceeds JEDEC JS-001
– 2000-V Human-body model
– 1000-V Charged-device model
2 Applications
•
•
•
•
•
•
•
•
•
•
•
The SN74LVC1G17-Q1 device contains one buffer
and performs the Boolean function Y = A.
The CMOS device has high output drive while
maintaining low static power dissipation over a broad
VCC operating range.
The SN74LVC1G17-Q1 is available in a variety of
packages.
Device Information(1)
DEVICE NAME
SN74LVC1G17-Q1
AV receiver
Audio dock: portable
Blu-ray player and home theater
MP3 player/recorder
Personal digital assistant (PDA)
Power: Telecom/server AC/DC supply: single
controller: analog and digital
Solid state drive (SSD): client and enterprise
TV: LCD/Digital and high-definition (HDTV)
Tablet: Enterprise
Video analytics: server
Wireless headset, keyboard, and mouse
PACKAGE
BODY SIZE (NOM)
SOT-23 (5)
2.9 mm × 1.6 mm
SC-70 (5)
2.0 mm × 1.25 mm
SON (6)
1.45 mm × 1.0 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
SN74LVC1G17-Q1
SCES663C – MARCH 2006 – REVISED JANUARY 2020
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
5
5
6
6
7
7
Absolute Maximum Ratings .....................................
ESD Ratings..............................................................
Recommended Operating Conditions ......................
Thermal Information ..................................................
Electrical Characteristics—DC Limit Changes..........
Switching Characteristics AC Limit ...........................
Operating Characteristics..........................................
Typical Characteristics ..............................................
Parameter Measurement Information .................. 8
Detailed Description .............................................. 9
8.1
8.2
8.3
8.4
9
Overview ...................................................................
Functional Block Diagram .........................................
Feature Description...................................................
Device Functional Modes..........................................
9
9
9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 11
12 Device and Documentation Support ................. 12
12.1 Trademarks ........................................................... 12
12.2 Electrostatic Discharge Caution ............................ 12
12.3 Glossary ................................................................ 12
13 Mechanical, Packaging, and Orderable
Information ........................................................... 12
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (October 2019) to Revision C
Page
•
Corrected clerical errors introduced in Revision B: Features included incorrect values ........................................................ 1
•
Changed to automotive ESD table format ............................................................................................................................. 4
•
Corrected clerical errors introduced in Revision B: Electrical Characteristics values returned to Revision A values............ 6
•
Corrected clerical errors introduced in Revision B: Switching Characteristics values returned to Revision A values ........... 6
•
Deleted inaccurate typical characteristics plot for operation across temperature. ................................................................. 7
•
Deleted unnecessary parameter measurement information for 15 pF load (unused)............................................................ 8
Changes from Revision A (April 2008) to Revision B
Page
•
Added Applications. ................................................................................................................................................................ 1
•
Added Device Information table. ............................................................................................................................................ 1
•
Removed Ordering Information table. .................................................................................................................................... 3
•
Added DRY package to graphic figures and Pin Functions table .......................................................................................... 3
•
Added Pin Functions table. .................................................................................................................................................... 3
•
Added ESD Ratings table. ..................................................................................................................................................... 4
•
Added Thermal Information table. ......................................................................................................................................... 5
•
Added Typical Characteristics. .............................................................................................................................................. 7
•
Added Detailed Description section. ...................................................................................................................................... 9
•
Added Application and Implementation section. ................................................................................................................. 10
•
Revised Image for Typical Application ................................................................................................................................. 10
•
Added Power Supply Recommendations section. .............................................................................................................. 11
•
Added Layout section. ......................................................................................................................................................... 11
•
Added Device and Documentation Support section ............................................................................................................ 12
•
Added Mechanical, Packaging, and Orderable Information section .................................................................................... 12
2
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SCES663C – MARCH 2006 – REVISED JANUARY 2020
5 Pin Configuration and Functions
DBV Package
5-Pin SOT-23
Top View
N.C.
1
A
2
GND
3
5
4
DCK Package
5-Pin SC-70
Top View
VCC
N.C.
1
A
2
GND
3
5
VCC
4
Y
Y
DRY Package
6-Pin SON
Transparent Top View
(1)
N.C.
1
6
A
2
5
N.C.
GND
3
4
Y
VCC
N.C. - No internal connection
See mechanical drawings for at the end of the data sheet for dimensions
Pin Functions
PIN
DESCRIPTION
NAME
DBV, DCK
DRY
NC
1
1, 5
A
2
2
Input
GND
3
3
Ground
Y
4
4
Output
VCC
5
6
Power terminal
Not connected
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6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCC
MIN
MAX
Supply voltage range
–0.5
6.5
UNIT
V
(2)
VI
Input voltage range
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high or low state (2) (3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
±100
mA
150
°C
Continuous current through VCC or GND
Tstg
(1)
(2)
(3)
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCC is provided in the Recommended Operating Conditions table.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
4
Electrostatic discharge
Human body model (HBM), per AEC Q100-002 (1)
HBM ESD Classification Level 2
±2000
Charged device model (CDM), per AEC Q100-011
CDM ESD Classification Level C6
±1000
UNIT
V
AEC Q100-002 indicate that HBM stressing shall be in accordrance with the ANSI/ESDA/JEDEC JS-001 specification.
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6.3 Recommended Operating Conditions (1)
VCC
Supply voltage
VI
Input voltage
VO
Output voltage
IOH
Operating
Data retention only
High-level output current
MIN
MAX
1.65
5.5
0
5.5
V
0
VCC
V
VCC = 1.65 V
–4
VCC = 2.3 V
–8
–16
VCC = 3 V
–32
4
VCC = 2.3 V
8
16
VCC = 3 V
(1)
mA
24
VCC = 4.5 V
TA
mA
–24
VCC = 1.65 V
Low-level output current
V
1.5
VCC = 4.5 V
IOL
UNIT
32
Operating free-air temperature
–40
125
°C
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
6.4 Thermal Information
SN74LVC1G17-Q1
THERMAL METRIC (1)
DBV
DCK
DRY
5 PINS
5 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
229
280
608
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
164
66
432
°C/W
RθJB
Junction-to-board thermal resistance
62
67
446
°C/W
ψJT
Junction-to-top characterization parameter
44
2
191
°C/W
ψJB
Junction-to-board characterization parameter
62
66
442
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
–
–
198
°C/W
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics—DC Limit Changes
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VT–
(Negative-going input
threshold voltage)
ΔVT
Hysteresis
(VT+ – VT–)
1.68
2.04
4.5 V
2.07
2.86
5.5 V
2.53
3.43
1.65 V
0.23
0.71
2.3 V
0.44
1.05
3V
0.77
1.35
4.5 V
1.22
2.09
5.5 V
1.73
2.52
1.65 V
0.26
0.74
2.3 V
0.33
0.92
3V
0.4
0.99
4.5 V
0.45
1.28
5.5 V
0.56
1.32
UNIT
V
V
V
VCC – 0.1
1.2
2.3 V
1.9
V
2.4
3V
2.3
IOH = –32 mA
4.5 V
IOL = 100 μA
1.65 V to
5.5 V
0.1
IOL = 4 mA
1.65 V
0.45
IOL = 8 mA
2.3 V
0.4
3.8
V
0.5
3V
IOL = 24 mA
Ioff
1
1.65 V
IOL = 16 mA
A input
MAX
1.36
IOH = –8 mA
IOH = –24 mA
TYP
3V
IOH = –4 mA
IOH = –16 mA
II
1.25
1.65 V to
5.5 V
IOH = –100 μA
VOL
MIN
0.64
2.3 V
VT+
(Positive-going input
threshold voltage)
VOH
VCC
1.65 V
0.7
IOL = 32 mA
4.5 V
0.7
VI = 5.5 V or GND
0 to
5.5 V
±10
μA
VI or VO = 5.5 V
IO = 0
0
±25
μA
1.65 V to
5.5 V
20
μA
500
μA
ICC
VI = 5.5 V or GND,
ΔICC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
3 V to
5.5 V
CI
VI = VCC or GND
3.3 V
4.5
pF
6.6 Switching Characteristics AC Limit
over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2)
–40°C TO 125°C
6
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tpd
A
Y
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
2.8
14
1
9
1.5
8
0.7
7
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6.7 Operating Characteristics
TA = 25°C
PARAMETER
Cpd
Power dissipation capacitance
TEST
CONDITIONS
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 5 V
TYP
TYP
TYP
TYP
f = 10 MHz
20
21
22
26
UNIT
pF
6.8 Typical Characteristics
8
TPD
7
6
TPD - ns
5
4
3
2
1
0
0
1
2
3
Vcc - V
4
5
6
D002
Figure 1. Across Vcc at 25°C
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7 Parameter Measurement Information
VLOAD
S1
RL
From Output
Under Test
Open
TEST
GND
CL
(see Note A)
S1
Open
VLOAD
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
RL
GND
LOAD CIRCUIT
INPUTS
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
VI
tr/tf
VCC
VCC
3V
VCC
£2 ns
£2 ns
£2.5 ns
£2.5 ns
VM
VLOAD
CL
RL
VD
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6V
2 × VCC
30 pF
30 pF
50 pF
50 pF
1 kW
500 W
500 W
500 W
0.15 V
0.15 V
0.3 V
0.3 V
VI
Timing Input
VM
0V
tW
tsu
VI
Input
VM
VM
th
VI
Data Input
VM
VM
0V
0V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VM
Input
VM
0V
tPLH
VOH
VM
VOL
tPHL
tPLZ
VLOAD/2
VM
tPZH
VM
VM
VM
0V
Output
Waveform 1
S1 at VLOAD
(see Note B)
tPLH
VOH
Output
VM
tPZL
tPHL
VM
Output
VI
Output
Control
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Waveform 2
S1 at GND
(see Note B)
VOL + VD
VOL
tPHZ
VM
VOH – VD
VOH
»0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
8
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8 Detailed Description
8.1 Overview
The SN74LVC1G17-Q1 device contains one Schmitt trigger buffer and performs the Boolean function Y = A. The
device functions as an independent buffer, but because of Schmitt action, it will have different input threshold
levels for a positive-going (VT+) and negative-going (VT-) signals .
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
8.2 Functional Block Diagram
8.3 Feature Description
•
•
•
•
Wide operating voltage range.
– Operates From 1.65 V to 5.5 V.
Allows Down voltage translation.
Inputs accept voltages to 5.5 V.
Ioff feature allows voltages on the inputs and outputs, when VCC is 0 V.
8.4 Device Functional Modes
Table 1. Function Table
INPUT
A
OUTPUT
Y
H
H
L
L
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The SN74LVC1G17-Q1 is a high-drive CMOS device that can be used for a multitude of buffer type functions
where the input is slow or noisy. It can produce 24 mA of drive current at 3.3 V making it Ideal for driving multiple
outputs and good for high speed applications up to 100 MHz. The inputs are 5.5 V tolerant allowing it to translate
down to VCC.
9.2 Typical Application
RF
~2.2 MΩ
SN74LVC1G17-Q1
U
RS
C
50 pF
~1 kΩ
C1
~32 pF
CL
16 pF
C2
~32 pF
Figure 3. SN74LVC1G17-Q1 Typical Application
9.2.1 Design Requirements
This device uses CMOS technology and has balanced output drive. Care should be taken to avoid bus
contention because it can drive currents that would exceed maximum limits. The high drive will also create fast
edges into light loads so routing and load conditions should be considered to prevent ringing.
9.2.2 Detailed Design Procedure
1. Recommended Input Conditions
– Rise time and fall time specs. See (Δt/ΔV) in the
– Recommended Operating Conditions table.
– Specified high and low levels. See (VIH and VIL) in the
– Recommended Operating Conditions table.
– Inputs are overvoltage tolerant allowing them to go as high as (VI max) in the
– Recommended Operating Conditions table at any valid VCC .
2. Recommend Output Conditions
– Load currents should not exceed (IO max) per output and should not exceed (continuous current through
VCC or GND) total current for the part. These limits are located in the
– Absolute Max Ratings table.
– Outputs should not be pulled above VCC.
10
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Typical Application (continued)
9.2.3 Application Curves
10
Icc
Icc
Icc
Icc
9
8
1.8V
2.5V
3.3V
5V
Icc - mA
7
6
5
4
3
2
1
0
0
20
40
Frequency - MHz
60
80
D003
Figure 4. ICC vs Frequency
10 Power Supply Recommendations
The power supply can be any voltage between the min and max supply voltage rating located in the
Recommended Operating Conditions table.
Each Vcc pin should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply a 0.1-μF capacitor is recommended and if there are multiple Vcc pins then a 0.01-μF or 0.022-μF
capacitor is recommended for each power pin. It is ok to parallel multiple bypass caps to reject different
frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be
installed as close to the power pin as possible for best results.
11 Layout
11.1 Layout Guidelines
When using multiple bit logic devices inputs should not ever float. In many cases, functions or parts of functions
of digital logic devices are unused, for example, when only two inputs of a triple-input AND gate are used or only
3 of the 4 buffer gates are used. Such input terminals should not be left unconnected because the undefined
voltages at the outside connections result in undefined operational states. Specified below are the rules that must
be observed under all circumstances. All unused inputs of digital logic devices must be connected to a high or
low bias to prevent them from floating. The logic level that should be applied to any particular unused input
depends on the function of the device. Generally they will be tied to Gnd or Vcc whichever make more sense or
is more convenient.
11.2 Layout Example
VCC
Unused Input
Input
Output
Unused Input
Output
Input
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12 Device and Documentation Support
12.1 Trademarks
All trademarks are the property of their respective owners.
12.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
12
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PACKAGE OPTION ADDENDUM
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20-Aug-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
SN74LVC1G17QDBVRQ1
ACTIVE
SOT-23
DBV
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
C17O
Samples
SN74LVC1G17QDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 125
(C7J, C7O)
Samples
SN74LVC1G17QDRYRQ1
ACTIVE
SON
DRY
6
5000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
HM
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of