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SN74LVC1G58DBVR

SN74LVC1G58DBVR

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOT23-6

  • 描述:

    IC MULT-FUNCTION GATE SOT23-6

  • 数据手册
  • 价格&库存
SN74LVC1G58DBVR 数据手册
SN74LVC1G58 www.ti.com SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 Configurable Multiple-Function Gate Check for Samples: SN74LVC1G58 FEATURES DESCRIPTION • This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • • • • • Available in the Texas Instruments NanoFree™ Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Supports Down Translation to VCC Max tpd of 6.3 ns at 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive at 3.3 V Ioff Supports Live Insertion, Partial-PowerDown Mode, and Back-Drive Protection Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) DBV PACKAGE (TOP VIEW) In1 1 6 The SN74LVC1G58 device features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XOR, inverter, and noninverter. All inputs can be connected to VCC or GND. This device functions as an independent gate, but because of Schmitt action, it may have different input threshold levels for positive-going (VT+) and negativegoing (VT–) signals. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. DRL PACKAGE (TOP VIEW) DCK PACKAGE (TOP VIEW) In1 In2 GND 2 5 VCC In0 3 4 Y 1 In1 In2 6 GND 2 5 VCC In0 3 4 Y GND In0 DRY PACKAGE (TOP VIEW) ln1 See mechanical drawings for dimensions. 1 6 ln2 GND 2 5 VCC ln0 3 4 Y 1 2 3 YZP PACKAGE (BOTTOM VIEW) In2 6 VCC 5 Y 4 In0 3 4 Y GND 2 5 VCC In1 1 6 In2 DSF PACKAGE (TOP VIEW) ln1 GND ln0 1 6 2 5 3 4 ln2 VCC Y 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2013, Texas Instruments Incorporated SN74LVC1G58 SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Function Table INPUTS OUTPUT In2 In1 In0 L L L Y L L L H H L H L L L H H H H L L H H L H H H H L L H H H L Logic Diagram (Positive Logic) In0 3 4 In1 In2 1 Y 6 Function Selection Table LOGIC FUNCTION 2-input AND with inverted input FIGURE NO. Figure 2, Figure 3 2-input NAND Figure 1 2-input NAND with both inputs inverted Figure 4 2-input OR Figure 4 2-input OR with both inputs inverted 2-input NOR with inverted input Figure 1 Figure 2, Figure 3 2-input XOR 2 Figure 5 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 SN74LVC1G58 www.ti.com SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 Logic Configurations VCC A Y B A VCC A Y B A Y B 1 6 2 5 3 4 A B A Y Y B Figure 1. 2-Input NAND Gate 1 6 2 5 3 4 B Y Figure 2. 2-Input AND Gate With Inverted A Input VCC VCC A A Y B A B Y Y B A 1 6 2 5 3 4 B A Y A B Y Figure 3. 2-Input AND Gate With Inverted B Input 1 6 2 5 3 4 B Y Figure 4. 2-Input OR Gate VCC A Y B A 1 6 2 5 3 4 B Y Figure 5. 2-Input XOR Gate Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 3 SN74LVC1G58 SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 www.ti.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 6.5 V VI Input voltage range (2) –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Package thermal impedance (4) Tstg Storage temperature range DBV package 165 DCK package 259 DRL package 142 YZP package (1) (2) (3) (4) °C/W 123 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage VI Input voltage VO Output voltage IOH High-level output current Operating Data retention only MIN MAX 1.65 5.5 1.5 5.5 V 0 VCC V VCC = 1.65 V –4 VCC = 2.3 V –8 –16 VCC = 3 V –32 4 VCC = 2.3 V 8 16 VCC = 3 V (1) 4 Operating free-air temperature mA 24 VCC = 4.5 V TA mA –24 VCC = 1.65 V Low-level output current V 0 VCC = 4.5 V IOL UNIT 32 –40 125 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 SN74LVC1G58 www.ti.com SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC VT+ Positive-going input threshold voltage VT– Negative-going input threshold voltage ΔVT Hysteresis (VT+ – VT–) VOH (1) MAX 1.16 0.79 1.16 1.11 1.56 1.11 1.56 3V 1.5 1.87 1.5 1.87 4.5 V 2.16 2.74 2.16 2.74 5.5 V 2.61 3.33 2.61 3.33 1.65 V 0.35 0.62 0.35 0.62 2.3 V 0.58 0.87 0.58 0.87 3V 0.84 1.19 0.84 1.19 4.5 V 1.41 1.9 1.41 1.9 5.5 V 1.87 2.29 1.87 2.29 1.65 V 0.3 0.62 0.3 0.62 2.3 V 0.4 0.8 0.4 0.8 3V 0.53 0.87 0.53 0.87 4.5 V 0.71 1.04 0.71 1.04 0.71 1.11 0.71 1.11 VCC – 0.1 VCC – 0.1 1.65 V 1.2 1.2 2.3 V 1.9 1.9 2.4 2.4 2.3 2.3 IOH = –16 mA TYP (1) 0.79 IOH = –8 mA 3V 4.5 V IOL = 100 µA 1.65 V to 5.5 V 0.1 0.1 IOL = 4 mA 1.65 V 0.45 0.45 IOL = 8 mA 2.3 V 0.3 0.3 0.4 0.45 0.55 0.55 0.55 0.58 IOL = 16 mA II VI = 5.5 V or GND Ioff VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 3.8 4.5 V VI = VCC or GND V V V 3.8 3V One input at VCC – 0.6 V, Other inputs at VCC or GND UNIT V IOH = –32 mA IOL = 32 mA Ci MIN IOH = –4 mA IOL = 24 mA ΔICC –40°C to 125°C MAX 2.3 V 1.65 V to 5.5 V IOH = –24 mA VOL TYP (1) 1.65 V 5.5 V IOH = –100 µA –40°C to 85°C MIN V 0 to 5.5 V ±1 ±1 µA 0 ±10 ±10 µA 1.65 V to 5.5 V 10 10 µA 3 V to 5.5 V 500 500 µA 3.3 V 3.5 pF All typical values are at VCC = 3.3 V, TA = 25°C. Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 5 SN74LVC1G58 SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 www.ti.com Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 6) SN74LVC1G58 –40°C to 85°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd Any In Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 3.2 14.4 2 8.3 1.5 6.3 1.1 5.1 UNIT ns Switching Characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 6) SN74LVC1G58 –40°C to 125°C PARAMETER FROM (INPUT) TO (OUTPUT) tpd Any In Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 3.2 16.4 2 9.3 1.5 7.3 1.1 6.1 UNIT ns Operating Characteristics TA = 25°C PARAMETER Cpd 6 Power dissipation capacitance TEST CONDITIONS VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP f = 10 MHz 22 22 23 24 Submit Documentation Feedback UNIT pF Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 SN74LVC1G58 www.ti.com SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 Parameter Measurement Information VLOAD S1 RL From Output Under Test CL (see Note A) Open GND RL TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open VLOAD GND LOAD CIRCUIT INPUTS VCC 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VI tr/tf VCC VCC 3V VCC ≤2 ns ≤2 ns ≤2.5 ns ≤2.5 ns VM VLOAD CL RL V∆ VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu VI Input VM VM th VI Data Input VM VM 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V VOH VM Output VM VOL VM 0V VLOAD/2 VM tPZH VOH Output VM tPLZ Output Waveform 1 S1 at VLOAD (see Note B) tPLH tPHL VM tPZL tPHL tPLH VI Output Control VM VOL VOL tPHZ Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + V∆ VM VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 6. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 7 SN74LVC1G58 SCES415N – NOVEMBER 2002 – REVISED DECEMBER 2013 www.ti.com REVISION HISTORY Changes from Revision K (January 2007) to Revision L Page • Added additional package options in the Ordering Information table. .................................................................................. 1 • Added DRY and DSF packages to datasheet. ..................................................................................................................... 1 Changes from Revision L (October 2011) to Revision M • Page Removed Ordering Information table, package updates now included in Package Ordering Addendum. .......................... 1 Changes from Revision M (April 2013) to Revision N Page • Updated document to new TI data sheet format. ................................................................................................................. 1 • Updated Features. ................................................................................................................................................................ 1 • Added ESD warning. ............................................................................................................................................................ 2 • Updated operating temperature range. ................................................................................................................................. 4 8 Submit Documentation Feedback Copyright © 2002–2013, Texas Instruments Incorporated Product Folder Links: SN74LVC1G58 PACKAGE OPTION ADDENDUM www.ti.com 2-Aug-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) SN74LVC1G58DBVR ACTIVE SOT-23 DBV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 (C585, C58R) Samples SN74LVC1G58DCKR ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU | SN Level-1-260C-UNLIM -40 to 125 (CP5, CPF, CPK, CP R) Samples SN74LVC1G58DCKRE4 ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CPF Samples SN74LVC1G58DCKRG4 ACTIVE SC70 DCK 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CPF Samples SN74LVC1G58DRLR ACTIVE SOT-5X3 DRL 6 4000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 (1K3, CP7, CPR) Samples SN74LVC1G58DRY2 ACTIVE SON DRY 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CP Samples SN74LVC1G58DRYR ACTIVE SON DRY 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CP Samples SN74LVC1G58DSF2 ACTIVE SON DSF 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CP Samples SN74LVC1G58DSFR ACTIVE SON DSF 6 5000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 CP Samples SN74LVC1G58YZPR ACTIVE DSBGA YZP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 CPN Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
SN74LVC1G58DBVR 价格&库存

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SN74LVC1G58DBVR
    •  国内价格
    • 1+0.58600

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