TLV3601, TLV3602, TLV3603, TLV3603E
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
TLV360x 具有 2.5ns 传播延迟的 325MHz 高速比较器
1 特性
3 说明
快速传播延迟：2.5 ns
低过驱动分散：600 ps
高切换频率：325 MHz
窄脉宽检测功能：1.25ns
推挽式输出
宽电源电压范围：2.4 V 至 5.5 V
输入共模范围超出两个电源轨 200 mV
低输入失调电压：±5mV
输出端已知启动条件
TLV3603(E) 具体特性：
– 可调迟滞控制引脚
– 锁存功能
• TLV3603E 工作温度范围更宽
– -55°C 至 125°C
• 封装：TLV3601 (SC70-5)、(SOT23-5)，
TLV3603(E) (SC70-6)，
TLV360x 是一款 325MHz 高速比较器，具有轨到轨输
入和 2.5ns 的传播延迟。这两款比较器可快速响应，并
具有宽工作电压范围，非常适合激光雷达、测距仪和线
路接收器中的窄信号脉冲检测和数据与时钟恢复应用。
•
•
•
•
•
•
•
•
•
•
与替代高速差分输出比较器相比，TLV360x 系列的推
挽（单端）输出可以简化 I/O 接口的板对板布线并节省
相关成本，同时能够降低功耗。它们可以直接连接下游
电路中的大多数现行数字控制器和 IO 扩展器。
TLV3601 采用 5 引脚 SC70 和 SOT23 封装，因此非
常适合空间受限的设备，这些设备可从比较器的快速响
应时间中受益。TLV3603(E) 采用 6 引脚 SC70 封装，
速度和尺寸与 TLV3601 相同，同时提供可调迟滞控制
和锁存功能等附加特性。TLV3602 是 TLV3601 的双通
道版本，采用 8 引脚 VSSOP 和 WSON 封装。
器件信息
TLV3602 (VSSOP-8)、(WSON-8)
• 功能安全型
– 可提供用于功能安全系统设计的文档
[TLV3601/2]
– 可提供用于功能安全系统设计的文档 [TLV3603]
2 应用
•
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•
•
TLV3601
TLV3603(E)
TLV3602
激光测距仪
时钟和数据恢复
示波器和逻辑分析仪中的高速触发器功能
激光雷达中的距离感测
无人机视觉
高速差分线路接收器
封装 (1)
器件型号
封装尺寸（标称值）
SC70 (5)
1.25mm x 2.00mm
SOT-23 (5)
2.90mm x 1.60mm
SC70 (6)
1.25mm x 2.00mm
VSSOP (8)
3.00mm x 3.00mm
WSON (8)（预发
2.00mm x 2.00mm
布）
(1)
如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
TLV3601
(TLV3602 per Channel)
VCC
TLV3603
V+
+
+
OPA858
+
OUT
OUT
TLV3603
+
TDC
–
LE/HYST
–
VEE
LE/HYST
VEE
功能方框图
VBIAS
VREF
TLV3603 应用电路
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
Table of Contents
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................5
6.4 Thermal Information....................................................6
6.5 Electrical Characteristics.............................................7
6.6 Timing Diagrams ........................................................ 9
6.7 Typical Characteristics.............................................. 11
7 Detailed Description......................................................19
7.1 Overview................................................................... 19
7.2 Functional Block Diagram......................................... 19
7.3 Feature Description...................................................19
7.4 Device Functional Modes..........................................19
8 Application and Implementation.................................. 21
8.1 Application Information............................................. 21
8.2 Typical Application.................................................... 22
9 Power Supply Recommendations................................26
10 Layout...........................................................................27
10.1 Layout Guidelines................................................... 27
10.2 Layout Example...................................................... 27
11 Device and Documentation Support..........................28
11.1 Device Support........................................................28
11.2 接收文档更新通知................................................... 28
11.3 支持资源..................................................................28
11.4 Trademarks............................................................. 28
11.5 静电放电警告...........................................................28
11.6 术语表..................................................................... 28
12 Mechanical, Packaging, and Orderable
Information.................................................................... 28
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision D (November 2022) to Revision E (March 2023)
Page
• 通篇添加了 TLV3603E........................................................................................................................................1
Changes from Revision C (July 2022) to Revision D (November 2022)
Page
• 删除了 TLV3602 VSSOP 封装的“预发布”状态............................................................................................... 1
Changes from Revision B (November 2021) to Revision C (July 2022)
Page
• 为 TLV3602 添加了 VSSOP 和 WSON 封装选项（处于“预发布”状态）........................................................1
• 删除了 TLV3601 SOT-23 封装的“预发布”状态............................................................................................... 1
Changes from Revision A (August 2021) to Revision B (November 2021)
Page
• 从 TLV3603 中删除了“预发布”....................................................................................................................... 1
• 添加了 TLV3601 的 DBV 封装预发布选项.......................................................................................................... 1
• Added typical performance curves....................................................................................................................11
Changes from Revision * (June 2021) to Revision A (August 2021)
Page
• 量产数据发布...................................................................................................................................................... 1
2
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Product Folder Links: TLV3601 TLV3602 TLV3603 TLV3603E
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
5 Pin Configuration and Functions
1
VEE
2
IN+
3
5
VCC
4
IN-
+
OUT
图 5-1. DCK, DBV Package
5-Pin SC70, SOT-23
Top View
1
6
VCC
VEE
2
5
LE/HYS
IN+
3
4
IN-
+
OUT
图 5-2. DCK Package
6-Pin SC70
Top View
表 5-1. Pin Functions
PIN
NAME
I/O
DESCRIPTION
TLV3601
TLV3603(E)
IN+
3
3
I
Non-inverting input
IN–
4
4
I
Inverting input
OUT
1
1
O
Output
(Push-pull)
VEE
2
2
I
Negative power supply
VCC
5
6
I
Positive power supply
LE/HYS
-
5
I
Adjustable hysteresis control and latch
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Product Folder Links: TLV3601 TLV3602 TLV3603 TLV3603E
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
IN1+
1
8
V+
IN1–
2
7
OUT1
IN2–
3
6
OUT2
IN2+
4
5
V-
图 5-3. TLV3602 DGK, DSG Packages
8-Pin VSSOP, WSON
表 5-2. Pin Functions: TLV3602 (Dual)
PIN
NAME
NO.
DESCRIPTION
IN1+
1
I
Noninverting input, channel 1
IN1–
2
I
Inverting input, channel 1
IN2–
3
I
Inverting input, channel 2
IN2+
4
I
Noninverting input, channel 2
OUT1
7
O
Output, channel 1
OUT2
6
O
Output, channel 2
V-
5
P
Negative (lowest) supply or ground
V+
8
P
Positive (highest) supply
-
Connect directly to V- pin
Thermal PAD
4
I/O
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Product Folder Links: TLV3601 TLV3602 TLV3603 TLV3603E
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Input Supply Voltage: VCC – VEE
Input Voltage (IN+,
IN–)(2)
Differential Input Voltage (VDI = IN+ – IN–)
MIN
MAX
–0.3
6
UNIT
V
VEE – 0.3
VCC + 0.3
V
–(VCC – VEE + 0.3) + (VCC –VEE + 0.3)
V
V
Output Voltage (OUT)(3)
VEE – 0.3
VCC + 0.3
Latch and Hysteresis Control (LE/HYS)
VEE – 0.3
VCC + 0.3
V
Current into Input pins (IN+, IN–, LE/HYS)(2)
±10
mA
Current into Output pins (OUT)(3)
±50
mA
150
°C
150
°C
Junction temperature, TJ
Storage temperature, Tstg
(1)
(2)
(3)
–65
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must
be current-limited to 10 mA or less.
Output terminals are diode-clamped to the power-supply rails. Output signals that can swing more than 0.3 V beyond the supply rails
must be current-limited to 50 mA or less.
6.2 ESD Ratings
VALUE
UNIT
TLV3601(DCK), TLV3603
Electrostatic
discharge
V(ESD)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per ANSI/ESDA/JEDEC
±2000
JS-002(2)
±1000
V
TLV3601(DBV)
Electrostatic
discharge
V(ESD)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001((1))
±2000
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002((2))
±750
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001((1))
±2000
V
TLV3602
V(ESD)
(1)
(2)
Electrostatic
discharge
Charged-device model (CDM), per ANSI/ESDA/JEDEC
JS-002((2))
±1000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
2.4
5.5
V
Input Voltage Range (IN+, IN–)
VEE – 0.3
VCC + 0.3
V
Latch and Hysteresis Control (LE/HYS)
VEE – 0.3
VCC + 0.3
V
Ambient temperature, TA
–40
125
°C
Ambient temperature, TA (TLV3603E)
–55
125
°C
Input Supply Voltage: VCC – VEE
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: TLV3601 TLV3602 TLV3603 TLV3603E
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6.4 Thermal Information
TLV3601
TLV3601
TLV3602
TLV3602
TLV3603 (E)
DBV (SOT-23)
DCK (SC70)
DGK (VSSOP)
DSG (WSON)
DCK (SC70)
5 PINS
5 PINS
8 PINS
8 PINS
6 PINS
176.5
187.5
170.5
64.9
165.1
°C/W
Junction-to-case (top) thermal resistance
74.7
139.2
61.7
83.9
129.1
°C/W
Junction-to-case (bottom) thermal
resistance
N/A
N/A
N/A
5.5
N/A
°C/W
43.4
65.8
92.4
32.0
58.9
°C/W
THERMAL METRIC
RθJA Junction-to-ambient thermal resistance
Rθ
JC(top
UNIT
)
Rθ
JC(bot
tom)
RθJB Junction-to-board thermal resistance
6
ψJT
Junction-to-top characterization
parameter
16.7
43.0
8.9
2.1
39.4
°C/W
ψJB
Junction-to-board characterization
parameter
43.1
65.5
90.8
32.0
58.7
°C/W
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Product Folder Links: TLV3601 TLV3602 TLV3603 TLV3603E
English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6.5 Electrical Characteristics
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC Input Characteristics
VIO
Input offset voltage
TA = –40°C to +125℃
–5
±0.5
5
mV
VIO (TLV3603E)
Input offset voltage
TA = –55°C to +125℃
–10
±0.5
10
mV
dVIO/dT
Input offset voltage drift
VCM
Input common mode voltage
range
TA = –40℃ to +125℃
VEE – 0.2
VCC + 0.2
V
VCM (TLV3603E)
Input common mode voltage
range
TA = –55℃ to +125℃
VEE – 0.2
VCC + 0.2
V
VHYST (TLV3601/2)
Input hysteresis voltage
TA = –40℃ to +125℃
1.5
CIN
Input capacitance
RDM
Input differential mode resistance
RCM
Input common mode resistance
IB
Input bias current
TA = –40℃ to +125℃
1
5
uA
IB (TLV3603E)
Input bias current
TA = –55℃ to +125℃
1
5
uA
IOS
Input offset current
CMRR
Common-mode rejection ratio
PSRR
Power-supply rejection ratio
±3.0
3
μV/°C
5(1)
mV
1
pF
67
kΩ
5
MΩ
±0.03
uA
VCM = VEE – 0.2V to VCC + 0.2V
80
dB
VCC = 2.4 to 5.5V
80
dB
60
DC Output Characteristics
VOH
Output high voltage from VCC
ISOURCE = 1 mA
TA = –40℃ to +125℃
VOH (TLV3603E)
Output high voltage from VCC
ISOURCE = 1 mA
TA = –55℃ to +125℃
VOL
Output low voltage from VEE
ISINK = 1 mA
TA = –40℃ to +125℃
VOL (TLV3603E)
Output low voltage from VEE
ISINK = 1 mA
TA = –55℃ to +125℃
ISC_SOURCE
Output Short-Circuit Current Source
TA = –40℃ to +125℃
10
30
mA
ISC_SOURCE (TLV360 Output Short-Circuit Current 3E)
Source
TA = –55℃ to +125℃
10
30
mA
Output Short-Circuit Current Sink
TA = –40℃ to +125℃
10
30
mA
ISC_SINK (TLV3603E Output Short-Circuit Current )
Sink
TA = –55℃ to +125℃
10
30
mA
ISC_SINK
80
mV
80
mV
60
80
mV
60
80
mV
60
Power Supply
ICC (TLV3601)
quiescent current
Output being high
TA = –40℃ to +125℃
4.9
7
mA
ICC (TLV3602)
quiescent current per channel
Output being high
TA = –40℃ to +125℃
4.9
7
mA
ICC (TLV3603)
quiescent current
Output being high
TA = –40℃ to +125℃
5.7
7.8
mA
ICC (TLV3603E)
quiescent current
Output being high
TA = –55℃ to +125℃
5.7
7.8
mA
VPOR (postive)
Power-On Reset Voltage
2.1
V
AC Characteristics
3.5(1)
ns
Propagation delay
VOVERDRIVE = VUNDERDRIVE = 50mV
TA = –40℃ to +125℃
4.5(1)
ns
tPD (TLV3603E)
Propagation delay
VOVERDRIVE = VUNDERDRIVE = 50mV
TA = –55℃ to +125℃
4.5((1))
ns
ΔtPD (TLV3602
only)
Channel-to-channel propagation
delay skew((2))
VCM = VCC/2, VOVERDRIVE = VUNDERDRIVE =
50mV, 50 MHz Squarewave
tPD
Propagation delay
VOVERDRIVE = VUNDERDRIVE = 50mV
tPD
Copyright © 2023 Texas Instruments Incorporated
2.5
24
ps
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English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6.5 Electrical Characteristics (continued)
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
8
TEST CONDITIONS
tCM_DISPERSION
Common dispersion
VCM varied from VEE to VCC
tOD_DISPERSION
Overdrive dispersion
tUD_DISPERSION
Underdrive dispersion
tR
tF
MIN
TYP
MAX
UNIT
80
ps
Overdrive varied from 10 mV to 125 mV
600
ps
Underdrive varied from 10mV to 125 mV
330
ps
Rise time
10% to 90%
0.75
ns
Fall time
90% to 10%
0.75
ns
tJITTER
RMS Jitter
VIN = 100mVP-P,
fIN = 100MHz, Jitter BW = 10Hz – 50MHz
4
ps
fTOGGLE
Input toggle frequency
VIN = 200 mVPP Sine Wave,
When output high reaches 90% of VCC - VEE
or output low reaches 10% of VCC - VEE
325
MHz
PulseWidth
Minimum allowed input pulse
width
VOVERDRIVE = VUNDERDRIVE = 50mV
PWOUT = 90% of PWIN
1.25
ns
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English Data Sheet: SNOSDB1
TLV3601, TLV3602, TLV3603, TLV3603E
www.ti.com.cn
ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6.5 Electrical Characteristics (continued)
VCC = 2.5, 3.3 and 5 V, VEE = 0 V, VCM = VEE + 300 mV, CL = 5 pF probe capacitance, typical at TA = 25°C (unless otherwise
noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Latching/Adjustable Hysteresis
VHYST
Input hysteresis voltage
VHYST = Logic High
0
mV
VHYST
Input hysteresis voltage
RHYST = Floating
3
mV
VHYST
Input hysteresis voltage
RHYST = 150 kΩ
30
mV
VHYST
Input hysteresis voltage
RHYST = 56 kΩ
60
mV
VIH_LE
LE pin input high level
TA = –40℃ to +125℃
VEE + 1.5
V
VIH_LE (TLV3603E)
LE pin input high level
TA = –55℃ to +125℃
VEE + 1.5
V
VIL_LE
LE pin input low level
TA = –40℃ to +125℃
VEE + 0.35
V
VIL_LE (TLV3603E)
LE pin input low level
TA = –55℃ to +125℃
VEE + 0.35
V
IIH_LE
LE pin input leakage current
VLE = VCC
TA = –40℃ to +125℃
15
uA
IIH_LE (TLV3603E)
LE pin input leakage current
VLE = VCC
TA = –55℃ to +125℃
15
uA
IIL_LE
LE pin input leakage current
VLE = VEE,
TA = –40℃ to +125℃
40
uA
IIL_LE (TLV3603E)
LE pin input leakage current
VLE = VEE,
TA = –55℃ to +125℃
40
uA
tSETUP
Latch setup time
tHOLD
Latch hold time
tPL
Latch to OUT delay
(1)
(2)
–1.4
ns
7.2
ns
7
ns
Ensured by characterization
Differential propagation delay is defined as the larger of the two:
ΔtPDLH = tPDLH(MAX) – tPDLH(MIN)
ΔtPDHL = tPDHL(MAX) – tPDHL(MIN)
where (MAX) and (MIN) denote the maximum and minimum values
of a given measurement across the different comparator channels.
6.6 Timing Diagrams
VOVERDRIVE
VUNDERDRIVE
INVUNDERDRIVE
VOVERDRIVE
IN+
tPLH
tPHL
tR
tF
90%
50%
10%
VOUT
图 6-1. General Timing Diagram
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ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
VOD = 125mV
VOD = 10mV
ININ+
DISPERSION
VOUT
图 6-2. Overdrive Dispersion
10
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ZHCSKO5E – JUNE 2021 – REVISED APRIL 2023
6.7 Typical Characteristics
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
2
3.2
3.1
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.5
0.5
0
-0.5
3
2.9
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-1
-1.5
-40
For 33 units
-25
-10
5
20 35 50 65
Temperature (C)
80
95
2.8
-40
110 125
-25
-10
5
20 35 50 65
Temperature (C)
80
95
110 125
图 6-4. TLV3601 Hysteresis vs. Temperature
图 6-3. TLV3601 Offset vs. Temperature
1.8
Input Offset Voltage (mV)
1.4
1
0.6
0.2
-0.2
-0.6
-1
-0.2
For 33 units
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
图 6-6. TLV3601 Hysteresis vs. Common-Mode, 2.5 V
图 6-5. TLV3601 Offset vs. Common-Mode, 2.5 V
5
1.8
4.5
4
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.4
0.6
0.2
-0.2
3.5
3
2.5
2
1.5
-40C
25C
85C
125C
1
-0.6
-1
-0.2
0.5
For 33 units
0.3
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
图 6-7. TLV3601 Offset vs. Common-Mode, 3.3 V
3.3
0
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
Input Common Mode Voltage (V)
3.3
图 6-8. TLV3601 Hysteresis vs. Common-Mode, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
5
1.8
4.5
4
1
Hysteresis (mV)
Input Offset Voltage (mV)
1.4
0.6
0.2
-0.2
3
2.5
2
1.5
-40C
25C
85C
125C
1
-0.6
0.5
-1
-0.2 0.3
For 33 units
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
0
-0.2
4.8 5.2
2
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common Mode Voltage (V)
4.3
4.8 5.2
40
38
1.5
36
Hysteresis (mV)
1
0.5
0
34
32
30
28
-0.5
VCC = 2.5V
VCC = 3.3V
VCC = 5V
26
-1
-1.5
-40
0.3
图 6-10. TLV3601 Hysteresis vs. Common-Mode, 5 V
图 6-9. TLV3601 Offset vs. Common-Mode, 5 V
Input Offset Voltage (mV)
3.5
24
-40
For 33 units
-25
-10
5
20 35 50 65
Temperature (C)
80
95
-25
110 125
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
图 6-12. TLV3603 Hysteresis vs. Temperature
1.8
40
1.4
38
0.6
0.2
-0.2
For 33 units
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
图 6-13. TLV3603 Offset vs. Common-Mode, 2.5 V
12
34
32
30
28
-0.6
-1
-0.2
-40C
25C
85C
125C
36
1
Hysteresis (mV)
Input Offset Voltage (mV)
图 6-11. TLV3603 Offset vs. Temperature
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24
-0.2
0.1
0.4 0.7
1
1.3 1.6 1.9 2.2
Input Common-Mode Voltage (V)
2.5 2.7
图 6-14. TLV3603 Hysteresis vs. Common-Mode, 2.5 V
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6.7 Typical Characteristics (continued)
1.8
40
1.4
38
0.6
0.2
-0.2
0.3
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
30
24
-0.2
3.3
1.8
40
1.4
38
0.8
1.3
1.8
2.3
2.8
Input Common-Mode Voltage (V)
3.3
-40C
25C
85C
125C
36
1
0.6
0.2
-0.2
34
32
30
28
-0.6
-1
-0.2 0.3
0.3
图 6-16. TLV3603 Hysteresis vs. Common-Mode, 3.3 V
Hysteresis (mV)
Input Offset Voltage (mV)
32
26
For 33 units
图 6-15. TLV3603 Offset vs. Common-Mode, 3.3 V
26
For 33 units
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
24
-0.2 0.3
4.8 5.2
图 6-17. TLV3603 Offset vs. Common-Mode, 5 V
0.8
1.3 1.8 2.3 2.8 3.3 3.8
Input Common-Mode Voltage (V)
4.3
4.8 5.2
图 6-18. TLV3603 Hysteresis vs. Common-Mode, 5 V
80
80
-40C
25C
85C
125C
70
60
50
40
30
60
50
40
30
20
20
10
10
0
-40C
25C
85C
125C
70
VHYST (mV)
VHYST (mV)
34
28
-0.6
-1
-0.2
-40C
25C
85C
125C
36
1
Hysteresis (mV)
Input Offset Voltage (mV)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
0
0
200
400
600
RHYST (k)
800
图 6-19. TLV3603 Hysteresis vs. Resistance, 2.5 V
1,000
0
200
400
600
RHYST (k)
800
1,000
图 6-20. TLV3603 Hysteresis vs. Resistance, 3.3 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
80
-40C
25C
85C
125C
70
VHYST (mV)
60
50
40
30
20
10
0
0
200
400
600
RHYST (k)
800
1,000
图 6-21. TLV3603 Hysteresis vs. Resistance, 5 V
图 6-22. Bias Current vs. Input Voltage, 2.5 V
8
Input Bias Current (A)
6
4
2
0
-2
-4
-40C
25C
85C
125C
-6
-8
-0.2
0.3
0.8
1.3
1.8
2.3
Input Voltage (V)
2.8
3.3
图 6-24. Bias Current vs. Input Voltage, 5 V
图 6-23. Bias Current vs. Input Voltage, 3.3 V
Output Voltage to VCC (V)
10
1
100m
10m
1m
100
-40C
25C
85C
125C
1m
10m
Output Sourcing Current (A)
100m
图 6-25. Output Voltage vs. Output Sourcing Current, 2.5 V
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图 6-26. Output Voltage vs. Output Sinking Current, 2.5 V
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
图 6-28. Output Voltage vs. Output Sinking Current, 3.3 V
图 6-29. Output Voltage vs. Output Sourcing Current, 5 V
图 6-30. Output Voltage vs. Output Sinking Current, 5 V
5.5
5.5
5.3
5.3
5.1
4.9
-40C
25C
85C
125C
4.7
4.5
Supply Current (mA)
Supply Current (mA)
图 6-27. Output Voltage vs. Output Sourcing Current, 3.3 V
5.1
4.9
-40C
25C
85C
125C
4.7
4.5
2
2.5
3
3.5
4
4.5
Supply Voltage (V)
5
5.5
图 6-31. TLV3601 Supply Current vs. Voltage (Output Low)
2
2.5
3
3.5
4
4.5
Supply Voltage (V)
5
5.5
图 6-32. TLV3601 Supply Current vs. Voltage (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
图 6-34. TLV3601 Supply Current vs. Temp (Output High)
6.2
6.2
6
6
5.8
5.6
-40C
25C
85C
125C
5.4
Supply Current (mA)
Supply Current (mA)
图 6-33. TLV3601 Supply Current vs. Temp (Output Low)
-40C
25C
85C
125C
5.2
2
2.5
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
图 6-35. TLV3603 Supply Current vs. Voltage (Output Low)
2
6.2
6.2
6
6
5.8
5.6
5.4
5.2
-40
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-25
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
图 6-37. TLV3603 Supply Current vs. Temp (Output Low)
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2.5
3
3.5
4
Supply Voltage (V)
4.5
5
5.5
图 6-36. TLV3603 Supply Current vs. Voltage (Output High)
Supply Current (mA)
Supply Current (mA)
5.6
5.4
5.2
16
5.8
5.8
5.6
5.4
5.2
-40
VCC = 2.5V
VCC = 3.3V
VCC = 5V
-25
-10
5
20
35
50
65
Temperature (C)
80
95
110 125
图 6-38. TLV3603 Supply Current vs. Temp (Output High)
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6.7 Typical Characteristics (continued)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
20
30 40 50 70 100
200 300
Input Overdrive (mV)
Propagation Delay, High to Low (ns)
Propagation Delay, Low to High (ns)
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
500 700 1000
图 6-39. Propagation Delay, Low to High, 2.5 V
20
30 40 50 70 100
200 300
Input Overdrive (mV)
500 700 1000
图 6-40. Propagation Delay, High to Low, 2.5 V
Propagation Delay, High to Low (ns)
4.5
-40C
25C
85C
125C
4
3.5
3
2.5
2
1.5
10
20
30 40 50 70 100
200 300
Input Overdrive (mV)
500 700 1000
图 6-41. Propagation Delay, Low to High, 3.3 V
图 6-42. Propagation Delay, High to Low, 3.3 V
图 6-43. Propagation Delay, Low to High, 5 V
图 6-44. Propagation Delay, High to Low, 5 V
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6.7 Typical Characteristics (continued)
10
10
8
8
Propagation Delay (ns)
Propagation Delay (ns)
At TA = 25°C, VCC - VEE = 2.5 V to 5 V, VCM = 300 mV, RHYST = 150 kΩ (TLV3603(E) only), and input overdrive = 50 mV,
unless otherwise noted.
6
4
2
6
4
2
tPHL
tPLH
0
0
10
20
30
40
50
60
70
Output Capacitive Load (pF)
80
90
100
图 6-45. Propagation Delay vs. Load Capacitance, 3.3 V
tPHL
tPLH
0
0
10
20
30
40
50
60
70
Output Capacitive Load (pF)
80
90
100
图 6-46. Propagation Delay vs. Load Capacitance, 5 V
图 6-47. Minimum Pulse Width vs. Temperature
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7 Detailed Description
7.1 Overview
TheTLV360x family are high-speed comparators with single-ended (push-pull) output stages. The fast response
time of these comparators make them well suited for applications that require narrow pulse width detection or
high toggle frequencies. The TLV3601 is available in a 5-pin SC70 and SOT23 package, while the TLV3603(E) is
packaged in a 6-pin SC70. The TLV3602 is a dual channel version of the TLV3601 and is packaged in an 8-pin
VSSOP and WSON package.
7.2 Functional Block Diagram
TLV3601
TLV3603
VCC
VCC
+
+
LE/HYST
VEE
VEE
7.3 Feature Description
The TLV3601,TLV3603(E), and TLV3602 are single and dual channel, high speed comparators with a typical
propagation delay of 2.5 ns and push-pull outputs. The minimum pulse width detection capability is 1.25 ns and
the typical toggle rate is 325 MHz. These comparators are well-suited for distance measurement applications
that utilize a time-of-flight arechitecture as well as systems that suffer from capacitive loading and require data
and clock recovery. In addition to their high speed, the TLV360x family offers rail-to-rail input stages capable of
operating up to 200 mV beyond each power supply rail combined with a maximum 5 mV input offset. The
TLV3603(E) also provides adjustable hysteresis via an external resistor for noise suppression or a latching mode
to hold the output of the comparators.
7.4 Device Functional Modes
The TLV3601 has a single functional mode and is active when the power supply voltage is greater than 2.4V.
The TLV3603(E) has two modes of operation. The first is an active mode where the output reflects the condition
at the inputs when an external resistor is connected to ground on the LE/HYS pin. The second is a latch mode
where the output is held at its last active state when the LE/HYS pin is pulled low. The TLV3603(E) returns to
active mode after a short delay when the pin is pulled high.
7.4.1 Inputs
The TLV360x family features input stages capable of operating 200 mV below negative power supply (ground)
and 200 mV beyond the positive supply voltage, allowing for zero cross detection and maximizing input dynamic
range given a certain power supply. The input stages are protected from conditions where the voltage on either
pin exceeds this level by internal ESD protection diodes to VCC and VEE. To avoid damaging the inputs when
exceeding the recommended input voltage range, an external resistor should be used to limit the current.
7.4.2 Push-Pull (Single-Ended) Output
The TLV360x outputs have excellent drive capability and are designed to connect directly to CMOS logic input
devices. Likewise, the comparator output stages can drive capacitive loads. Transient performance parameters
in the Electrical Characteristics Tables and Typical Characteristics section are for a load of 5pF, corresponding to
a standard CMOS load. Device performance for larger capacitive loads can be found in the typical performance
curves titled Propagation Delay vs Capacitive Load. For optimal speed and performance, output load
capacitance should be reduced as much as possible.
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7.4.3 Known Startup Condition
The TLV360x have a Power-on-Reset (POR) circuit which provides system designers a known start-up condition
for the output of the comparators. When the power supply (VCC) is ramping up or ramping down, the POR circuit
will be active when VCC is below VPOR. When active, the POR circuit holds the output low at VEE. When VCC is
greater than or equal to VPOR as stated in 节 6.5 , the comparator output reflects the state of the input pins.
图 7-1 shows how the TLV360x outputs respond for VCC rising. The input is configured with a logic high input to
highlight the transition from the POR circuit control (logic low output) to a standard comparator operation where
the output reflects the input condition. Note how the output goes high when VCC reaches 2.1V.
图 7-1. TLV3601/TLV3603 Output for VCC Rising
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8 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
8.1 Application Information
8.1.1 Adjustable Hysteresis
As a result of a comparator’s high open loop gain, there is a small band of input differential voltage where the
output can toggle back and forth between “logic high” and “logic low” states. This can cause design
challenges for inputs with slow rise and fall times or systems with excessive noise. These challenges can be
overcome by adding hysteresis to the comparator.
Since the TLV3601 and TLV3602 only has a minimal amount of internal hysteresis, external hysteresis can be
applied in the form of a positive feedback loop that adjusts the trip point of the comparator depending on its
current output state. See the Implementing Hysteresis section for more details.
The TLV3603(E) on the other hand has a LE/HYS pin that can be used to increase or eliminate the internal
hysteresis of the comparator. In order to increase the internal hysteresis of the TLV3603(E), connect a single
resistor as shown in the adjusting hysteresis figure between the LE/HYS pin and VEE. A curve of hysteresis
versus resistance is provided below to provide guidance in setting the desired amount of hysteresis. Likewise,
for applications where no hysteresis is desired, the LE/HYS pin can be connected to VCC.
VCC
TLV3603
IN+
+
OUT
IN-
LE/HYS
VEE
图 8-1. Adjustable Hysteresis with an External Resistor
80
-40C
25C
85C
125C
70
VHYST (mV)
60
50
40
30
20
10
0
0
200
400
600
RHYST (k)
800
1,000
图 8-2. VHYST (mV) vs RHYST (kΩ), VCC = 5 V
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8.1.2 Capacitive Loads
For capacitive loads under 100 pF, the propagation delay has minimum change (see Propagation Delay vs.
Capacitive Load). However, excessive capacitive loading under high switching frequencies may increase supply
current, propagation delay, or induce decreased slew rate.
8.1.3 Latch Functionality
The latch pin for the TLV3603(E) holds the output state of the device when the voltage at the LE/HYS pin is a
logic low. This is particularly useful when the output state is intended to remain unchanged. An important
consideration of the latch functionality is the latch hold and setup times. Latch hold time is the minimum time
required (after the latch pin is asserted) for properly latching the comparator output. Likewise, latch setup time is
defined as the time that the input must be stable before the latch pin is asserted low. The figure below illustrates
when the input can transition for a valid latch. Note that the typical setup time in the EC table is negative; this is
due to the internal trace delays of the LE/HYS pin relative to the input pin trace delays. A small delay (tPL) in the
output response is shown below when the TLV3603(E) exits a latched output stage.
tSETUP
tHOLD
LE/HYS
IN
Valid Input Transition
Region
Invalid Input
Transition Region
Valid Input
Transition Region
图 8-3. Input Change Properly Latched
LE/HYS
IN
tPL
OUT
图 8-4. Latch Disable with Input Change
8.2 Typical Application
8.2.1 Implementing Hysteresis
A comparator may produce “chatter” (multiple transitions) at the output when there are noise or signal
variations around the reference threshold; this causes the output to change states in rapid random successions
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as the comparator input goes above and below the threshold of the reference. This usually occurs when the
input signal is moving very slowly across the switching threshold of the comparator. This problem can be
prevented by using the internal hysteresis feature of the comparator or by the addition of external hysteresis.
The TLV3603(E) has a LE/HYS pin that allows for variable internal hysteresis depending on the resistor value
connected between the pin and VEE, where increasing the resistance decreases the hysteresis to a minimum
level.
VCC
5V
TLV3603
VIN
+
VO
VO
VL
VREF 2.5 V
VH
0V
2.485 V
LE/HYS
R1
2.515 V
VIN
150 kΩ
VEE
图 8-5. Adjustable Hysteresis with a 150kΩ Resistor using TLV3603
Since the TLV3601 and TLV3602 only have a minimal amount of internal hysteresis, external hysteresis can be
added in the form of a positive feedback loop. A non-inverting comparator with hysteresis requires a two-resistor
network and a voltage reference (VREF) at the inverting input, as shown in Figure 8-6.
VREF 2.5 V
VIN
5V
–
VO
VA
+
VO
VL
R1
60
VH
0V
2.485 V
2.515 V
VIN
R2
10 k
图 8-6. Non-Inverting Configuration for Hysteresis using TLV3601
8.2.1.1 Design Requirements
For this design, follow these design requirements.
表 8-1. Design Parameters
PARAMETER
VALUE
Supply Voltage (VCC)
5V
VREF
2.5 V
VHYS
30 mV
Lower Threshold (VL)
2.485 V
Upper Threshold (VH)
2.515 V
8.2.1.2 Detailed Design Procedure
For the TLV3603(E), the hysteresis vs. resistance curve (Figure 8-2) can be used as a guidance to set the
desired amount of hysteresis. Figure 8-2 shows that for a 30-mV hysteresis, a 150 kΩ resistor must be placed
from the LE/HYS pin to VEE.
For the TLV3601 and TLV3602, the following procedure can be used to add external hysteresis for a noninverting configuration. Note that VHYST
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