User's Guide
SLVU492 – October 2011
TPS54229EEVM-056, 2-A, SWIFT™ Regulator
Evaluation Module
This user's guide contains information for the TPS54229EEVM-056 evaluation module as well as for the
TPS54229E. Included are the performance specifications, schematic, and the bill of materials of the
TPS54229EEVM-056.
1
2
3
4
5
6
Contents
Introduction .................................................................................................................. 3
Performance Specification Summary ..................................................................................... 3
Modifications ................................................................................................................. 3
3.1
Output Voltage Setpoint ........................................................................................... 3
3.2
Output Filter and Closed-Loop Response ...................................................................... 4
Test Setup and Results .................................................................................................... 4
4.1
Input/Output Connections ......................................................................................... 4
4.2
Start-Up Procedure ................................................................................................ 5
4.3
Efficiency ............................................................................................................ 5
4.4
Load Regulation .................................................................................................... 6
4.5
Line Regulation ..................................................................................................... 6
4.6
Load Transient Response ........................................................................................ 7
4.7
Output Voltage Ripple ............................................................................................. 8
4.8
Input Voltage Ripple ............................................................................................... 9
4.9
Start-Up ............................................................................................................ 10
Board Layout ............................................................................................................... 12
5.1
Layout .............................................................................................................. 12
Schematic, Bill of Materials, and Reference ........................................................................... 15
6.1
Schematic ......................................................................................................... 15
6.2
Bill of Materials .................................................................................................... 16
6.3
Reference .......................................................................................................... 16
List of Figures
1
TPS54229EEVM-056 Efficiency .......................................................................................... 5
2
TPS54229EEVM-056 Light-Load Efficiency ............................................................................. 6
3
TPS54229EEVM-056 Load Regulation, VIN = 5 V and VIN = 12 V .................................................... 6
4
TPS54229EEVM-056 Line Regulation ................................................................................... 7
5
TPS54229EEVM-056 Load Transient Response ....................................................................... 7
6
TPS54229EEVM-056 Light Load Transient Response ................................................................ 8
7
TPS54229EEVM-056 Output Voltage Ripple
8
TPS54229EEVM-056 Start of Eco-mode™ Output Voltage Ripple .................................................. 9
9
TPS54229EEVM-056 Eco-mode™ Output Voltage Ripple............................................................ 9
10
TPS54229EEVM-056 Input Voltage Ripple ............................................................................ 10
11
TPS54229EEVM-056 Start-Up Relative to VIN With SS .............................................................. 10
12
TPS54229EEVM-056 Start-Up Relative to VIN With VREG5
13
TPS54229EEVM-056 Start-Up Relative to EN With SS.............................................................. 11
14
TPS54229EEVM-056 Start-Up Relative to EN With VREG5 ........................................................ 12
...........................................................................
........................................................
8
11
SWIFT, Eco-mode, D-CAP2 are trademarks of Texas Instruments.
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15
Top Assembly .............................................................................................................. 13
16
Top Layer ................................................................................................................... 13
17
Internal Layer 1 ............................................................................................................ 14
18
Internal Layer 2 ............................................................................................................ 14
19
Bottom Layer ............................................................................................................... 15
20
TPS54229EEVM-056 Schematic Diagram ............................................................................. 15
List of Tables
2
1
Input Voltage and Output Current Summary ............................................................................ 3
2
TPS54229EEVM-056 Performance Specifications Summary ......................................................... 3
3
Output Voltages ............................................................................................................. 4
4
Connection and Test Points ............................................................................................... 4
5
Bill of Materials............................................................................................................. 16
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Introduction
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1
Introduction
The TPS54229E is a single, adaptive on-time, D-CAP2™-mode, synchronous buck converter requiring a
low, external component count. The D-CAP2™ control circuit is optimized for low-ESR output capacitors
such as POSCAP, SP-CAP, or ceramic types and features fast transient response with no external
compensation. The switching frequency is internally set at a nominal 650 kHz. The high-side and low-side
switching MOSFETs are incorporated inside the TPS54229E package along with the gate drive circuitry.
The low drain-to-source on-resistance of the MOSFETs allows the TPS54229E to achieve high
efficiencies and helps keep the junction temperature low at high-output currents. The TPS54229E also
features auto-skip Eco-mode™ operation for improved light-load efficiency. The TPS54229E dc/dc
synchronous converter is designed to provide up to a 2-A output from an input voltage source of 4.5 V to
18 V. The output voltage range is from 0.76 V to 7 V. Rated input voltage and output current range for the
evaluation module are given in Table 1.
The TPS54229EEVM-056 evaluation module circuit is a single, synchronous buck converter providing
1.05 V at 2 A from 4.5-V to 18-V input. This user’s guide describes the TPS54229EEVM-056 performance.
Table 1. Input Voltage and Output Current Summary
2
EVM
Input Voltage Range
Output Current Range
TPS54229EEVM-056
VIN = 4.5 V to 18 V
0 A to 2 A
Performance Specification Summary
A summary of the TPS54229EEVM-056 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 12 V and an output voltage of 1.05 V, unless otherwise noted. The
ambient temperature is 25°C for all measurement, unless otherwise noted.
Table 2. TPS54229EEVM-056 Performance Specifications Summary
Specifications
Test Conditions
Input voltage range (VIN)
Min
Typ
Max
4.5
12
18
Output voltage
V
1.05
Operating frequency
VIN = 12 V, IO = 1 A
Output current range
3
Unit
V
650
0
kHz
2
A
+/0.25
Line regulation
IO = 1 A
Load regulation
VIN = 12 V
Over current limit
VIN = 12 V, LO = 2.2 µH
Output ripple voltage
VIN = 12 V, IO = 2 A
15
Maximum efficiency
VIN = 5 V, IO= 0.4 A
86.7
%
+0.8/0.1
2.5
3.3
%
4.7
A
mVPP
%
Modifications
These evaluation modules are designed to provide access to the features of the TPS54229E. Some
modifications can be made to this module.
3.1
Output Voltage Setpoint
To change the output voltage of the EVMs, it is necessary to change the value of resistor R1. Changing
the value of R1 can change the output voltage above 0.765 V. The value of R1 for a specific output
voltage can be calculated using Equation 1.
For output voltage from 0.76 V to 7 V:
æ R1 ö
VO = 0.765 ´ ç 1+
÷
è R2 ø
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Table 3 lists the R1 values for some common output voltages. For higher output voltages of 1.8 V or
above, a feedforward capacitor (C4) may be required to improve phase margin. Pads for this component
(C4) are provided on the printed-circuit board. Note that the resistor values given in Table 3 are standard
values and not the exact value calculated using Equation 1.
Table 3. Output Voltages
3.2
Output Voltage
(V)
R1
(kΩ)
R2
(kΩ)
C4
(pF)
L1
(µH)
C9. C10, C11
Total
Capacitance
(µF)
1
6.81
22.1
2.2
20 - 68
1.05
8.25
22.1
2.2
20 - 68
1.2
12.7
22.1
2.2
20 - 68
1.5
21.5
22.1
2.2
20 - 68
1.8
30.1
22.1
5 - 22
3.3
20 - 68
2.5
49.9
22.1
5 - 22
3.3
20 - 68
3.3
73.2
22.1
5 - 22
3.3
20 - 68
5
124
22.1
5 - 22
4.7
20 - 68
6.5
165
22.1
5 - 22
4.7
20 - 68
Output Filter and Closed-Loop Response
The TPS54229E relies on the output filter characteristics to ensure stability of the control loop. The
recommended output filter components for common output voltages are given in Table 3. It may be
possible for other output filter component values to provide acceptable closed-loop characteristics. R3 and
TP4 are provided for convenience in breaking the control loop and measuring the closed-loop response.
4
Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54229EEVM-056. The section
also includes test results typical for the evaluation modules and efficiency, output load regulation, output
line regulation, load transient response, output voltage ripple, input voltage ripple, start-up, and switching
frequency.
4.1
Input/Output Connections
The TPS54229EEVM-056 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 1 A must be connected to J1 through a pair of 20 AWG wires. The load
must be connected to J2 through a pair of 20 AWG wires. The maximum load current capability is 2 A.
Wire lengths must be minimized to reduce losses in the wires. Test point TP1 provides a place to monitor
the input voltages (VIN) with TP2 providing a convenient ground reference. TP8 is used to monitor the
output voltage with TP9 as the ground reference.
Table 4. Connection and Test Points
4
Reference Designator
Function
J1
VIN (see Table 1 for VIN range)
J2
VOUT, 1.05 V at 2 A maximum
JP1
EN control. Connect EN to OFF to disable, connect EN to ON to enable.
TP1
VIN test point at VIN connector
TP2
GND test point at VIN connector
TP3
EN test point
TP4
Loop response measurement test point
TP5
VREG5 test point
TP6
Switch node test point
TP7
Analog ground test point.
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Table 4. Connection and Test Points (continued)
4.2
Reference Designator
Function
TP8
Output voltage test point at VOUT connector
TP9
Ground test point at VOUT connector
Start-Up Procedure
1. Ensure that the jumper at JP1 (Enable control) is set from EN to OFF.
2. Apply appropriate VIN voltage to VIN and PGND terminals at J1.
3. Move the jumper at JP1 (Enable control) to cover EN and ON. The EVM enables the output voltage.
4.3
Efficiency
Figure 1 shows the efficiency for the TPS54229EEVM-056 at an ambient temperature of 25°C.
100
90
80
Efficiency (%)
70
60
50
40
30
20
VIN = 5 V
VIN = 12 V
10
0
0
0.2
0.5
0.8
1
Output Current (A)
1.2
1.5
1.8
2
G001
Figure 1. TPS54229EEVM-056 Efficiency
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Figure 2 shows the efficiency at light loads for the TPS54229EEVM-056 at an ambient temperature of
25°C.
100
90
80
Efficiency (%)
70
60
50
40
30
20
VIN = 5 V
VIN = 12 V
10
0
0.01
0.1
1
10
Output Current (A)
G002
Figure 2. TPS54229EEVM-056 Light-Load Efficiency
4.4
Load Regulation
The load regulation for the TPS54229EEVM-056 is shown in Figure 3.
1
VIN = 5 V
VIN = 12 V
0.8
Output Voltage Deviation (%)
0.6
0.4
0.2
0
−0.2
−0.4
−0.6
−0.8
−1
0
0.2
0.5
0.8
1
Output Current (A)
1.2
1.5
1.8
2
G003
Figure 3. TPS54229EEVM-056 Load Regulation, VIN = 5 V and VIN = 12 V
4.5
Line Regulation
The line regulation for the TPS54229EEVM-056 is shown in Figure 4.
6
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0.4
Output Voltage Deviation (%)
0.3
0.2
0.1
0
−0.1
−0.2
−0.3
IOUT = 1 A
−0.4
4
8
12
Input Voltage (V)
16
20
G004
Figure 4. TPS54229EEVM-056 Line Regulation
4.6
Load Transient Response
The TPS54229EEVM-056 response to load transient is shown in Figure 5. The current step is from 0.5 A
to 1.5 A. Total peak-to-peak voltage variation is as shown.
VOUT = 50 mV / div (dc coupled, -955 mV offset)
IOUT = 500 mA / DIV
Load step = 0.5 A to 1.5 A
Slew rate = 1 A / µsec
Time = 100 µsec / div
Figure 5. TPS54229EEVM-056 Load Transient Response
The TPS54229EEVM-056 response to light-load transient is shown in Figure 6. In this test, the
TPS54229E is operating in Eco-mode™ at 10-mA load and a 1-A step load is applied. Total peak-to-peak
voltage variation is as shown.
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Test Setup and Results
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VOUT = 50 mV / div (dc coupled, -955 mV offset)
IOUT = 500 mA / DIV
Load step = 0.01 A to 1.0 A
Slew rate = 1 A / µsec
Time = 100 µsec / div
Figure 6. TPS54229EEVM-056 Light Load Transient Response
4.7
Output Voltage Ripple
The TPS54229EEVM-056 output voltage ripple is shown in Figure 7. The output current is the rated full
load of 2 A.
VOUT = 20 mV / div (ac coupled)
PH = 5 V / div
Time = 1 µsec / div
Figure 7. TPS54229EEVM-056 Output Voltage Ripple
The TPS54229EEVM-056 output voltage ripple during the start of Eco-mode™ operation is shown in
Figure 8 . The output current is 150 mA.
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VOUT = 20 mV / div (ac coupled)
PH = 5 V / div
Time = 1 µsec / div
Figure 8. TPS54229EEVM-056 Start of Eco-mode™ Output Voltage Ripple
The TPS54229EEVM-056 output voltage ripple during Eco-mode™ operation is shown in Figure 9. The
output current is 10 mA.
VOUT = 20 mV / div (ac coupled)
PH = 5 V / div
Time = 10 µsec / div
Figure 9. TPS54229EEVM-056 Eco-mode™ Output Voltage Ripple
4.8
Input Voltage Ripple
The TPS54229EEVM-056 input voltage ripple is shown in Figure 10. The output current is the rated full
load of 2 A.
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VIN = 50 mV / div (ac coupled)
PH = 5 V / div
Time = 1 µsec / div
Figure 10. TPS54229EEVM-056 Input Voltage Ripple
4.9
Start-Up
The TPS54229EEVM-056 start-up waveforms relative to VIN are shown in Figure 11 and Figure 12.
VIN = 10 V / div
SS = 5 V / div
VOUT = 1 V / div
Time = 2 msec / div
Figure 11. TPS54229EEVM-056 Start-Up Relative to VIN With SS
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VIN = 10 V / div
VREG5 = 5 V / div
VOUT = 1 V / div
Time = 2 msec / div
Figure 12. TPS54229EEVM-056 Start-Up Relative to VIN With VREG5
The TPS54229EEVM-056 start-up waveforms relative to enable (EN) are shown in Figure 13 and
Figure 14.
EN = 10 V / div
SS = 5 V / div
VOUT = 1 V / div
Time = 2 msec / div
Figure 13. TPS54229EEVM-056 Start-Up Relative to EN With SS
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Board Layout
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EN = 10 V / div
VREG5 = 5 V / div
VOUT = 1 V / div
Time = 2 msec / div
Figure 14. TPS54229EEVM-056 Start-Up Relative to EN With VREG5
5
Board Layout
This section provides description of the TPS54229EEVM-056, board layout, and layer illustrations.
5.1
Layout
The board layout for the TPS54229EEVM-056 is shown in Figure 15 through Figure 19. The top layer
contains the main power traces for VIN, VO, and ground. Also on the top layer are connections for the
pins of the TPS54229E and a large area filled with ground. Many of the signal traces also are located on
the top side. The input decoupling capacitors are located as close to the IC as possible. The input and
output connectors, test points, and all of the components are located on the top side. An analog ground
(GND) area is provided on the top side. Analog ground (GND) and power ground (PGND) are connected
at a single point on the top layer near C6. The two internal layers are completely dedicated to power
ground planes. The bottom layer is primarily power ground. A copper pour area on the bottom layer is
used to connect the switching node (SW) to the output inductor and the boost capacitor. Traces also
connect enable control jumper, EN, VREG5, and LOOP test points, and the feedback trace from VOUT to
the voltage setpoint divider network.
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Board Layout
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Figure 15. Top Assembly
Figure 16. Top Layer
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Board Layout
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Figure 17. Internal Layer 1
Figure 18. Internal Layer 2
14
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Schematic, Bill of Materials, and Reference
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Figure 19. Bottom Layer
6
Schematic, Bill of Materials, and Reference
6.1
Schematic
Figure 20 is the schematic for the TPS54229EEVM-056.
TP1
J1
VIN
1
GND
2
TP2
C1
C2
10uF
10uF
C3
0.1uF
JP1
R3 0
TP4
ON
1
EN
2
OFF
3
TP3
R4 10.0k
U1
TPS54229E
7
R1
8.25k
5
VOUT
C4
6
TP5
1
8
R5
R2
TP7
C5
0
VIN
EN
VBST
VFB
SW
VREG5
GND
SS
THERMAL PAD
2
1
C7
0.1uF
0.47uF
8200pF
L1 2.2 uH
TP8
VOUT
4
C8
9
D1
C6
22.1k
TP6
3
1
C9
C10
C11
10uF
10uF
10uF
J2
TP9
2
VOUT
1
GND
R6
1
1
1
Not Installed
Figure 20. TPS54229EEVM-056 Schematic Diagram
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Schematic, Bill of Materials, and Reference
6.2
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Bill of Materials
Table 5. Bill of Materials
RefDes
Qty
Value
Description
Size
Part Number
MFR
C1, C2
2
10uF
Capacitor, Ceramic, 25V, X5R, 20%
1210
Std
Std
C3, C7
2
0.1uF
Capacitor, Ceramic, 50V, X7R, 10%
0603
Std
Std
C4, C8
0
Open
Capacitor, Ceramic
0603
Std
Std
C5
1
0.47uF
Capacitor, Ceramic, 16V, X7R, 10%
0603
Std
Std
C6
1
8200pF
Capacitor, Ceramic, 25V, X7R , 10%
0603
Std
Std
C9, C10, C11
2
22uF
Capacitor, Ceramic, 6.3V, X5R, 20%
1206
C3216X5R0J226M
TDK
D1
0
Open
Diode, 0.5 A, 30 V, 2PIN
TUMD2
RSX051VA-30
Rohm
J1, J2
2
ED555/2DS
Terminal Block, 2-pin, 6-A, 3.5mm
0.27 x 0.25 inch
ED555/2DS
Sullins
JP1
1
PEC03SAAN
Header, Male 3-pin, 100mil spacing
0.100 inch x 3
PEC03SAAN
Sullins
L1
1
2.2uH
Inductor, SMT, 5.5A, 14.6 mΩ
0.256 x 0.280 inch
CLF7045T-2R2N
TDK
R1
1
8.25k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R2
1
22.1k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R3, R5
2
0
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R4
1
10.0k
Resistor, Chip, 1/16W, 1%
0603
Std
Std
R5
0
Open
Resistor, Chip, 1/16W, 1%
0603
Std
Std
TP1, TP3,
TP4, TP5,
TP6, TP8
3
5000
Test Point, Red, Thru Hole Color Keyed
0.100 x 0.100 inch
5000
Keystone
TP2, TP7,
TP9
3
5001
Test Point, Black, Thru Hole Color Keyed
0.100 x 0.100 inch
5001
Keystone
U1
1
TPS54229EDDA
IC, 4.5-18V Input, 2-A Sync. Step-Down SWIFT
Converter with Eco-Mode
SO8[DDA]
TPS54229EDDA
TI
0.100
929950-00
3M
PWR056
Any
6.3
–
1
Shunt, 100-mil, Black
–
1
PCB
Reference
1. TPS54229E, 4.5V to 18V Input, 2-A Synchronous Step-Down SWIFT™ Converter With Eco-mode™
data sheet (SLVSAZ7)
16
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Evaluation Board/Kit Important Notice
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the
product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are
not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,
including product safety and environmental measures typically found in end products that incorporate such semiconductor
components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding
electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the
technical requirements of these directives or other related directives.
Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30
days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY
SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING
ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.
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claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to
take any and all appropriate precautions with regard to electrostatic discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER
FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement of
patents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling the
product. This notice contains important safety information about temperatures and voltages. For additional information on TI’s
environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or
combination in which such TI products or services might be or are used.
FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION
PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and
can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15
of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this
equipment in other environments may cause interference with radio communications, in which case the user at his own expense
will be required to take whatever measures may be required to correct this interference.
EVM Warnings and Restrictions
It is important to operate this EVM within the input voltage range of 4.5 V to 18 V and the output voltage range of 0.76 V to 7 V .
Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are
questions concerning the input range, please contact a TI field representative prior to connecting the input power.
Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the
EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load
specification, please contact a TI field representative.
During normal operation, some circuit components may have case temperatures greater than 85°C. The EVM is designed to
operate properly with certain components above 85°C as long as the input and output ranges are maintained. These components
include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of
devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near
these devices during operation, please be aware that these devices may be very warm to the touch.
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