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TPS61150, TPS61151
SLVS625E – FEBRUARY 2006 – REVISED NOVEMBER 2015
TPS6115x Dual-Output Boost WLED Driver Using Single Inductor
1 Features
3 Description
•
•
•
•
•
•
•
•
•
•
•
The TPS6115x is a high-frequency boost converter
with two regulated current outputs for driving WLEDs.
Each current output can be individually programmed
through external resistors. There is a dedicated
selection pin for each output so the two outputs can
be turned on separately or simultaneously. The
output current can be reduced by a pulse width
modulation (PWM) signal on SEL pins or an analog
voltage on the ISET pins, resulting in PWM dimming
of the WLEDs. The boost regulator runs at a 1.2-MHz
fixed switching frequency to reduce output ripple and
avoid audible noises associated with pulse frequency
modulation (PFM) control.
1
2.5-V to 6-V Input Voltage Range
Two Outputs Each up to 27 V
0.7-A Integrated Switch
Built-In Power Diode
1.2-MHz Fixed PWM Frequency
Individually Programmable Output Current
Input-to-Output Isolation
Built-In Soft Start
Overvoltage Protection
Up to 83% Efficiency
Up to 30-kHz PWM Dimming Frequency
The two current outputs are ideal for driving WLED
backlights for the sub and main displays in clamshell
phones. The two outputs can also be used for driving
display and keypad backlights. When used together,
the two outputs can drive up to 14 WLEDs for one
large display.
2 Applications
•
•
•
Sub- and Main-Display Backlight in Clamshell
Phones
Display and Keypad Backlight
Up to 14-WLED Driver
In addition to the small inductor, small capacitor, and
3-mm × 3-mm VSON package, the built-in MOSFET
and diode eliminate the need for any external power
devices. Overall, the device provides an extremely
compact solution with high efficiency and plenty of
flexibility.
Device Information(1)
PART NUMBER
TPS61150
TPS61151
PACKAGE
VSON (10)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
2.5 V to 6 V
Input
L1 10 μH
C1
1 μF
VIN
SW IOUT
C2
1 μF
GND
SEL1
SEL2
IFB1
IFB2
ISET1
R1
ISET2
R2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS61150, TPS61151
SLVS625E – FEBRUARY 2006 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Tables...................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
3
4
7.1
7.2
7.3
7.4
7.5
7.6
4
4
4
4
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 9
9
Application and Implementation ........................ 10
9.1 Application Information............................................ 10
9.2 Typical Application ................................................. 10
9.3 Additional Application Circuits................................. 16
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
12 Device and Documentation Support ................. 18
12.1
12.2
12.3
12.4
12.5
12.6
Device Support......................................................
Related Links ........................................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
18
18
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (July 2009) to Revision E
Page
•
Changed "QFN" package to "VSON" throughout document .................................................................................................. 1
•
Added Device Information and Pin Configuration and Functions sections, ESD Ratings and Thermal Information
tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply
Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
Information sections................................................................................................................................................................ 1
•
Deleted obsolete Dissipation Ratings table ........................................................................................................................... 5
Changes from Revision C (November 2008) to Revision D
Page
•
Deleted Lead temperature specification from Absolute Maximum Ratings table................................................................... 4
•
Corrected FET error in Figure 9 ........................................................................................................................................... 11
2
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SLVS625E – FEBRUARY 2006 – REVISED NOVEMBER 2015
5 Device Comparison Tables
Table 1. OVP Options
(1)
TA
PACKAGE (1)
OVP
(TYPICAL)
PACKAGE
MARKING
–40 to +85°C
TPS61150DRCR
28 V
BCQ
–40 to +85°C
TPS61151DRCR
22 V
BRH
–40 to +85°C
TPS61150DRCT
28 V
BCQ
–40 to +85°C
TPS61151DRCT
22 V
BRH
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Table 2. TPS6115x Mode Selection
SEL1
SEL2
IFB1
IFB2
H
L
Enable
Disable
L
H
Disable
Enable
H
H
Enable
Enable
L
L
Device shutdown
6 Pin Configuration and Functions
DRC Package
10-Pin VSON With Exposed Thermal Pad
Top View
IFB1
1
ISET1
2
Exposed
Thermal
Pad
10
IFB2
9
ISET2
8
GND
SEL1
3
SEL2
4
7
IOUT
VIN
5
6
SW
Pin Functions
PIN
NUMBER
NAME
I/O
DESCRIPTION
1, 10
IFB1, IFB2
I
The return path for the IOUT regulation. Current regulator is connected to this pin, and
it can be disabled to open the current path.
2, 9
ISET1, ISET2
I
Output current programming pins. The resistor connected to the pin programs its
corresponding output current.
3, 4
SEL1, SEL2
I
Mode selection pins. See Table 2 for details.
5
VIN
I
The input pin to the device. It provides the current to the boost power stage and also
powers the device circuit. When VIN is below the undervoltage lockout threshold, the
device turns off and disables outputs, thus disconnecting the WLEDs from the input.
6
SW
I
This is the switching node of the device.
7
IOUT
O
The output of the constant current supply. It is directly connected to the boost
converter output.
8
GND
O
The ground of the device. Connect the input and output capacitors very close to this
pin.
—
Thermal Pad
—
The thermal pad should be soldered to the analog ground. If possible, use thermal via
to connect to ground plane for ideal power dissipation.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
Supply voltages on pin VIN (2)
MAX
UNIT
–0.3
Voltages on pins SEL1, SEL2, ISET1 and ISET2
(2)
V
–0.3
V
Voltage on pin IOUT, SW, IFB1 and IFB2 (2)
30
V
Operating junction temperature
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground pin.
7.2 ESD Ratings
VALUE
Electrostatic
discharge
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1500
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted).
MIN
NOM
MAX
VI
Input voltage
2.5
6
VO
Output voltage
VIN
27
L
Inductor (1)
CIN
Input capacitor (1)
V
V
μH
10
μF
1
(1)
UNIT
μF
CO
Output capacitor
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
1
See the Application and Implementation section for further information.
7.4 Thermal Information
TPS6115x
THERMAL METRIC (1)
DRC (VSON)
UNIT
10 PINS
RθJA
Junction-to-ambient thermal resistance
44.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
56.1
°C/W
RθJB
Junction-to-board thermal resistance
19.2
°C/W
ψJT
Junction-to-top characterization parameter
0.7
°C/W
ψJB
Junction-to-board characterization parameter
19.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
5.5
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Electrical Characteristics
At VI = 3.6 V, SELx = VIN, RSET = 80 kΩ, VIO = 15 V, and TA = –40°C to +85°C. Typical values are at TA = 25°C (unless
otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VI
Input voltage range
IQ
Operating quiescent current into
VIN
2.5
Device PWM switching no load
ISD
Shutdown current
SELx = GND
VUVLO
Undervoltage lockout threshold
VIN falling
Vhys
Undervoltage lockout hysterisis
1.65
6
V
2
mA
1.5
μA
1.8
V
70
mV
ENABLE AND SOFT START
V(selh)
SEL logic high voltage
VIN = 2.7 V to 6 V
V(sell)
SEL logic low voltage
VIN = 2.7 V to 6 V
R(en)
SEL pulldown resistor
Toff
SEL pulse width to disable
Kss
IFB soft start current steps
Tss
Soft start time step
Measured as clock divider
Soft start enable time
Time between falling and rising of two
adjacent SELx pulses
Tss_en
1.2
300
SELx high to low
V
0.4
V
700
kΩ
40
ms
16
64
40
ms
CURRENT FEEDBACK
V(ISET)
ISET pin voltage
K(ISET)
Current multiplier
IOUT/ISET
KM
Current matching
In reference to the average of two output
current
V(IFB)
IFB regulation voltage
V(IFB_L)
IFB low threshold hysteresis
Tisink
Current sink settle time measured
from SELx rising edge (1)
Ilkg
IFB pin leakage current
1.204
1.229
1.254
820
900
990
–6%
300
V
6%
330
360
mV
60
IFB voltage = 25 V
mV
6
μs
1
μA
POWER SWITCH AND DIODE
rDS(on)
N-channel MOSFET on-resistance
VIN = VGS = 3.6 V
I(LN_NFET) N-channel leakage current
VDS = 25 V
VF
ID = 0.7 A
Power diode forward voltage
0.9
Ω
1
μA
0.83
1
V
0.6
OC AND OVP
ILIM
N-Channel MOSFET current limit
I(IFB_MAX) Current sink max output current
VOVP
Overvoltage threshold
VOVP(hys)
Overvoltage hysteresis
Dual output, IOUT = 15 V, D = 76%
0.75
1
1.25
Single output , IOUT = 15 V, D = 76%
0.40
0.55
0.7
IFB = 330 mV
35
TPS61150
27
28
29
TPS61151
21
22
23
A
mA
TPS61150
550
TPS61151
440
V
mV
PWM AND PFM CONTROL
ƒS
Oscillator frequency
Dmax
Maximum duty cycle
VFB = 1 V
1
1.2
90%
93%
1.5
MHz
THERMAL SHUTDOWN
Tshutdown
Thermal shutdown threshold
160
°C
Thys
Thermal shutdown threshold
hysteresis
15
°C
(1)
This specification determines the minimum on time required for PWM dimming for desirable linearity. The maximum PWM dimming
frequency can be calculated from the minimum duty cycle required in the application.
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7.6 Typical Characteristics
Data for all characteristic graphs were taken using the Typical Application with inductor = 10 μH (VLCF4018T-100MR74-2),
R1 = R2 = 56 kΩ, unless otherwise noted.
Table 3. Table Of Graphs
FIGURE
Overcurrent limit
VIN = 3 V, 3.6 V, and 4 V, Single and dual output
Figure 1, Figure 2
K value over current
VIN = 3.6 V, ILOAD = 2 mA to 25 mA
Figure 3
PWM dimming linearity
Frequency = 20 kHz and 30 kHz
Figure 4
Single output PWM
dimming waveform
Figure 5
Multiplexed PWM
dimming waveform
Figure 6
Start-up waveform
Figure 7
1200
600
Vin = 3 V
VI = 4.2 V
1000
VI = 3.6 V
Current Limit - mA
Current Limit - mA
500
400
VI = 3 V
300
200
800
Vin = 3.6 V
400
200
100
0
0
10
20
30
40
50
60
Duty Cycle - %
70
80
10
90
20
40
50
60
70
80
90
Figure 2. Overcurrent Limit (Dual Output) vs Duty Cycle
950
25
VI = 3.6 V
WLED Voltage = 15 V
930
910
20
WLED current - mA
890
870
850
830
15
10
f = 20 kHz
810
790
5
770
f = 30 kHz
0
750
0
2
4
6
8 10 12 14 16 18 20
WLED Current - mA
22 24
Figure 3. K Value vs WLED Current
6
30
Duty Cycle - %
Figure 1. Overcurrent Limit (Single Output) vs Duty Cycle
K Value
Vin = 4.2 V
600
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0
20
40
60
PWM Duty cycle - %
80
100
Figure 4. WLED Brightness Dimming Linearity
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SLVS625E – FEBRUARY 2006 – REVISED NOVEMBER 2015
ISEL1
5 V/div, DC
SELI
5 V/div, DC
ISEL2
5 V/div, DC
SW Pin
10 V/div, DC
IOUT pin
1 V/div, DC
15 V Offset
WLED Current
20 mA/div, DC
IOUT pin
5 V/div, DC
5 V Offset
t - Time - 2 ms/div
ISEL1: 4 WLED
ISEL2: 2 WLED
t - Time - 20 ms/div
Figure 5. Single Output WLED PWM Brightness Dimming
Figure 6. Multiplexed PWM Dimming
SELI
5 V/div, DC
IOUT pin
10 V/div, DC
Inductor Current
500 mA/div, DC
WLED Current
20 mA/div, DC
t - Time - 200 ms/div
Figure 7. WLED Start-Up
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8 Detailed Description
8.1 Overview
The TPS6115x is a two-channel WLED driver with an integrated inductive boost converter. The boost converter
generates the bias voltage for the LED string while the two integrated low-side current sinks independently
regulate the current in LED strings from VIN to 29 V. Independent LED string dimming is provided via a PWM
input at the SEL1 and SEL2 inputs.
8.2 Functional Block Diagram
SW
IOUT
VIN
+
12-MHz Current
Mode Control
PWM
GND
IFB1
SEL1
Current
Sink
0.33 V
ISET1
Error
Amplifier
IFB2
SEL2
Current
Sink
TPS61150/51
ISET2
8.3 Feature Description
8.3.1 Start-Up
During start-up, both the boost converter and the current sink circuitry ramp up simultaneously to establish a
steady state. The current sink circuitry ramps up current in 16 steps with each step taking 64 clock cycles. This
period ensures that the current sink loop is slower than the boost converter response during start-up. Therefore,
the boost converter output comes up slowly as current sink circuitry ramps up the current. This configuration
ensures a smooth start-up and minimizes in-rush current.
8.3.2 Overvoltage Protection (OVP)
To prevent the boost output runaway as the result of WLED disconnection, there is an overvoltage protection
circuit that stops the boost converter from switching as soon as its output exceeds the OVP threshold. When the
voltage falls below the OVP threshold, the converter resumes switching.
The two OVP options offer the choices to prevent a 25-V rated output capacitor or the internal 30-V FET from
breaking down.
8
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Feature Description (continued)
8.3.3 Undervoltage Lockout
An undervoltage lockout prevents device malfunction at input voltages below 1.65 V (typical). When the input
voltage is below the undervoltage threshold, the device remains off, and both the boost converter and current
sink circuit are turned off, providing isolation between input and output.
8.3.4 Thermal Shutdown
An internal thermal shutdown turns off the device when the typical junction temperature of 160°C is exceeded.
The thermal shutdown has a hysteresis of typically 15°C.
8.3.5 Enable
Pulling either the SEL1 or SEL2 pin low turns off the corresponding output. If both SEL1 and SEL2 are low for
more than 40 ms, the device shuts down and consumes less than 1 μA current. The SEL pin can also be used
for PWM brightness dimming. To improve PWM dimming linearity, soft start is disabled if the time from the falling
and rising edges of two adjacent SELx pulses is less than 40 ms. See the Application and Implementation
section for details.
Each SEL input pin has an internal pulldown resistor to disable the device when the pin is floating.
8.4 Device Functional Modes
8.4.1 Current Regulation
The TPS6115x uses a single boost regulator to drive two WLED strings, each with independently programmable
current. The boost converter adopts PWM control which is ideal for high output current and low output ripple
noises. The feedback loop regulates the IFB pins to a threshold voltage (330 mV typical), giving the current sink
circuit just enough headroom to operate.
The regulation current is set by the resistor on the ISET pin based on Equation 1.
VISET
IO
u KISET
RSET
Where:
•
•
•
•
IO = output current
VISET = ISET pin voltage (1.229 V typical)
RSET = ISET pin resistor value
KISET = current multiplier (900 typical)
(1)
When both outputs are enabled, the boost converter provides enough power to provide the demanded current
through IFB1 and IFB2 while keeping the voltage at IOUT high enough to meet the forward voltage drops of the
WLEDs. Specifically, at start-up, the boost converter increases its output power, and therefore the output voltage,
from IOUT until IFB1 reaches its regulated voltage. Once IFB1 is within regulation, the device looks to the IFB2
voltage and may increase V(IOUT) further to get IFB2 in regulation. After both IFB pins reach regulation, the
feedback path dynamically switches to whichever IFB pin drops more than the IFB low hysteresis voltage (60 mV
typical) below its regulation voltage. This architecture ensures proper current regulation for both IFB1 pins;
however, the voltage at one IFB pin is higher than the minimum required regulation voltage. The overall
efficiency when both strings are on depends on the voltage difference between the IFB1 and IFB2 pins. A large
difference reduces the efficiency as a result of power losses across the current sink circuit of the IFB pin with the
higher drop.
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The standard application circuit is shown in Figure 8. Typical VIN range is from a single cell Li+ battery. LED
strings voltages can be as high as 28 V (TPS61150) or 22 V (TPS61151). LED string voltage mismatch is
allowed due to the adaptive feedback headroom voltage which dynamically looks for and regulates the highest
voltage string.
9.2 Typical Application
2.5 V to 6 V
Input
L1 10 μH
C1
1 μF
VIN
SW IOUT
C2
1 μF
GND
SEL1
SEL2
IFB1
IFB2
ISET1
R1
ISET2
R2
Figure 8. TPS6115x Typical Application
9.2.1 Design Requirements
For typical dual output boost WLED driver applications, use the parameters listed in Table 4.
Table 4. Design Parameters
10
DESIGN PARAMETER
EXAMPLE VALUE
Minimum input voltage
2.5 V
Minimum output voltage
VIN
Output current
up to 35 mA/string
Fixed switching frequency
1.2 MHz
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9.2.2 Detailed Design Procedure
9.2.2.1 Maximum Output Current
The overcurrent limit in a boost converter limits the maximum input current (and thus the maximum input power)
for a given input voltage. Maximum output power is less than the maximum input power because of power
conversion losses. Therefore, the current limit, input voltage, output voltage, and efficiency can all change
maximum current output. Because current limit clamps peak inductor current, ripple must be subtracted to derive
the maximum DC current. The ripple current is a function of switching frequency, inductor value, and duty cycle.
Equation 2 and Equation 3 take all of the above factors into account for maximum output current calculation.
1
IP
ª §
º
1
1 ·
«L u ¨
¸ u FS »
¬« © VIOUT VF VIN VIN ¹
¼»
Where:
•
•
•
•
•
IP = inductor peak to peak ripple
L = inductor value
VF = power diode forward voltage
FS = switching frequency
VIOUT = boost output voltage. It is equal to 330 mV + voltage drop across WLED.
IOUT_MAX
§
VIN u ¨ ILIM
©
VIOUT
(2)
IP ·
uK
2 ¸¹
Where:
•
•
•
IOUT_MAX = maximum output current of the boost converter
ILIM = overcurrent limit
η = efficiency
(3)
To keep a tight range on the overcurrent limit, the TPS6115x uses the VIN and IOUT pin voltages to compensate
for the overcurrent limit variation caused by the slope compensation. However, the current threshold still has a
residual dependency on the VIN and IOUT voltages. Use Figure 1 and Figure 2 to identify the typical overcurrent
limit in a specific application, and use a ±25% tolerance to account for temperature dependency and process
variations.
The maximum output current can also be limited by the current capability of the current-sink circuitry. It is
designed to provide a maximum 35-mA current regardless of the current capability of the boost converter.
9.2.2.2 WLED Brightness Dimming
There are three ways to change the output current on the fly for WLED dimming. The first method parallels an
additional resistor with the ISET pin resistor as shown in Figure 9. The switch (Q1) can change the ISET pin
resistance, and therefore modify the output current. This method is very simple, but can provide only limited
dimming steps.
ISET
R1
RISET
Q1
ON/OFF
Logic
Figure 9. Switching In or Out With an Additional Resistor to Change Output Current
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Alternatively, a PWM dimming signal at the SEL pin can modulate the output current by the duty cycle of the
signal. The logic high of the signal turns on the current sink circuit, while the logic low turns it off. This operation
creates an averaged DC output current proportional to the duty cycle of the PWM signal. The frequency of the
PWM signal must be high enough to avoid flashing of the WLEDs. The soft start of the current sink circuit is
disabled during the PWM dimming to improve linearity.
The major concern of the PWM dimming is the creation of audible noises that can come from the inductor or
output capacitor of the boost converter, or both. The audible noises on the output capacitor are created by the
presence of voltage ripple in range of audible frequencies. The TPS6115x alleviates the problem by
disconnecting the WLEDs from the output capacitor when the SEL pin is low. Therefore, the output capacitor is
not discharged by the WLEDs, and thus reduces the voltage ripple during PWM dimming.
The audible noises can be eliminated by using a PWM dimming frequency above or below the audible frequency
range. The maximum PWM dimming frequency of the TPS6115x is determined by the current settling time
(Tisink), which is the time required for the sink circuit to reach a steady state after the SEL pin transitions from low
to high. The maximum dimming frequency can be calculated by Equation 4:
DMIN
FPWM_MAX
TISINK
Where:
•
DMIN = min duty cycle of the PWM dimming required in the application
(4)
For 20% DMIN, a PWM dimming frequency up to 33 kHz is possible, putting the noise frequency above the
audible range.
Because the TPS61150/1 dynamically regulates one IFB pin voltage, its output voltage can have a large ripple
during PWM dimming as shown in Figure 6. This ripple may cause ceramic output capacitors to ring audibly. To
reduce the output ripple, the configurations shown in Figure 16 and Figure 17 are recommended for PWM
dimming. In Figure 16, both current strings have the same number of LEDs and the same PWM signal. In
Figure 17, one string (in this case, string 2) is not PWM dimmed and has a greater total forward voltage drop
than string 1, either because of having more LEDs than string 1 or because of adding a resistor in series with
string 2. Therefore, IFB2 controls the regulation regardless of the PWM signal on IFB1, and the output ripple is
significantly reduced when string 1 is dimmed. The circuit in Figure 17 could have been reconfigured with string 1
having the larger total forward drop.
The third method uses an external DC voltage and resistor as shown in Figure 10 to change the ISET pin
current, and thus control the output current. The DC voltage can be the output of a filtered PWM signal. The
formulas to calculate the output current is given by Equation 5 and Equation 6.
§ 1.229 1.229 VDC ·
IWLED KISET u ¨
¸ for DC voltage input
R1
© RISET
¹
(5)
IWLED
§ 1.229
KISET u ¨
© RISET
1.229 VDC ·
¸ for PWM signal input
R1 10K ¹
Where:
•
•
KISET = current multiplier between the ISET pin current and the IFB pin current.
VDC= voltage of the DC voltage source or the DC voltage of the PWM signal.
ISET
ISET
Filter
PWM Signal
R1
RISET
(6)
DC Voltage
10 kW
0.1 mF
R1
RISET
Figure 10. Analog Dimming Using an External Voltage Source to Control the Output Current
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9.2.2.3 Inductor Selection
Because the selection of the inductor affects the power supply steady-state operation, transient behavior, and
loop stability, the inductor is the key component in power regulator design. Three specifications are the most
important to the performance of the inductor: the inductor value, DC resistance (DCR), and saturation current.
Considering the inductor value alone is not enough.
The inductor inductance value determines the inductor ripple current. It is generally recommended to set peak-topeak ripple current given by Equation 2 to betweeen 30% to 40% of DC current. It is a good compromise of
power loss and inductor size. For this reason, 10-μH inductors are recommended for the TPS6115x. Inductor DC
current can be calculated as Equation 7.
VIOUT u IOUT
IL_DC
VIN u K
(7)
Use the maximum load current and minimum Vin for calculation.
The internal loop compensation for PWM control is optimized for the external component shown in the Figure 8
with consideration of component tolerance. Inductor values can have ±20% tolerance with no current bias. When
the inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0-A value,
depending on how the inductor vendor defines saturation. Using an inductor with a smaller inductance value
forces discontinuous PWM in which the inductor current ramps down to zero before the end of each switching
cycle, reduces the boost converter maximum output current, and causes large input voltage ripple. An inductor
with larger inductance reduces the gain and phase margin of the feedback loop, possibly resulting in instability.
Regulator efficiency depends on the resistance of its high current path and switching losses associated with the
PWM switch and power diode. Although the TPS6115x has optimized the internal switches, the overall efficiency
still relies on inductor DCR; lower DCR improves efficiency. However, there is a trade-off between DCR and
inductor size, and shielded inductors typically have higher DCR than unshielded ones. A DCR in range of 150
mΩ to 350 mΩ is suitable for applications that require both on mode. A DCR is the range of 250 mΩ to 450 mΩ
is a good choice for single output applications. Table 5 and Table 6 list some recommended inductor models.
Table 5. Recommended Inductors for Single Output
L (μH)
DCR TYPICAL(mΩ)
ISAT (A)
SIZE
(L × W × H mm)
VLF3012AT-100MR49
10
360
0.49
2.8 × 3 × 1.2
VLCF4018T-100MR74-2
10
163
0.74
4 × 4 × 1.8
CDRH2D11/HP
10
447
0.52
3.2 × 3.2 × 1.2
CDRH3D16/HP
10
230
0.84
4 × 4 × 1.8
TDK
Sumida
Table 6. Recommended Inductors for Dual Output
L (μH)
DCR TYPICAL (mΩ)
ISAT (A)
SIZE
(L × W × H mm)
VLCF4018T-100MR74-2
10
163
0.74
4 × 4 × 1.8
VLF4012AT-100MR79
10
300
0.85
3.5 × 3.7 × 1 .2
CDRH3D16/HP
10
230
0.84
4 × 4 × 1.8
CDRH4D11/HP
10
340
0.85
4.8 × 4.8 × 1.2
TDK
Sumida
9.2.2.4 Input and Output Capacitor Selection
The output capacitor is primarily selected for the output ripple of the converter. This ripple voltage is the sum of
the ripple caused by the capacitor capacitance and its equivalent series resistance (ESR). Assuming a capacitor
with zero ESR, the minimum capacitance needed for a given ripple can be calculated by Equation 8.
VIOUT VIN IOUT
COUT
VIOUT u FS u VRIPPLE
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Where:
•
VRIPPLE = peak-to-peak output ripple
(8)
For VIN = 3.6 V, VIOUT = 20 V, and FS = 1.2 MHz, 0.1% ripple (20 mV) would require a 1-μF capacitor. For this
value, ceramic capacitors are the best choice for size, cost, and availability.
The additional output ripple component caused by ESR is calculated using Equation 9:
Vripple_ESR = Iout × RESR
(9)
As a result of its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum
or electrolytic capacitors are used.
During a load transient, the capacitor at the output of the boost converter must supply or absorb additional
current before the inductor current ramps up the steady-state value. Larger capacitors always help to reduce the
voltage over- and undershoot during a load transient. A larger capacitor also helps loop stability.
Care must be taken when evaluating ceramic capacitor derating because of the applied DC voltage, aging, and
frequency response. For example, larger form-factor capacitors (in size 1206) have self-resonant frequencies in
the range of the TPS6115x switching frequency. Therefore, the effective capacitance is significantly lower for
these capacitors. As a result, it may be necessary to use small capacitors in parallel instead of one large
capacitor.
Table 7 lists some recommended input and output ceramic capacitors. Two popular vendors for high-value
ceramic capacitors are:
TDK (http://www.component.tdk.com/components.php)
Murata (http://www.murata.com/cap/index.html)
Table 7. Recommended Input and Output Capacitors
CAPACITANCE (μF)
VOLTAGE (V)
CASE
C3216X5R1E475K
4.7
25
1206
C2012X5R1E105K
1
25
0805
C1005X5R0J105K
1
6.3
0402
GRM319R61E475KA12D
4.7
25
1206
GRM216R61E105KA12D
1
25
0805
GRM155R60J105KE19D
1
6.3
0402
TDK
Murata
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9.2.3 Application Curves
90
90
WLED Voltage = 15 V, 4 WLED
Single Output
WLED Voltage = 11 V, 3 WLED,
Single Output
VI = 3.6 V
80
VI = 3.3 V
Efficiency - %
Efficiency - %
80
VI = 3.3 V
VI = 3.6 V
70
VI = 4.2 V
60
70
VI = 4.2 V
60
50
50
0
5
10
15
20
25
0
5
WLED Current - mA
Figure 11. Efficiency vs Load Current
15
20
25
Figure 12. Efficiency vs Load Current
90
90
WLED Voltage = 19 V, 5 WLED
Single Output
WLED Voltage = 23 V, 6 WLED
Single Output
V I = 4.2 V
VI = 3.6 V
80
80
VI = 3.3 V
Efficiency - %
Efficiency - %
10
WLED Current - mA
VI = 4.2 V
70
VI = 3.6 V
VI = 3.3 V
70
60
60
50
50
0
5
10
15
WLED Current - mA
20
0
25
5
10
15
20
25
WLED Current - mA
Figure 14. Efficiency vs Load Current
Figure 13. Efficiency vs Load Current
90
85
WLED1 Voltage = 15 V
WLED2 Voltage = 15 V
VI = 4.2 V
80
VI = 3.3 V
Efficiency - %
75
VI = 3.6 V
70
65
60
55
50
45
40
0
5
10
15
20 25 30
35
40
IO -Total Output Current - mA
45
50
Figure 15. Both on Efficiency vs Total Output Current
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9.3 Additional Application Circuits
L1
10 μH
Vin
C2
1 μF
VIN
SW
IOUT
C2
1 μF
GND
EN/PWM
Dimming
SEL1
SEL2
IFB1
IFB2
ISET1
R1
ISET2
R2
Figure 16. Driving up to 12 WLEDs With One LCD Backlight
space
Keypad
Display
+
+
L1 10 μH
Vin
IFB1
ON
VDROP1
C1
1 μF
IFB1
ON
VIN
SEL1
C2
1 μF
GND
IFB2
ON
SEL1
SEL2
SEL2
40 ms
Need VDROP2 > VDROP1
IC
Shutdown
ISET1
R1
VDROP2
SW IOUT
IFB1
-
IFB2
ISET2
R2
Figure 17. Driving A Keypad and LCD Backlight, Applying PWM Signal to the SEL1 Pin
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10 Power Supply Recommendations
Apply an input voltage between 2.5 V and 6 V. Bypass IN with a ceramic capacitor as close to the VIN pin and
GND pin as possible in order to filter switching noise.
11 Layout
11.1 Layout Guidelines
As for all switching power supplies, especially those providing high current and using high switching frequencies,
printed circuit board (PCB) layout is an important design step. If layout is not carefully done, the regulator could
show instability as well as electromagnetic interference (EMI) problems. Therefore, use wide and short traces for
high current paths. The input capacitor must not only be close to the VIN pin, but also to the GND pin in order to
reduce the input ripple seen by the device. The VIN and SW pins are conveniently located on the edges of the
device; therefore, the inductor can be placed close to the device. The output capacitor must be placed near the
load to minimize ripple and maximize transient performance.
It is also beneficial to have the ground of the output capacitor close to the GND pin because there will be a large
ground return current flowing between these two connections. When laying out the signal ground, use short
traces separated from power ground traces, and connect them together at a single point on the PCB.
11.2 Layout Example
Figure 18. TPS61150 Layout Example
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Related Links
Table 8 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 8. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS61150
Click here
Click here
Click here
Click here
Click here
TPS61151
Click here
Click here
Click here
Click here
Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS61150DRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
TPS61150DRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
TPS61151DRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
TPS61151DRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BCQ
Samples
BCQ
Samples
-40 to 85
BRH
Samples
-40 to 85
BRH
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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