TPS61150A
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SLVS706 – OCTOBER 2006
DUAL OUTPUT BOOST WLED DRIVER
USING SINGLE INDUCTOR
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
2.5V to 6V Input Voltage Range
0.7A Integrated Switch
Built-in Power Diode
1.2MHz Fixed PWM Frequency
Individually Programmable Output Current
Input-to-Output Isolation
Built-in Soft Start
27V Overvoltage Protection
3% at 15mA Matching between Two Current
Strings, Improvement from TPS61150/1
Up to 83% Efficiency
Up to 30kHz PWM Dimming Frequency
Availiable in a 10 Pin, 3 × 3 mm QFN Package
APPLICATIONS
•
•
•
Up to 14 WLED Driver for Media Form Factor
Display
Sub and Main Display Backlight in Clam Shell
Phones
Display and Keypad Backlight in Portable
Equipment
The two current outputs are ideal for driving WLED
backlight for the sub and main displays in clam shell
phones. The two outputs can also be used for driving
display and keypad backlights. When used together,
the two outputs can drive up to 14 WLED for one
large display.
In addition to the small inductor, small capacitor and
3mm x 3mm QFN package, the built-in MOSFET and
diode eliminate the need for any external power
devices. Overall, the IC provides an extremely
compact solution with high efficiency and plenty of
flexibility.
TYPICAL APPLICATION
2.5V to 6V Input
L1
10mH
C1
1mF
SW
IOUT
VIN
C2
1mF
GND
TPS61150A
SEL1
IFB1
SEL2
IFB2
ISET1
DESCRIPTION
R1
56.5kW
ISET2
R2
56.5kW
The TPS61150A is a high frequency boost converter
with two regulated current outputs for driving
WLEDs. Each current output can be individually
programmed through external resistors. There is
dedicated selection pin for each output, so the two
outputs can be turned on separately or
simultaneously. The output current can be reduced
by a pulse width modulation (PWM) signal on the
select pins or an analog voltage on the ISET pin. The
boost regulator runs at 1.2MHz fixed switching
frequency to reduce output ripple and avoid audible
noises associated with PFM control.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
TPS61150A
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SLVS706 – OCTOBER 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION (1)
(1)
TA
PACKAGE
OVP (Typ.)
PACKAGE MARKING
–40 to 85°C
TPS61150ADRCR
28V
BTK
–40 to 85°C
TPS61150ADRCT
28V
BTK
For the most current package and ordering information, see the Package Option Addendum at the end
of this document, or see the TI website at www.ti.com.
DEVICE INFORMATION
QFN PACKAGE
(TOP VIEW)
IFB1
1
ISET
2
SEL1
3
SEL2
VIN
10
IFB2
9
ISET2
8
GND
4
7
IOUT
5
6
SW
Exposed
Thermal
Pad
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
I/O
DESCRIPTION
VIN
5
I
Input pin. VIN provides the current to the boost power stage, and also powers the IC circuit. When VIN is
below the undervoltage lockout threshold, the IC turns off and disables outputs; thereby disconnecting the
WLEDs from the input.
GND
8
O
Ground. Connect the input and output capacitors as close as possible to this pin.
SW
6
I
Switching node of the IC.
IOUT
7
O
Constant current supply output. IOUT is directly connected to the boost converter output.
IFB1, IFB2
10
I
Return path for the IOUT regulation. The current regulator is connected to this pin, and it can be disabled
to open the current path.
ISET1,
ISET2
2
9
I
Output current programming. The resistor connected to the pin programs the corresponding output current.
SEL1,
SEL2
3
4
I
Mode selection. See Table 1 for details.
Thermal Pad
The thermal pad should be soldered to the analog ground. If possible, use the thermal pad to connect to
ground plane for ideal power dissipation.
Table 1. TPS61150A Mode Selection
SEL1
2
SEL2
IFB1
IFB2
H
L
Enable
Disable
L
H
Disable
Enable
H
H
Enable
Enable
L
L
IC Shutdown
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FUNCTIONAL BLOCK DIAGRAM
SW
IOUT
VIN
+
−
1.2MHz Current
Mode Control
PWM
GND
IFB1
Current
Sink
SEL1
0.33V
ISET1
Error
Amplifier
IFB2
TPS61150A
SEL2
Current
Sink
ISET2
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
Supply voltages on pin VIN (2)
–0.3 to 7
V
Voltages on pins SEL1/2, ISET1/2 (2)
–0.3 to 7
V
30
V
Voltage on pin IOUT, SW, IFB1 and
IFB2 (2)
Continuous power dissipation
See Dissipation Rating Table
Operating junction temperature range
–40 to 150
°C
Storage temperature range
–65 to 150
°C
260
°C
Lead Temperature (soldering, 10 sec)
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
DISSIPATION RATINGS
PACKAGE
QFN
(1)
QFN (2)(2
(1)
(2)
RθJA
TA≤ 25°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
270oC/W
370mW
204mW
148mW
48.7oC/W
2.05W
1.13W
821mW
Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad.
Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad .
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RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
Input voltage range
2.5
6.0
V
VO
Output voltage range
VIN
27
V
L
Inductor (1)
CI
Input capacitor (1)
1
µF
CO
Output capacitor (1)
1
µF
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
4
NOM
VI
µH
10
See Application Section for further information.
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ELECTRICAL CHARACTERISTICS
VIN = 3.6V, SELx = VIN, Rset = 80kΩ, V(IOUT) = 15V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VI
Input voltage range
IQ
Operating quiescent current into VIN
Device PWM switching no load
ISD
Shutdown current
SELx = GND, TA = 25°C
SELx = GND
VUVLO
Under-voltage lockout threshold
Vhys
Under-voltage lockout hysterisis
2.5
VIN falling
6.0
V
2
mA
1.7
1.9
µA
2.7
3
1.65
1.8
70
V
mV
ENABLE AND SOFT START
V(selh)
SEL logic high voltage
VI = 2.5V to 6V
V(sell)
SEL logic low voltage
VI = 2.5V to 6V
R(en)
SEL pull down resistor
t(off)
SEL pulse width to disable
I(ss)
IFB soft start current steps
t(ss)
Soft start time step
Measured as clock divider
t(ss_en)
Soft start enable time
Time between falling and rising of two adjacent
SELx pulses
1.2
0.4
300
SELx high to low
V
700
V
kΩ
40
ms
16
64
40
ms
CURRENT FEEDBACK
V(ISET)
ISET pin voltage
KISET
Current multipler, Ifb1/Iset1 , Ifb2/Iset2
1.204
1.229
1.254
ISET current = 16.7µA
883
920
957
KM
Current matching, (2×|Ifb1–Ifb2|)/(Ifb1+Ifb2) ISET current = 16.7µA
ISET current = 1.2µA
736
920
1104
ISET current = 1.2µA
V(IFB)
IFB regulation voltage
Vhys(IFB_L)
IFB low threshold hysteresis
tI(sink)
Current sink settle time measured from
SELx rising edge (1)
Ilkg
IFB pin leakage current
0%
3%
0%
20%
300
330
360
60
IFB voltage = 25V
V
mV
mV
6
µs
1
µA
POWER SWITCH AND DIODE
RDS(ON)
N-channel MOSFET on-resistance
VIN = VGS = 3.6V
Ilkg(N_NFET) N-channel leakage current
VDS = 25V
V(F)
Diode current = 0.7A
Power diode forward voltage
0.9
Ω
1
µA
0.83
1.0
V
0.6
OC AND OVP
IL
N-Channel MOSFET current limit
I(IFB_MAX)
Current sink max output current
Vovp
Overvoltage threshold
Vovp_hys
Overvoltage hysteresis
Dual output, IOUT= 15V, Duty cycle = 76%
0.75
1.0
1.25
Single output , IOUT= 15V, Duty cycle = 76%
0.40
0.55
0.7
28
29
IFB current = 330mV
34
27
A
mA
550
V
mV
PWM AND PFM CONTROL
FS
Oscillator frequency
Dmax
Maximum duty cycle
Feedback voltage = 1.0V
1.0
1.2
89%
93%
1.5
MHz
THERMAL SHUTDOWN
Tshutdown
Thermal shutdown threshold
Thys
Thermal shutdown threshold hysteresis
(1)
160
°C
15
°C
This specification determines the minimum on time required for PWM dimming for desirable linearity. The maximum PWM dimming
frequency can be calculated from the minimum duty cycle required in the application.
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TYPICAL CHARACTERISTICS
Table of Graphs
FIGURES
Overcurrent Limit
VIN = 3.0V, 3.6V, and 4.2V, single and dual output
1,2
WLED efficiency
VIN = 3.3V, 3.6V and 4.2V, 3 WLED, WLED voltage = 11V
3
WLED efficiency
VIN = 3.3V, 3.6V and 4.2V, 4 WLED, WLED voltage = 15V
4
WLED efficiency
VIN = 3.3V, 3.6V and 4.2V, 5 WLED, WLED voltage = 19V
5
WLED efficiency
VIN = 3.3V, 3.6V and 4.2V, 6 WLED, WLED voltage = 23V
6
Both on efficiency
VIN = 3.3V, 3.6V and 4.2V, 4 WLED on each output
7
K value over current
VIN = 3.6V, IWLED = 1mA to 25mA
8
PWM dimming linearity
Frequency = 20kHz and 30kHz
9
Single output PWM dimming waveform
10
Multiplexed PWM dimming waveform
11
Start up waveform
12
OVERCURRENT LIMIT (SINGLE OUTPUT)
vs
DUTY CYCLE
OVERCURRENT LIMIT (DUAL OUTPUT)
vs
DUTY CYCLE
1200
600
VI = 4.2V
VI = 3V
1000
VI = 3.6V
Current Limit - mA
Current Limit - mA
500
400
VI = 3V
300
200
800
VI = 3.6V
400
200
100
0
0
10
20
30
40
50
60
Duty Cycle - %
70
80
90
10
20
30
40
50
60
Duty Cycle - %
Figure 1.
6
VI = 4.2V
600
Figure 2.
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80
90
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EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
90
90
WLED Voltage = 15V , 4 WLED,
Single Output
WLED Voltage = 11V , 3 WLED,
Single Output
VI = 3.6V
80
Efficiency - %
Efficiency - %
80
VI = 3.3V
70
60
VI = 4.2V
VI = 3.3V
70
VI = 3.6V
60
VI = 4.2V
50
50
0
5
10
15
20
0
25
5
Figure 4.
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
25
20
25
WLED Voltage = 23V , 6 WLED,
Single Output
VI = 4.2V
VI = 4.2V
80
VI = 3.6V
70
20
90
Efficiency - %
Efficiency - %
Figure 3.
WLED Voltage = 19V , 5 WLED,
Single Output
80
15
WLED Current - mA
WLED Current - mA
90
10
VI = 3.3V
60
70
VI = 3.6V
VI = 3.3V
60
50
0
5
10
15
WLED Current - mA
20
25
50
0
5
10
15
WLED Current - mA
Figure 5.
Figure 6.
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BOTH ON EFFICIENCY
vs
TOTAL OUTPUT CURRENT
K VALUE
vs
WLED CURRENT
1200
90
VI = 3.6V
WLED1 Voltage = 15V
WLED2 Voltage = 15V
WLED1 Voltage = 15V
WLED2 Voltage = 15V
1100
VI = 3.3V
1000
VI = 3.6V
70
K Value
Efficiency - %
80
VI = 4.2V
WLED1
900
WLED2
60
800
700
50
0
10
20
30
40
50
IO - Total Output Current - mA
60
0
10
20
30
WLED Current - mA
40
Figure 7.
Figure 8.
WLED BRIGHTNESS DIMMING LINEARITY
SINGLE OUTPUT WLED PWM
BRIGHTNESS DIMMING
50
25
ISEL2
5V/div , DC
WLED current - mA
20
SW
10V/div , DC
15
IOUT
1V/div , DC
10
15V Offset
WLED Current
f = 20kHz
20mA/div, DC
5
t - Time - 20ms/div
f = 30kHz
0
0
20
40
60
PWM Duty cycle - %
80
100
Figure 9.
8
Figure 10.
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MULTIPLEXED PWM DIMMING
(ISEL1: 4 WLED, ISEL2: 2 WLED)
WLED START UP
ISEL1
ISEL2
5V/div , DC
ISEL2
5V/div , DC
IOUT
10V/div , DC
5V/div , DC
Inductor Current
500mA/div , DC
WLED Current
20mA/div , DC
IOUT
5V/div , DC
t - Time - 200ms/div
t - Time - 2ms/div
Figure 11.
Figure 12.
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DETAILED DESCRIPTION
CURRENT REGULATION
The TPS61150A uses a single boost regulator to drive 2 WLED strings whose current can be programmed
independently. The boost converter adopts PWM control which is ideal for high output current and low output
ripple noises. The feedback loop regulates the IFB pin to a threshold voltage (330mV typical), giving the current
sink circuit just enough headroom to operate.
The regulation current is set by the resistor on the Iset pin based on
V
I O + ISET KISET
RSET
(1)
where
IO = output current
VISET = Iset pin voltage (1.229V typical)
RSET = Iset pin resistor value
KISET = current multiplier (920 typical)
When both outputs are enabled, the boost converter regulates to the IFB pin that demands higher Iout pin
voltage, V(IOUT), and let the other IFB pin rise above its regulation voltage. The feedback path dynamically
switches to the other IFB pin if its voltage drops more than the IFB low hysterisis (60mV typical) below it's
regulation voltage. This ensures proper current regulation for both outputs. When both IFB voltages are low,
IFB1 is used for regulation. Once IFB1 reaches its regulation voltage, the feedback path may hand over to IFB2
if it is still low, and the boost output will continue to rise.
The overall efficiency in this mode depends on the voltage different between the IFB1 and IFB2. A large
difference reduces the efficiency due to power losses across the current sink circuit. To improve the efficiency of
the both-on mode, the two current outputs can be turned on complimentarily by applying out of phase enable
signal to the SEL pins. The ISET pin resistors need to be recalculated to compensate for the reduced DC
current.
START UP
During start up, both the boost converter and the current sink circuitry are trying to establish steady state
simultaneously. The current sink circuitry ramps up current in 16 steps, with each step taking 64 clock cycles.
This ensures that the current sink loop is slower than the boost converter response during startup. Therefore,
the boost converter output comes up slowly as current sink circuitry ramps up the current. This ensures smooth
start up and minimizes in-rush current.
OVERVOLTAGE PROTECTION
To prevent the boost output run away as the result of WLED disconnection, there is an overvoltage protection
circuit which stops the boost converter from switching as soon as its output exceeds the OVP threshold. When
the voltage falls below the OVP threshold, the converter resumes switching. TPS61150A provides 28V(typical)
OVP to prevent a 25V rated output capacitor or the internal 30V FET from breaking down.
UNDERVOLTAGE LOCKOUT
An undervoltage lockout prevents mis-operation of the device for input voltages below 1.65V (typical). When the
input voltage is below the undervoltage threshold, the device remains off and both the boost converter and
current sink circuit are turned off, providing isolation between input and output.
THERMAL SHUTDOWN
An internal thermal shutdown turns off the IC when the typical junction temperature of 160°C is exceeded. The
thermal shutdown has a hysteresis of typically 15°C.
10
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DETAILED DESCRIPTION (continued)
ENABLE
Pulling either the SEL1 or SEL2 pin low turns off the corresponding output. If both SEL1 and SEL2 are low for
more than 40ms, the IC shuts down and consumes less than 2µA (room temperature) current. The SEL pin can
also be used for PWM brightness dimming. To improve PWM dimming linearity, soft start is disabled if the time
between falling and rising edges of two adjacent SELx pulses is less than 40ms. See APPLICATION
INFORMATION for details.
Each SEL input pin has an internal pull down resistor to disable the device when the pin is floating.
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APPLICATION INFORMATION
MAXIMUM OUTPUT CURRENT
The over-current limit in a boost converter limits the maximum input current and thus maximum input power for a
given input voltage. Maximum output power is less than maximum input power due to power conversion losses.
Therefore, the current limit, input voltage, output voltage and efficiency can all change maximum current output.
Since current limit clamps peak inductor current, ripple has to be subtracted to derive maximum DC current. The
ripple current is a function of switching frequency, inductor value and duty cycle. The following equations take
into account of all the above factors for maximum output current calculation.
1
Ip +
1
L
) 1
Fs
Viout)Vf*Vin Vin
(2)
ƪ ǒ
Ǔ
ƫ
where
Ip = inductor peak-to-peak ripple
L = inductor value
Vf = power diode forward voltage
Fs = switching frequency
Viout = boost output voltage. It is equal to 330mV + voltage drop across WLED.
Vin
Iout_max +
ǒ
Ilim *
Ip
2
Ǔ
h
Viout
(3)
where
Iout_max = maximum output current of the boost converter
Ilim = overcurrent limit
η = efficiency
To keep a tight range of the overcurrent limit, The TPS61150A uses the Vin and Iout pin voltage to compensate
for the overcurrent limit variation caused by the slope compensation. However, the current threshold still has
residual dependency on the VIN and IOUT voltage. Use Figure 1 and Figure 2 to identify the typical overcurrent
limit in your application, and use ±25% tolerance to account for temperature dependency and process variations.
The maximum output current can also be limited by the current capability of the current sink circuitry. It is
designed to provide maximum 35mA current regardless of the current capability of the boost converter.
WLED BRIGHTNESS DIMMING
There are three ways to change the output current on the fly for WLED dimming. The first method parallels an
additional resistor with the ISET pin resistor as shown in Figure 13 . The switch (Q1) can change the ISET pin
resistance and therefore, modify the output current. This method is very simple, but can only provide limited
dimming steps.
ISET
R1
RISET
Q1
ON/OFF
Logic
Figure 13. Switching In/Out an Additional Resistor to Change Output Current
12
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APPLICATION INFORMATION (continued)
Alternatively, a PWM dimming signal at the SEL pin can modulate the output current by the duty cycle of the
signal. The logic high of the signal turns on the current sink circuit, while the logic low turns it off. This operation
creates an averaged DC output current proportional to the duty cycle of the PWM signal. The frequency of the
PWM signal has to be high enough to avoid flashing of the WLEDs. The soft start of the current sink circuit is
disabled during the PWM dimming to improve linearity.
The major concern of the PWM dimming is the creation of audible noises which can come from the inductor
and/or output capacitor of the boost converter. The audible noises on the output capacitor are created by the
presence of voltage ripple in range of audible frequencies. The TPS61150A alleviates the problem by
disconnecting the WLEDs from the output capacitor when the SEL pin is low. Therefore, the output capacitor is
not discharged by the WLEDs, which reduces the voltage ripple during PWM dimming.
The audible noises can be eliminated by using PWM dimming frequency above or below the audible frequency
range. The maximum PWM dimming frequency of the TPS61150A is determined by the current settling time
(tisink) which is the time required for the circuit sink circuit to reach steady state after the SEL pin transitions from
low to high. The maximum dimming frequency can be calculated by
D
F
PWM_MAX
+
T
min
isink
(4)
Dmin = min duty cycle of the PWM dimming required in the application.
For 20% Dmin, PWM dimming frequency up to 33kHz is possible, making the noise frequency above the audible
range.
The third method uses an external DC voltage and resistor as shown in Figure 14 to change the ISET pin
current, and thus control the output current. The DC voltage can be the output of a filtered PWM signal. The
equation to calculate the output current is
I
I
WLED
WLED
+K
+K
ǒ
ǒ
1.229 )
R
ISET
ISET
1.229 * V
R1
Ǔ
Ǔ
DC
1.229 * V
1.229 )
DC
R
R 1 ) 10K
ISET
ISET
for DC voltage input
(5)
for PWM signal input
(6)
KISET = current multiplier between the ISET pin current and the IFB pin current.
VDC= voltage of the DC voltage source or the DC voltage of the PWM signal.
ISET
ISET
Filter
PWM Signal
R1
RISET
DC Voltage
10 kW
0.1 mF
R1
RISET
Figure 14. Analog Dimming Uses an External Voltage Source to Control the Output Current
INDUCTOR SELECTION
Because the selection of the inductor affects power supplies steady state operation, transient behavior, and loop
stability, the inductor is the most important component in power regulator design. There are three specifications
most important to the performance of the inductor, inductor value, DC resistance, and saturation current.
Considering inductor value alone is not enough.
The inductors inductance value determines the inductor ripple current. It is generally recommended to set
peak-to-peak ripple current given by Equation 2 to 30–40% of DC current. It is a good compromise of power
losses and inductor size. For this reason, 10µH inductors are recommended for TPS61150A. Inductor DC
current can be calculated as
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APPLICATION INFORMATION (continued)
V
I
L_DC
+ iout
V
in
I out
h
(7)
Use the maximum load current and minimum VI for calculation.
The internal loop compensation for PWM control is optimized for the external component shown in the typical
application circuit with consideration of component tolerance. Inductor values can have ±20% tolerance with no
current bias. When the inductor current approaches saturation level, its inductance can decrease 20 to 35%
from the 0A value depending on how the inductor vendor defines saturation. Using an inductor with a smaller
inductance value forces discontinuous PWM in which inductor current ramps down to zero before the end of
each switching cycle. It reduces the boost converter’s maximum output current, and causes large input voltage
ripple. An inductor with larger inductance reduces the gain and phase margin of the feedback loop, possibly
resulting in instability
Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with
the PWM switch and power diode. Although the TPS61150A has optimized the internal switches, the overall
efficiency still relies on inductors DC resistance (DCR); Lower DCR improves efficiency. However, there is a
trade off between DCR and inductor size, and shielded inductors typically have higher DCR than unshielded
ones. DCR in range of 150mΩ to 350mΩ is suitable for applications requiring both on mode. DCR is the range
of 250mΩ to 450mΩ is a good choice for single output application. Table 2 and Table 3 list recommended
inductor models.
Table 2. Recommended Inductors for Single Output
L
(µH)
DCR Typ
(mΩ)
Isat
(A)
SIZE
(L×W×H mm)
VLF3012AT-100MR49
10
360
0.49
2.8×3.0×1.2
VLCF4018T-100MR74-2
10
163
0.74
4.0×4.0×1.8
CDRH2D11/HP
10
447
0.52
3.2×3.2×1.2
CDRH3D16/HP
10
230
0.84
4.0×4.0×1.8
TDK
Sumida
Table 3. Recommended Inductors for Dual Output
L
(µH)
DCR Typ
(mΩ)
Isat
(A)
SIZE
(L×W×H mm)
VLCF4018T-100MR74-2
10
163
0.74
4.0×4.0×1.8
VLF4012AT-100MR79
10
300
0.85
3.5×3.7×1.2
CDRH3D16/HP
10
230
0.84
4.0×4.0×1.8
CDRH4D11/HP
10
340
0.85
4.8×4.8×1.2
TDK
Sumida
INPUT AND OUTPUT CAPACITOR SELECTION
The output capacitor is mainly selected for the output ripple of the converter. This ripple voltage is the sum of the
ripple caused by the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a capacitor
with zero ESR, the minimum capacitance needed for a given ripple can be calculated by
C out +
ǒViout * VinǓ Iout
V
iout
Fs
V
ripple
(8)
Vripple = Peak-to-peak output ripple.
14
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TPS61150A
www.ti.com
SLVS706 – OCTOBER 2006
For VI = 3.6V, Viout = 20V, and Fs = 1.2MHz, 0.1% ripple (20mV) would require 1.0µF capacitor. For this value,
ceramic capacitors are the best choice for its size, cost and availability.
The additional output ripple component caused by ESR is calculated using:
Vripple_ESR = Iout× RESR
Due to it's low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or
electrolytic capacitors are used.
During a load transient, the capacitor at the output of the boost converter has to supply or absorb additional
current before the inductor current ramps up the steady state value. Larger capacitors always help to reduce the
voltage over and under shoot during a load transient. A larger capacitor also helps loop stability.
Care must be taken when evaluating a ceramic capacitor’s derating due to applied dc voltage, aging and
frequency response. For example, larger form factor capacitors (in 1206 size) have their self-resonant
frequencies in the range of TPS61150A’s switching frequency, so the effective capacitance is significantly lower.
Therefore, it may be necessary to use small capacitors in parallel instead of one large capacitor.
The popular vendors for high value ceramic capacitors are:
TDK (http://www.component.tdk.com/components.php)
Murata (http://www.murata.com/cap/index.html)
Table 4. Recommended Input and Output Capacitors
Capacitance (µF)
Voltage (V)
Case
C3216X5R1E475K
4.7
25
1206
C2012X5R1E105K
1
25
805
C1005X5R0J105K
1
6.3
402
GRM319R61E475KA12D
4.7
25
1206
GRM216R61E105KA12D
1
25
805
GRM155R60J105KE19D
1
6.3
402
TDK
Murata
LAYOUT CONSIDERATION
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems, therefore, use wide and short traces for high current paths. The input capacitor needs not only to
be close to the VIN pin, but also to the GND pin in order to reduce the input ripple seen by the IC. The VIN and
SW pins are conveniently located on the edges of the IC, therefore the inductor can be placed close to the IC.
The output capacitor needs to be placed near the load to minimize ripple and maximize transient performance.
It is also beneficial to have the ground of the output capacitor close to the GND pin since there will be large
ground return current flowing between them. When laying out signal ground, it is recommended to use short
traces separated from power ground traces, and connect them together at a single point.
Submit Documentation Feedback
15
TPS61150A
www.ti.com
SLVS706 – OCTOBER 2006
ADDITIONAL APPLICATION CIRCUIT
L1
VIN
C2
1mF
10mH
VIN
SW IOUT
C2
1m F
GND
EN/PWM
Dimming
SEL1
SEL2
IFB1
IFB2
ISET1 ISET2
R1
R2
Figure 15. Driving Up to 12 WLEDs With One LCD Backlight
Display
VIN
Keypad
L1
10mH
IFB1
ON
C1
1mF
IFB1
ON
VIN
SW IOUT
SEL1
C2
1mF
GND
IFB2
ON
SEL1
IFB2
ON
SEL2
SEL2
40ms
IC
Shutdown
ISET1
R1
IFB1
IFB2
ISET2
R2
Figure 16. Driving a Keypad and LCD Backlight by applying interleaved PWM signal to the SEL1 and
SEL2 pins. The duty cycle of the PWM signal controls brightness dimming
16
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Oct-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS61150ADRCR
ACTIVE
VSON
DRC
10
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BTK
Samples
TPS61150ADRCT
ACTIVE
VSON
DRC
10
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
BTK
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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