TPS65266EVM-686

User's Guide SLVUAD7A – November 2014 – Revised December 2014 TPS65266EVM-686 Evaluation Module This document presents the information required to operate the TPS65266 PMIC as well as the support documentation including schematic, layout, hardware setup, and bill of materials (BOM). 1 2 3 4 5 6 Contents Introduction ................................................................................................................... TPS65266 EVM Schematic ................................................................................................ Board Layout ................................................................................................................. Bench Test Setup Conditions .............................................................................................. Power-Up Procedure ........................................................................................................ Bill of Materials ............................................................................................................... 2 3 4 7 8 9 List of Figures 1 TPS65266EVM-686 Schematic ............................................................................................ 3 2 Component Placement (Top Layer) ....................................................................................... 4 3 Board Layout (Top Layer) 4 Board Layout (Second Layer) .............................................................................................. 5 5 Board Layout (Third Layer) ................................................................................................. 5 6 Board Layout (Bottom Layer) 7 Headers Description and Jumper Placement ............................................................................ 7 .................................................................................................. .............................................................................................. 4 6 List of Tables .................................................................................................. 1 Summary of Performance 2 Input/Output Connection .................................................................................................... 8 3 Jumpers ....................................................................................................................... 8 4 Bill of Materials ............................................................................................................... 9 SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS65266EVM-686 Evaluation Module 2 1 Introduction 1 www.ti.com Introduction The TPS65266 PMIC is a triple 3A/2A/2A output current, synchronous step-down (buck) converter with an operational range of 2.7 to 6.5 V. The feedback voltage reference for each buck is 0.6 V. Each buck is independent with dedicated enable, soft-start, and loop compensation. The TPS65266 operates in force continuous current mode (FCC) at light load. As there are many possible options to set the converters, Table 1 presents the performance specification summary for the EVM. Table 1. Summary of Performance Test Conditions Performance VIN = 2.7 to 6.5 V fsw = 1 MHz (25°C ambient) Buck1, 1.0 V, up to 3 A Buck2, 1.5 V, up to 2 A Buck3, 1.8 V, up to 2 A The evaluation module is designed to provide access to the features of the TPS65266 device. Some modifications can be made to this module to test performance at different input and output voltages, current, and switching frequency. Please contact TI Field Applications Group for advice on these matters. 2 TPS65266EVM-686 Evaluation Module SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS65266 EVM Schematic www.ti.com 2 TPS65266 EVM Schematic Figure 1 illustrates the TPS65266 EVM schematic. R1 C1 0.047uF TP1 VOUT1 1.0V 3A L1 0 TP2 VIN 3.3V U1 C2 22uF 2.2uH 28 VIN VIN1 BST1 25 C3 22uF R2 0 C4 TP3 J1 TP4 TP5 C5 C7 22uF J4 C8 22uF C9 22uF 12 R4 0 VIN2 13 LX1 VIN3 FB1 GND COMP1 5 VINQ BST2 C11 2.2uF LX2 26 22 R3 DNI GND C6 GND DNI R6 1000pF VFB1 GND R7 C10 0.047uF TP6 L2 0 C12 22uF 2.2uH 10 C13 22uF R8 0 TP8 J2 TP9 C14 C15 EN1 EN2 EN3 29 EN1 30 FB2 EN2 31 COMP2 EN3 BST3 LX3 24 FB3 SS2 COMP3 17 SS3 PGOOD C24 0.01uF SYN 20 6 DNI R10 VFB2 7 R13 AGND AGND AGND AGND AGND ROSC R18 51.1k GND PGND1 PGND2 PGND3 PAD GND VFB2 R12 1000pF C17 0.047uF GND TP10 R9 4 VIN C18 22uF R14 0 TP11 J3 C21 GND 20k GND DNI VFB3 1000pF R17 DNI TP7 C19 22uF TP12 C25 100k 1 2 3 21 32 VOUT3 1.8V 2A GND C20 R15 GND R11 10.0k 15.0k L3 VFB3 18 27 11 14 33 DNI 0 15 19 GND DNI 20k 16 GND C16 2.2uH SS1 8 C23 0.01uF VOUT2 1.5V 2A GND GND C22 0.01uF GND R5 15.0k 10.0k 23 9 VFB1 DNI 9.1k DNI GND R16 10.0k 20.0k GND GND GND TPS65266RHB GND VIN R19 100k R20 100k J5 J6 1 2 3 R22 DNI C26 1000pF R23 DNI GND GND EN1 R21 100k J7 1 2 3 C27 4700pF 1 2 3 R24 DNI GND GND EN2 TP14 C28 0.01uF GND GND TP13 SYN GND EN3 Figure 1. TPS65266EVM-686 Schematic SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback TPS65266EVM-686 Evaluation Module Copyright © 2014, Texas Instruments Incorporated 3 Board Layout 3 www.ti.com Board Layout Figure 2 through Figure 6 illustrate the printed-circuit board (PCB) layouts. Figure 2. Component Placement (Top Layer) Figure 3. Board Layout (Top Layer) 4 TPS65266EVM-686 Evaluation Module SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Board Layout www.ti.com Figure 4. Board Layout (Second Layer) Figure 5. Board Layout (Third Layer) SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS65266EVM-686 Evaluation Module 5 Board Layout www.ti.com Figure 6. Board Layout (Bottom Layer) 6 TPS65266EVM-686 Evaluation Module SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Bench Test Setup Conditions www.ti.com 4 Bench Test Setup Conditions 4.1 Headers Description and Jumper Placement Figure 7 illustrates the header descriptions and jumper placement on the EVM. Figure 7. Headers Description and Jumper Placement Test points: (A) LX of VOUT1 (B) LX of VOUT2 (C) LX of VOUT3 VOUT1, VOUT2, VOUT3, VIN, PGOOD, CLK_SYN SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated TPS65266EVM-686 Evaluation Module 7 Power-Up Procedure www.ti.com Table 2 lists the I/O connections and Table 3 lists the jumpers for the TPS65266EVM-686. Table 2. Input/Output Connection No. Function Description J1 Buck1 Connector Output of Buck1 J2 Buck2 Connector Output of Buck2 J3 Buck3 Connector Output of Buck3 J4 VIN Connector Apply power supply to this connector Table 3. Jumpers No. Function Placement J5 Buck1 enable (EN1) Connect EN1 to GND to disable VOUT1, connect EN1 to VIN through a 100-kΩ resistor to enable VOUT1; Leave open to enable VOUT1 J6 Buck2 enable (EN2) Connect EN2 to GND to disable VOUT2, connect EN2 to VIN through a 100-kΩ resistor to enable VOUT2; Leave open to enable VOUT2 J7 Buck3 enable (EN3) Connect EN3 to GND to disable VOUT3, connect EN3 to VIN through a 100-kΩ resistor to enable VOUT3; Leave open to enable VOUT3 5 Power-Up Procedure This section provides the steps for powering up the EVM. POWER-UP with the dedicated enable pin: 1. Apply 2.7 V – 6.5 V to J4 2. Toggle J5 , J6, or J7 to enable VOUT1, VOUT2, AND VOUT3, respectively 3. Apply loads to the output connectors 8 TPS65266EVM-686 Evaluation Module SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Bill of Materials www.ti.com 6 Bill of Materials Table 4 lists the BOM for this EVM. Table 4. Bill of Materials Designator Quantity PCB1 1 Value Description Package Reference Part Number Manufacturer PWR686 C1, C10, C17 3 0.047uF CAP, CERM, 0.047uF, 50V, +/-10%, X7R, 0603 Any 0603 C1608X7R1H473K C2, C3, C7, C8, C9, C12, C13, C18, C19 9 22uF TDK CAP, CERM, 22uF, 16V, +/-20%, X5R, 1206 1206 1206YD226MAT2A AVX C6, C16, C20 3 C11 1 1000pF CAP, CERM, 1000 pF, 50 V, +/- 10%, X7R, 0603 0603 C0603C102K5RACTU Kemet 2.2uF CAP, CERM, 2.2 uF, 10 V, +/- 10%, X5R, 0603 0603 C0603C225K8PACTU C22, C23, C24 Kemet 3 0.01uF CAP, CERM, 0.01uF, 50V, +/-5%, X7R, 0603 0603 C0603C103J5RACTU Kemet C26 1 1000pF CAP, CERM, 1000 pF, 50 V, +/- 5%, X7R, 0603 0603 C0603C102J5RACTU Kemet C27 1 4700pF CAP, CERM, 4700 pF, 50 V, +/- 5%, X7R, 0603 0603 C0603C472J5RACTU Kemet C28 1 0.01uF CAP, CERM, 0.01 uF, 50 V, +/- 5%, X7R, 0603 0603 C0603C103J5RACTU Kemet H1, H2, H3, H4 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M J1, J2, J3, J4 4 Terminal Block, 6A, 3.5mm Pitch, 2-Pos, TH 7.0x8.2x6.5mm ED555/2DS On-Shore Technology J5, J6, J7 3 Header, 100mil, 3x1, Tin plated, TH Header, 3 PIN, 100mil, Tin PEC03SAAN Sullins Connector Solutions L1, L2, L3 3 Inductor, Shielded Drum Core, Superflux, 2.2 uH, 9 A, 0.0115 ohm, SMD WE-HC4 744311220 Wurth Elektronik eiSos LBL1 1 Thermal Transfer Printable Labels, 0.650" W x 0.200" H - 10,000 per roll PCB Label 0.650"H x 0.200"W THT-14-423-10 Brady R1, R2, R4, R7, R8, R13, R14 7 0 RES, 0 ohm, 5%, 0.1W, 0603 0603 CRCW06030000Z0EA Vishay-Dale R3 1 9.1k RES, 9.1 k, 5%, 0.1 W, 0603 0603 CRCW06039K10JNEA Vishay-Dale R5, R12 2 15.0k RES, 15.0 k, 1%, 0.1 W, 0603 0603 CRCW060315K0FKEA Vishay-Dale R6, R11, R16 3 10.0k RES, 10.0k ohm, 1%, 0.1W, 0603 0603 CRCW060310K0FKEA Vishay-Dale R9, R19, R20, R21 4 100k RES, 100k ohm, 1%, 0.1W, 0603 0603 CRCW0603100KFKEA Vishay-Dale R10, R15 2 20k RES, 20 k, 5%, 0.1 W, 0603 0603 CRCW060320K0JNEA Vishay-Dale R17 1 20.0k RES, 20.0k ohm, 1%, 0.1W, 0603 0603 CRCW060320K0FKEA Vishay-Dale R18 1 51.1k RES, 51.1 k, 1%, 0.1 W, 0603 0603 CRCW060351K1FKEA Vishay-Dale TP1, TP2, TP6, TP7, TP10, TP13 6 White Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone TP3, TP5, TP8, TP11, TP14 5 Black Test Point, Miniature, Black, TH Black Miniature Testpoint 5001 Keystone U1 1 2.7V to 6.5V Input Voltage, 3A/2A/2A Output Current Triple Synchronous Step-down Converters, RHB0032E RHB0032E TPS65266RHB Texas Instruments C4, C14, C15, C21, C25 0 22pF CAP, CERM, 22pF, 50V, +/-5%, C0G/NP0, 0603 0603 06035A220JAT2A AVX C5 0 82pF CAP, CERM, 82pF, 50V, +/-5%, C0G/NP0, 0603 0603 06035A820JAT2A AVX R22, R23, R24 0 DNI RES, 100k ohm, 1%, 0.1W, 0603 0603 CRCW0603100KFKEA Vishay-Dale TP4, TP9, TP12 0 DNI Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone Printed Circuit Board 2.2uH SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback TPS65266EVM-686 Evaluation Module Copyright © 2014, Texas Instruments Incorporated 9 Revision History www.ti.com Revision History Changes from Original (November 2014) to A Revision ................................................................................................ Page • Changed pulse skipping mode (PSM) to force continuous current mode (FCC) . ................................................ 2 NOTE: Page numbers for previous revisions may differ from page numbers in the current version. 10 Revision History SLVUAD7A – November 2014 – Revised December 2014 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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