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Table of Contents
User’s Guide
TPS65270 Buck Converter Evaluation Module User's
Guide
Table of Contents
1 Introduction.............................................................................................................................................................................2
2 Background.............................................................................................................................................................................3
3 Schematic................................................................................................................................................................................4
4 Board Layout...........................................................................................................................................................................5
5 Bench Test Setup Conditions................................................................................................................................................ 6
5.1 Headers Description and Jumper Placement.....................................................................................................................6
5.2 Jumpers..............................................................................................................................................................................7
6 Power-Up Procedure.............................................................................................................................................................. 8
7 Bill of Materials....................................................................................................................................................................... 9
8 Revision History......................................................................................................................................................................9
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Introduction
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1 Introduction
This document presents the information required to power the TPS65270 PMIC as well as the support
documentation including schematic and bill of materials.
2
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Background
2 Background
The TPS65270 PMIC is designed to provide 2-A and 3-A continuous currents with an operational range of 4.5 V
to 16 V and an externally set switching frequency ranging from 300 kHz to 1.4 MHz. When the PMIC is not fully
loaded, Buck1 can be loaded to 2.5 A and Buck2 to 3.5 A.
As there are many possible options to set the converters, Table 2-1 presents the performance specification
summary for the EVM.
Table 2-1. Input Voltage and Output Current Summary
EVM
TEST CONDITIONS
TPS65270EVM
VIN = 4.5 V to 16 V
fsw = 620 kHz
OUTPUT CURRENT RANGE
Buck1, 1.8 V, up to 2 A
Buck2, 1.2 V, up to 3 A
(25°C ambient)
This evaluation module is designed to provide access to the features of the TPS65270. Some modifications
can be made to this module to test performance at different input and output voltages, current and frequency
operation. Please contact TI Field Applications Group for advice on these matters.
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Schematic
3 Schematic
Figure 3-1. TPS65270 Schematic
4
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Board Layout
4 Board Layout
Figure 4-2. Board Layout (Top Layer)
Figure 4-1. Placement (Top Layer)
Figure 4-3. Board Layout (Bottom Layer)
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Bench Test Setup Conditions
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5 Bench Test Setup Conditions
5.1 Headers Description and Jumper Placement
A
JP1/ EN1
VOUT1
VIN
JP3/LOW_P
GND
12V
VOUT2
JP2/EN2
B
Figure 5-1. Headers Description and Jumper Placement
Test points:
A: LX of VOUT1
B: LX of VOUT2
VOUT1, VOUT2, VCC, EN1, EN2, LOW_P
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Bench Test Setup Conditions
5.2 Jumpers
Table 5-1. Jumpers
JUMPER
NO.
FUNCTION
PLACEMENT
JP1
BUCK1 enable (EN1)
Connect EN1 to GND to disable VOUT1, connect
EN1 to VIN to enable VOUT1;
Leave open to enable VOUT1
JP2
BUCK2 enable (EN2)
Connect EN2 to GND to disable VOUT2, connect
EN2 to VIN to enable VOUT2;
Leave open to enable VOUT2
JP3
COMMENT
Connect LOW_P to GND to enter forced PWM
Low Power Mode (LOW_P) mode; Connect LOW_P to VCC to enter automatic
PSM/PWM mode
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Power-Up Procedure
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6 Power-Up Procedure
1. Apply 4.5 V - 16 V to J3.
2. Toggle JP1 or JP2 to enable VOUT1 and VOUT2 respectively.
3. Apply loads to the output connectors.
8
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Bill of Materials
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7 Bill of Materials
Table 7-1. Bill of Materials
ITEM
(1)
(2)
(3)
(4)
QUANTITY
DESIGNATOR
VALUE
FOOTPRINT
MANUFACTURER
DESCRIPTION
1
2
C1, C7
4.7nF
603
Generic
CAP 4700PF 50V CERAMIC
X7R 0603
2
2
C2, C6
10nF
603
Generic
CAP 10000PF 50V CERM X7R
0603
3
2
C3, C5
2.2nF
603
Generic
CAP 2200PF 50V CERAMIC
X7R 0603
4(1)
2
C3A, C5A
100pF
603
Generic
CAP100PF 50V CERAMIC X7R
0603
5
2
C9, C13
10uF
1210
Generic
CAP 10UF 35V CERAMIC X5R
1210
6
1
C4
10uF
603
Generic
CAP CER 10UF 10V X5R 20%
0603
7
2
C8, C12
47nF
603
Generic
CAP 47000PF 50V CERAMIC
X7R 0603
8
2
C10, C14
22uF
1210
Generic
CAP 22UF 16V CERAMIC X5R
1210
9(1)
2
C11, C15
82pF
603
Generic
CAP 82PF 50V CERAMIC X7R
0603
10
3
J1, J2, J3
ED555/2DS
TB_2X3.5MM
Onshore technology Inc
Terminal Block, 2-pin, 6-A,
3.5mm
11(2)
3
JP1, JP2, JP3
NA
JMP0.3
Mil Max/Generic
SIP HEADER 64
POS STRAIGHT PCB
(800-10-064-10-001000 )
12
2
L1, L2
4.7uH
IND_744311470
Wurth Electronics Inc
Magnetic-Core Inductor
13
2
R1, R2
10K
603
Generic
RES 10.0K OHM 1/10W 1%
0603 SMD
14
2
R4, R5
0
603
Generic
RES 0 OHM 1/10W 1% 0603
SMD
15
2
R4A, R5A
40.2K
603
Generic
RES 40.2K OHM 1/10W 1%
0603 SMD
16
1
R4B
32.4K
603
Generic
RES 32.4K OHM 1/10W 1%
0603 SMD
17
1
R5B
80.6K
603
Generic
RES 80.6K OHM 1/10W 1%
0603 SMD
18
2
R6, R7
200K
603
Generic
RES 200K OHM 1/10W 1%
0603 SMD
19
1
R8
383K
603
Generic
RES 3830K OHM 1/10W 1%
0603 SMD
20
2
R13, R24
47
603
Generic
RES 47 OHM 1/10W 1% 0603
SMD
21
3
TP1, TP2, TP3
5001
TH-40
Keystone Electronics
Test Point, Black, Thru Hole
Color Keyed
22
5
TP5, TP6, TP7,
TP8, TP9
5002
TH-40
Keystone Electronics
Test Point, White, Thru Hole
Color Keyed
23
1
U1
NA
RGE24
Texas Instruments
'TPS65270RGE24
24(3)
4
NA
NA
NA
3M
SJ-5303 (CLEAR), BUMPON
HEMISPHERE .44X.20 CLEAR
25(4)
3
NA
NA
NA
Sullins Connector Solutions
SPC02SYAN, CONN JUMPER
SHORTING GOLD FLASH
Optional
Split into three pins
Install item 24 on bottom at corners.
Install item 25 on item 11 no order - be consistent
8 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
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Revision History
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Changes from Revision B (December 2011) to Revision C (May 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................2
• Updated user's guide title .................................................................................................................................. 2
10
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