0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
TPS76201DBVRG4

TPS76201DBVRG4

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOT23-5

  • 描述:

    IC REG LDO ADJ 0.1A SOT23-5

  • 数据手册
  • 价格&库存
TPS76201DBVRG4 数据手册
                 SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 D D D D D D D DBV PACKAGE (TOP VIEW) 100-mA Low-Dropout Regulator Adjustable Output Voltage (0.7 V to 5.5 V) Only 23 µA Quiescent Current at 100 mA 1 µA Quiescent Current in Standby Mode Over Current Limitation −40°C to 125°C Operating Junction Temperature Range 5-Pin SOT-23 (DBV) Package IN 1 GND 2 EN 3 5 OUT 4 FB GROUND CURRENT vs JUNCTION TEMPERATURE description 27 VI = 2.7 V Ground Current − µA IO = 100 mA VO = 0.7 V The TPS76201 low-dropout (LDO) voltage 25 regulator features an adjustable output voltage as low as 0.7 V. It is an ideal regulator for sub 1.2-V 23 DSP core voltage supplies and is equally suited IO = 10 µA 21 for similar applications with other low-voltage processors and controllers. SOT-23 packaging 19 and the high-efficiency that results from the regulator’s ultralow power operation make the 17 TPS76201 especially useful in handheld and 15 portable battery applications. This regulator −40 −25 −10 5 20 35 50 65 80 95 110 125 features low dropout voltages and ultralow TJ − Junction Temperature − °C quiescent current compared to conventional LDO regulators. Offered in a 5-terminal small outline integrated-circuit SOT-23 package, the TPS76201 is ideal for micropower operations and where board space is at a premium. A combination of new circuit design and process innovation has enabled the usual PNP pass transistor to be replaced by a PMOS pass element. Since the PMOS pass element is a voltage-driven device, the quiescent current is ultralow (30 µA maximum) and is stable over the entire range of output load current (10 µA to 100 mA). Intended for use in portable systems such as laptops and cellular phones, the ultralow-power operation results in a significant increase in the system battery operating life. The TPS76201 also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 µA typical at TJ = 25°C. The TPS76201 is offered in an adjustable version (programmable over the range of 0.7 V to 5.5 V). AVAILABLE OPTIONS† TJ VOLTAGE PACKAGE −40°C to 125°C Variable 0.7 V to 5.5 V SOT-23 (DBV) PART NUMBER TPS76201DBVT‡ TPS76201DBVR§ SYMBOL PFUI † Contact the factory for availability of fixed output options. ‡ The DBVT indicates tape and reel of 250 parts. § The DBVR indicates tape and reel of 3000 parts. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright  2001−2007, Texas Instruments Incorporated        ! "#$ !  %#&'" ($) (#"! "  !%$""! %$ *$ $!  $+! !#$! !(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($ $!.  '' %$$!) www.ti.com 1                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)Ĕ Input voltage range    . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 13.5 V Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VI + 0.3 V Voltage on OUT, FB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to network ground terminal. DISSIPATION RATING TABLE BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING Low K‡ High K§ DBV 65.8°C/W 259°C/W 3.9 mW/°C 386 mW 212 mW 154 mW DBV 65.8°C/W 180°C/W 5.6 mW/°C 555 mW 305 mW 222 mW ‡ The JEDEC Low K (1s) board design used to derive this data was a 3 inch x 3 inch, two layer board with 2 ounce copper traces on top of the board. § The JEDEC High K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. recommended operating conditions MIN NOM MAX UNIT Input voltage, VI (see Note 2) 2.7 10 Output voltage range, VO 0.7 5.5 V V Continuous output current, IO (see Note 3) 0.01 100 mA Operating junction temperature, TJ −40 125 °C NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula: VImin = VOmax + VDO(max load) 3. Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. www.ti.com 2                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 electrical characteristics over recommended operating free-air temperature range, VI = VO(typ) + 1 V, IO = 100 mA, EN = 0 V, Co = 4.7 µF (unless otherwise noted) PARAMETER TEST CONDITIONS Output voltage (10 µA A to 100 mA load) (see Note 4) Quiescent current (GND current) (see Notes 4 and 5) Load regulation Output voltage line regulation (∆VO/VO) (see Note 5) Output noise voltage Output current limit Standby current 0.7 V ≤ VO ≤ 5.5 V, MIN TJ = 25°C TJ = −40°C to 125°C 0.7 V ≤ VO ≤ 5.5 V, TYP 0.97VO 1.03VO EN = 0V, 10 µA < IO < 100 mA TJ = 25°C EN = 0 V, 10 µA < IO < 100 mA TJ = −40°C to 125°C, EN = 0 V, 10 µA < IO < 100 mA TJ = 25°C 12 2.7 V < VI ≤ 10 V, See Note 4 TJ = 25°C, 0.04 2.7 V < VI ≤ 10 V, TJ = −40°C to 125°C, UNIT V 23 A µA 30 mV %/V 0.1 See Note 4 BW = 300 Hz to 50 kHz, Co = 10 µF, VO = 0.7 V, TJ = 25°C VO = 0 V, EN = VI, MAX VO µVRMS 60 See Note 4 350 2.7 < VI < 10 V 750 FB input current TJ = −40°C to 125°C FB = 0.666 V −1 High level enable input voltage 2.7 V < VI < 10 V 1.7 Low level enable input voltage 2.7 V < VI < 10 V Power supply ripple rejection f = 1 kHz, TJ = 25°C, 2 µA 1 µA V 0.8 Co = 10 µF, See Note 4 60 EN = 0 V −1 Input current (EN) mA µA 1 0 V dB 1 µA EN = VI −1 1 µA NOTES: 4. Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10 V, minimum output current 10 µA, maximum output current 100 mA. 5. If VO ≤ 1.8 V then VImin = 2.7 V, VImax = 10 V: Line Reg. (mV) + ǒ%ńVǓ V O 100 If VO ≥ 2.5 V then VImin = VO + 1 V, VImax = 10 V: Line Reg. (mV) + ǒ%ńVǓ ǒVImax * 2.7 VǓ V O 1000 ǒVImax * ǒVO ) 1 VǓǓ 100 1000 www.ti.com 3                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 functional block diagram TPS76201 OUT IN EN Current Limit / Thermal Protection VREF FB GND Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION GND 2 EN 3 I Ground Enable input FB 4 I Feedback voltage IN 1 I Input supply voltage OUT 5 O Regulated output voltage TYPICAL CHARACTERISTICS Table of Graphs FIGURE vs Output current VO zo VDO Output voltage vs Junction temperature 3 Ground current vs Junction temperature 4 Output spectral noise density vs Frequency 5 Output impedance vs Frequency 6 vs Input voltage 7 vs Junction temperature 8 Dropout voltage Power supply ripple rejection vs Frequency 9 Output voltage and enable voltage vs Time (start-up) 10 Line transient response 11, 13 Load transient response 12, 14 Equivalent series resistance (ESR) vs Output current www.ti.com 4 1, 2 15, 16                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE vs OUTPUT CURRENT 2.520 2.505 2.500 2.495 2.490 0.705 0.700 0.695 0.690 2.485 2.480 0.710 0 20 40 60 80 IO − Output Current − mA 0.685 100 0 19 17 15 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C OUTPUT IMPEDANCE vs FREQUENCY 3.5 VI = 2.7 V VO = 0.7 V, IO = 1 mA, Co = 4.7 µF 450 400 350 3 300 250 200 150 100 0 100 1 IO = 1 mA 0.5 0 IO = 100 mA −0.5 1k 10 k f − Frequency − Hz −1.5 10 100 k 100 1000 IO = 100 mA VDO− Dropout Voltage − mV 160 TJ = 125°C 120 TJ = 25°C 80 60 VI = 3.2 V CO = 4.7 µF IO = 100 mA 100 IO = 10 mA 10 TJ = −40°C 1M POWER SUPPLY RIPPLE REJECTION vs FREQUENCY 90 VI = 2.7 V VO = 0.7 V Co = 4.7 µF 80 70 60 50 IO = 1 mA 40 30 20 IO = 100 mA 10 0 20 4 6 8 VI − Input Voltage − V 1k 10 k 100 k f − Frequency − Hz Figure 6 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 180 Figure 7 2 1.5 Figure 5 DROPOUT VOLTAGE vs INPUT VOLTAGE 2 2.5 VI = 2.7 V VO = 0.7 V Co = 4.7 µF RESR ≈ 0.3 −1 50 Figure 4 40 0.6655 Figure 3 zo − Output Impedance − Ω IO = 10 µA 21 100 IO = 100 mA 0.6660 0.6645 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C 100 Power Supply Ripple Rejection − dB µA 23 Output Spectral Noise Density − nV Hz IO = 100 mA 140 0.6665 OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY 25 Ground Current − 20 40 60 80 IO − Output Current − mA 500 VI = 2.7 V VO = 0.7 V IO = 1 mA 0.6670 Figure 2 GROUND CURRENT vs JUNCTION TEMPERATURE 27 VI = 2.7 V VO = Vref Co = 4.7 µF 0.6650 Figure 1 VDO − Dropout Voltage − mV 0.6675 VO − Output Voltage − V 2.510 0.6680 VI = 2.7 V VO = 0.7 V Co = 4.7 µF TJ = 25° C 0.715 VO − Output Voltage − V VO − Output Voltage − V 0.720 VI = 3.5 V VO = 2.5 V Co = 4.7 µF TJ = 25° C 2.515 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE 10 1 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 8 −10 10 100 1k 10 k 100 k f − Frequency − Hz 1M 10 M Figure 9 www.ti.com 5                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 TYPICAL CHARACTERISTICS 0 0 20 40 60 80 100 120 140 160 180 200 t − Time (Start-Up) − µs 2.7 0 −10 IO = 10 mA VO = 0.7 V Co = 4.7 µF 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs 0 -100 VI = 2.7 V VO = 0.7 V Co = 10 µF -200 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs Figure 12 LOAD TRANSIENT RESPONSE Current Load − mA VI − Input Voltage − V 0 Figure 11 LINE TRANSIENT RESPONSE 4.5 3.5 VO − Output Voltage − mV 100 10 Figure 10 100 0 100 20 0 0 −20 VO = 2.5 V VI = 3.5 V Co = 10 µF VO = 2.5 V IO = 100 mA Co = 4.7 µF 0 0 50 100 150 200 250 300 350 400 450 500 t − Time − µs 20 40 Figure 13 −100 60 80 100 120 140 160 180 200 t − Time − µs Figure 14 TYPICAL REGIONS OF STABILITY TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT EQUIVALENT SERIES RESISTANCE (ESR) vs OUTPUT CURRENT 100 ESR − Equivalent Series Resistance − Ω ESR − Equivalent Series Resistance − Ω 100 Co = 4.7 µF 10 Region of Instability 1 Region of Instability 0.1 Co = 10 µF 10 Region of Instability 1 Region of Instability 0.1 0 0.02 0.04 0.06 0.08 0.10 0 0.02 0.04 0.06 IO − Output Current − A IO − Output Current − A Figure 16 Figure 15 www.ti.com 6 LOAD TRANSIENT RESPONSE 0.08 0.10 ∆ VO − Change In Output Voltage − mV 1 0.5 Current Load − mA 0 3.7 ∆ VO − Change In Output Voltage − mV 5 LINE TRANSIENT RESPONSE VI − Input Voltage − V VI = 2.7 V VO = 0.7 V Co = 4.7 µF Io = 100 mA TJ = 25°C VO − Output Voltage − mV VO − Output Voltage − V Enable Voltage − V OUTPUT VOLTAGE AND ENABLE VOLTAGE vs TIME (START-UP)                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 APPLICATION INFORMATION The TPS76201 low-dropout (LDO) regulator has been optimized for use in battery-operated equipment including, but not limited to, the sub 1.2-V DSP core voltage supplies. It features low quiescent current (23 µA nominally) and enable inputs to reduce supply currents to 1 µA when the regulators are turned off. A typical application circuit is shown in Figure 17. TPS76201 1 VI IN 5 OUT C1 1 µF 3 EN FB VO 4 + GND 2 4.7 µF ESR = 0.5 Ω Figure 17. Typical Application Circuit external capacitor requirements Although not required, a 0.047-µF or larger ceramic input bypass capacitor, connected between IN and GND and located close to the TPS76201, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source. Like all low dropout regulators, the TPS76201 requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µF. The ESR (equivalent series resistance) of the capacitor should be between 0.3 Ω and 1.5 Ω. to ensure stability. Capacitor values larger than 4.7 µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µF are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value series resistor to ensure stability. CAPACITOR SELECTION PART NO. MAX ESR† SIZE (H × L × W)‡ MFR. VALUE T494B475K016AS KEMET 4.7 µF 1.5 Ω 1.9 × 3.5 × 2.8 195D106x0016x2T SPRAGUE 10 µF 1.5 Ω 1.3 × 7.0 × 2.7 695D106x003562T SPRAGUE 10 µF 1.3 Ω 2.5 × 7.6 × 2.5 AVX 4.7 µF 0.6 Ω 2.6 × 6.0 × 3.2 TPSC475K035R0600 † ESR is maximum resistance in Ohms at 100 kHz and TA = 25°C. Contact manufacturer for minimum ESR values. ‡ Size is in mm. www.ti.com 7                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 APPLICATION INFORMATION output voltage programming The output voltage of the TPS76201 adjustable regulator is programmed using an external resistor divider as shown in Figure 18. The output voltage is calculated using: V O +V ǒ1 ) R1 Ǔ R2 ref (1) Where: Vref = 0.6663 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 66.5 kΩ to set the divider current at 10 µA and then calculate R1 using: R1 + ǒ Ǔ V V O *1 ref R2 (2) OUTPUT VOLTAGE PROGRAMMING GUIDE OUTPUT VOLTAGE (V) 0.7 DIVIDER RESISTANCE (kΩ)‡ R1 3.36 R2 TPS76201 VI 1 µF 1 IN 66.5 0.9 23.2 66.5 1.2 53.6 66.5 1.5 83.5 66.5 1.8 113 66.5 2.5 182 66.5 3.3 246 66.5 3.6 294 66.5 4 332 66.5 5 432 66.5 OUT ≥ 1.7 V 3 5 VO R1 EN ≤ 0.9 V FB GND 2 4 4.7 µF R2 ‡ 1% values shown. Figure 18. TPS76201 Adjustable LDO Regulator Programming www.ti.com 8 ESR = 0.5 Ω                  SLVS323B − FEBRUARY 2001 − REVISED JANUARY 2007 APPLICATION INFORMATION power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: P T max * T A + J D(max) R qJA Where: TJmax is the maximum allowable junction temperature. RθJA is the thermal resistance junction-to-ambient for the package, see the dissipation rating table. TA is the ambient temperature. The regulator dissipation is calculated using: P D ǒ Ǔ + V *V I O I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. regulator protection The TPS76201 PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS76201 features internal current limiting and thermal protection. During normal operation, the TPS76201 limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation resumes. www.ti.com 9 PACKAGE OPTION ADDENDUM www.ti.com 19-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS76201DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PFUI Samples TPS76201DBVRG4 ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PFUI Samples TPS76201DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 125 PFUI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
TPS76201DBVRG4 价格&库存

很抱歉,暂时无法提供与“TPS76201DBVRG4”相匹配的价格&库存,您可以联系我们找货

免费人工找货