TPS2105DBVRG4

TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 features D D D D D D D D D D typical applications Dual-Input, Single-Output MOSFET Switch With No Reverse Current Flow (No Parasitic Diodes) IN1 . . . 250-mΩ, 500-mA N-Channel; 18-µA Supply Current IN2 . . . 1.3-Ω, 100-mA P-Channel; 0.75-µA Supply Current (VAUX Mode) Advanced Switch Control Logic CMOS and TTL Compatible Enable Input Controlled Rise, Fall, and Transition Times 2.7 V to 5.5 V Operating Range SOT-23-5 and SOIC-8 Package – 40°C to 85°C Ambient Temperature Range 2-kV Human Body Model, 750-V Charged Device Model, 200-V Machine-Model ESD Protection D D D Notebook and Desktop PCs Cell phone, Palmtops, and PDAs Battery Management TPS2104 5 V VCC 5 V VAUX IN1 5V LOAD IN2 EN Control Signal Holdup Capacitor Figure 1. Typical Dual-Input Single-Output Application description The TPS2104 and TPS2105 are dual-input, single-output power switches designed to provide uninterrupted output voltage when transitioning between two independent power supplies. Both devices combine one n-channel (250 mΩ) and one p-channel (1.3 Ω) MOSFET with a single output. The p-channel MOSFET (IN2) is used with auxiliary power supplies that deliver lower current for standby modes. The n-channel MOSFET (IN1) is used with a main power supply that delivers higher current required for normal operation. Low on-resistance makes the n-channel the ideal path for higher main supply current when power-supply regulation and system voltage drops are critical. When using the p-channel MOSFET, quiescent current is reduced to 0.75 µA to decrease the demand on the standby power supply. The MOSFETs in the TPS2104 and TPS2105 do not have the parasitic diodes, typically found in discrete MOSFETs, thereby preventing back-flow current when the switch is off. TPS2104 D PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) EN GND 1 IN2 3 5 IN1 2 4 OUT IN2 GND EN NC 1 8 2 7 3 6 4 5 OUT OUT NC IN1 TPS2105 D PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) EN GND 1 IN2 3 5 IN1 2 4 OUT IN2 GND EN NC 1 8 2 7 3 6 4 5 OUT OUT NC IN1 NC – No internal connection Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 Selection Guide, VAUX Power-Distribution Switches DEVICE ENABLE OPERATING VOLTAGE RANGE (V) MAXIMUM INPUT CURRENT, IN1 (mA) MAXIMUM INPUT CURRENT, IN2 (mA) AMBIENT TEMPERATURE RANGE (°C) TPS2100 EN 2.7 to 4 500 10 – 40 to 70 TPS2101 EN 2.7 to 4 500 10 – 40 to 70 TPS2102 EN 2.7 to 4 500 100 – 40 to 70 TPS2103 EN 2.7 to 4 500 100 – 40 to 70 TPS2104 EN 2.7 to 5.5 500 100 – 40 to 85 TPS2105 EN 2.7 to 5.5 500 100 – 40 to 85 AVAILABLE OPTIONS FOR TPS2104, TPS2105 PACKAGED DEVICES TA – 40°C to 85°C DEVICE ENABLE SOT-23-5 (DBV)† SOIC-8 (D) TPS2104 EN TPS2104D TPS2105 EN TSP2104DBV† TPS2105DBV† TPS2105D Both packages are available left-end taped and reeled. Add an R suffix to the D device type (e.g., TPS2105DR). † Add T (e.g., TPS2104DBVT) to indicate tape and reel at order quantity of 250 parts. Add R (e.g., TPS2104DBVR) to indicate tape and reel at order quantity of 3000 parts. Function Tables TPS2104 TPS2105 VIN1 VIN2 EN OUT VIN1 VIN2 EN OUT 0V 0V XX GND 0V 0V XX GND 0V 5V L GND 0V 5V H GND 5V 0V L VIN1 5V 0V H VIN1 5V 5V L VIN1 5V 5V H VIN1 0V 5V H VIN2 0V 5V L VIN2 5V 0V H VIN2 5V 0V L VIN2 5V 5V H VIN2 5V 5V L VIN2 XX = don’t care 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 TPS2104 functional block diagram SW1 250 mΩ IN1 OUT Charge Pump Pullup Circuit VCC Select EN IN2 Discharge Circuit Driver SW2 1.3 Ω GND Driver TPS2105 functional block diagram SW1 250 mΩ IN1 OUT Charge Pump VCC Select EN IN2 Pulldown Circuit Driver Discharge Circuit SW2 1.3 Ω GND Driver POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 Terminal Functions TERMINAL NO. NAME TPS2104 DBV D TPS2105 DBV D 1 3 EN I Active-high enable for IN1-OUT switch I Active-low enable for IN1-OUT switch 2 I Ground 5 5 I Main input voltage, NMOS drain (250 mΩ), require 0.22 µF bypass 3 1 I Auxilliary input voltage, PMOS drain (1.3 Ω), require 0.22 µF bypass 4 7, 8 O Power switch output EN 1 3 GND IN1† 2 2 2 5 5 IN2† 3 1 OUT 4 7, 8 NC 4, 6 DESCRIPTION I/O 4, 6 No connection † Unused INx should not be grounded. detailed description power switches n-channel MOSFET The IN1-OUT n-channel MOSFET power switch has a typical on-resistance of 250 mΩ at 5-V input voltage, and is configured as a high-side switch. p-channel MOSFET The IN2-OUT p-channel MOSFET power switch has a typical on-resistance of 1.3 Ω at 5-V input voltage and is configured as a high-side switch. When operating, the p-channel MOSFET quiescent current is reduced to typically 0.75 µA. charge pump An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires very little supply current. driver The driver controls the gate voltage of the IN1-OUT and IN2-OUT power switches. To limit large current surges and reduce the associated electromagnetic interference (EMI) produced, the drivers incorporate circuitry that controls the rise times and fall times of the output voltage. enable The logic enable will turn on the IN2-OUT power switch when a logic high is present on EN (TPS2104) or logic low is present on EN (TPS2105). A logic low input on EN (TPS2104) or logic high on EN (TPS2105) restores bias to the drive and control circuits and turns on the IN1-OUT power switch. The enable input is compatible with both TTL and CMOS logic levels. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Input voltage range, VI(IN1) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V Input voltage range, VI(IN2) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V Input voltage range, VI at EN or EN (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V Continuous output current, IO(IN1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700 mA Continuous output current, IO(IN2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C Electrostatic discharge (ESD) protection: Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V Charged device model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 750 V † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are with respect to GND. DISSIPATION RATING TABLE PACKAGE TA < 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 309 mW 3.1 mW/°C 170 mW 123 mW D 568 mW 5.7 mW/°C 313 mW 227 mW recommended operating conditions Input voltage, VI(INx) Input voltage, VI at EN and EN MIN MAX 2.7 5.5 0 Continuous output current, IO(IN1) 5.5 500 100‡ Continuous output current, IO(IN2) UNIT V V mA mA Operating virtual junction temperature, TJ – 40 125 °C ‡ The device can deliver up to 220 mA at IO(IN2). However, operation at the higher current levels will result in greater voltage drop across the device, and greater voltage droop when switching between IN1 and IN2. electrical characteristics over recommended operating junction temperature range, VI(IN1) = V(IN2) = 5 V, IO = rated current (unless otherwise noted) power switch TEST CONDITIONS† PARAMETER rDS(on) DS( ) MIN TYP IN1 OUT IN1-OUT TJ = 25°C TJ = 125°C 250 IN2 OUT IN2-OUT TJ = 25°C TJ = 125°C 1.3 On state resistance On-state 350 1.5 MAX 435 2.4 UNIT mΩ Ω † Pulse-testing techniques maintain junction temperature close to ambient termperature; thermal effects must be taken into account separately. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 electrical characteristics over recommended operating junction temperature range, VI(IN1) = V(IN2) = 5 V, IO = rated current (unless otherwise noted) (continued) enable input (EN and EN) PARAMETER VIH VIL II TEST CONDITIONS High-level input voltage 2.7 V ≤ VI(INx) ≤ 5.5 V Low-level input voltage 2.7 V ≤ VI(INx) ≤ 5.5 V Input current MIN TYP MAX 2 UNIT V 0.8 V TPS2104 EN = 0 V or EN = VI(INx) –0.5 0.5 µA TPS2105 EN = 0 V or EN = VI(INx) –0.5 0.5 µA supply current PARAMETER TEST CONDITIONS TYP EN = H, IN2 selected 0.75 EN = L, IN1 selected TJ = 25°C –40°C ≤ TJ ≤ 125°C 18 EN = L,, IN2 selected TJ = 25°C –40°C ≤ TJ ≤ 125°C 0.75 EN = H,, IN1 selected TJ = 25°C –40°C ≤ TJ ≤ 125°C 18 TPS2104 II MIN TJ = 25°C –40°C ≤ TJ ≤ 125°C Supply current TPS2105 MAX 1.5 35 1.5 35 UNIT µA µA µA µA switching characteristics, TJ = 25°C, VI(IN1) = VI(IN2) = 5 V (unless otherwise noted)† TEST CONDITIONS† PARAMETER CL = 1 µF, IN1-OUT tr VI(IN2) ( )=0 CL = 10 µF, CL = 1 µF, Output rise time CL = 1 µF, IN2-OUT VI(IN1) ( )=0 CL = 10 µF, CL = 1 µF, CL = 1 µF, IN1-OUT tf tPHL Propagation delay time, time high-to-low high to low output IN1-OUT IN2-OUT IN1-OUT IN2-OUT 312 IL = 100 mA IL = 10 mA 3.4 1000 VI(IN2) = 0 VI(IN1) = 0 CL = 10 µF µF, IL = 100 mA VI(IN2) = 0 VI(IN1) = 0 CL = 10 µF µF, IL = 100 mA POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 µs 34 IL = 100 mA IL = 10 mA CL = 10 µF, UNIT 3.5 CL = 1 µF, VI(IN1) ( )=0 MAX 340 100 † All timing parameters refer to Figure 2. 6 IL = 100 mA IL = 100 mA 108 CL = 10 µF, CL = 1 µF, time low-to-high low to high output Propagation delay time, 340 IL = 100 mA IL = 100 mA VI(IN2) ( )=0 Output fall time tPLH TYP IL = 500 mA IL = 500 mA CL = 1 µF, IN2-OUT MIN IL = 500 mA IL = 500 mA 6 8 µs 990 55 1 1.5 50 µs µs TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 PARAMETER MEASUREMENT INFORMATION OUT IO CL LOAD CIRCUIT 50% EN or EN 50% EN or EN tPHL VI tPLH VI 90% VO GND GND VO 10% Propagation Delay Time, Low-to-High-Level Output Propagation Delay Time, High-to–Low-Level Output tr tf VI 90% VO 10% GND Rise/Fall Time 50% EN or EN 50% EN or EN ton toff VI VI 90% VO VO GND GND 10% Turnoff Transition Time Turnon Transition Time WAVEFORMS Figure 2. Test Circuit and Voltage Waveforms Table of Timing Diagrams† FIGURE Propagation Delay and Rise Time With 1-µF Load, IN1 3 Propagation Delay and Rise Time With 1-µF Load, IN2 4 Propagation Delay and Fall Time With 1-µF Load, IN1 5 Propagation Delay and Fall Time With 1-µF Load, IN2 † Waveforms shown in Figures 3–6 refer to TPS2104 at TJ = 25°C POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 6 7 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 PARAMETER MEASUREMENT INFORMATION VI(IN1) = 5 V VI(IN2) = 0 V CL = 1 µF RL = 50 Ω EN (2 V/div) EN (2 V/div) VO (2 V/div) VO (2 V/div) t – Time – 2 µs/div t – Time – 200 µs/div Figure 3. Propagation Delay and Rise Time With 1-µF Load, IN1 Turnon EN (2 V/div) VI(IN1) = 5 V VI(IN2) = 0 V CL = 1 µF RL = 50 Ω Figure 4. Propagation Delay and Rise Time With 1-µF Load, IN2 Turnon VI(IN1) = 0 V VI(IN2) = 5 V CL = 1 µF RL = 50 Ω EN (2 V/div) VO (2 V/div) VO (2 V/div) t – Time – 50 µs/div t – Time – 10 µs/div Figure 5. Propagation Delay and Fall Time With 1-µF Load, IN1 Turnoff 8 VI(IN1) = 0 V VI(IN2) = 5 V CL = 1 µF RL = 50 Ω POST OFFICE BOX 655303 Figure 6. Propagation Delay and Fall Time With 1-µF Load, IN2 Turnoff • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 TYPICAL CHARACTERISTICS Table of Graphs FIGURE IN1 Switch Rise Time vs Output Current 7 IN2 Switch Fall Time vs Output Current 8 IN1 Switch Fall Time vs Output Current 9 IN2 Switch Fall Time vs Output Current 10 Output Voltage Droop vs Output Current When Output Is Switched From IN2 to IN1 11 Inrush Current vs Output Capacitance 12 IN1 Supply Current vs Junction Temperature (IN1 Enabled) 13 IN1 Supply Current vs Junction Temperature (IN1 Disabled) 14 IN2 Supply Current vs Junction Temperature (IN2 Enabled) 15 IN2 Supply Current vs Junction Temperature (IN2 Disabled) 16 IN1-OUT On-State Resistance vs Junction Temperature 17 IN2-OUT On-State Resistance vs Junction Temperature 18 IN1 SWITCH RISE TIME vs OUTPUT CURRENT IN2 SWITCH RISE TIME vs OUTPUT CURRENT 400 1000 CL = 100 µF CL = 100 µF CL = 47 µF t r – Rise Time – µ s t r – Rise Time – µ s 370 VI(IN1) = 5 V VI(IN2) = 0 V TJ = 25°C 340 310 CL = 47 µF CL = 10 µF 280 250 0.01 100 CL = 10 µF VI(IN1) = 0 V VI(IN2) = 5 V TJ = 25°C 10 CL = 1 µF CL = 1 µF 0.1 100 1 10 IO – Output Current – mA 1000 0.1 0 10 Figure 7 20 30 40 50 60 70 80 IO – Output Current – mA 90 100 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 TYPICAL CHARACTERISTICS IN1 SWITCH FALL TIME vs OUTPUT CURRENT IN2 SWITCH FALL TIME vs OUTPUT CURRENT 10000 1000 CL = 100 µF t f – Output Fall Time – ms t f – Fall Time – µ s 1000 CL = 100 µF CL = 47 µF CL = 10 µF 100 CL = 1 µF 10 100 CL = 10 µF 10 CL = 1 µF CL = 47 µF 1 VI(IN1) = 5 V VI(IN2) = 0 V TJ = 25°C 1 0.01 0.1 VI(IN1) = 0 V VI(IN2) = 5 V TJ = 25°C 100 1 10 IO – Output Current – mA 0.1 0.01 1000 Figure 9 INRUSH CURRENT vs OUTPUT CAPACITANCE 3.5 CL = 1 µF CL = 10 µF VI(IN1) = 5 V VI(IN2) = 0 V RL = 10 Ω TJ = 25°C 3 0.8 2.5 CL = 47 µF Inrush Current – A VO– Output Voltage Droop – V VI(IN1) = 5 V VI(IN2) = 5 V TJ = 25°C 0.6 CL = 100 µF 0.4 100 Figure 10 OUTPUT VOLTAGE DROOP vs OUTPUT CURRENT WHEN OUTPUT IS SWITCHED FROM IN2 TO IN1† 1 10 1 0.1 IO – Output Current – mA CL = 220 µF 2 1.5 1 0.2 0.5 0 0.01 0 0.1 1 10 IO – Output Current – mA 100 0 Figure 11 100 200 300 400 Co – Output Capacitance – µF 500 Figure 12 † If switching from IN1 to IN2, the voltage droop is much smaller. Therefore, the load capacitance should be chosen according to the curves in Figure 15. 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 TYPICAL CHARACTERISTICS IN1 SUPPLY CURRENT vs JUNCTION TEMPERATURE (IN1 DISABLED) IN1 SUPPLY CURRENT vs JUNCTION TEMPERATURE (IN1 ENABLED) 0.55 29 VI(IN1) = 5.5 V VI(IN1) = 5.5 V 0.49 VI(IN1) = 5 V VI(IN1) = 4 V 0.43 VI(IN1) = 3.3 V VI(IN1) = 5 V I CC – Supply Current – µ A I CC – Supply Current – µ A 25 VI(IN1) = 4 V 21 17 VI(IN1) = 3.3 V 13 VI(IN1) = 2.7 V 0.37 0.31 0.25 VI(IN1) = 2.7 V 9 –40 80 110 –10 20 50 TJ – Junction Temperature – °C 0.19 –40 140 80 110 –10 20 50 TJ – Junction Temperature – °C Figure 13 Figure 14 IN2 SUPPLY CURRENT vs JUNCTION TEMPERATURE (IN2 ENABLED) IN2 SUPPLY CURRENT vs JUNCTION TEMPERATURE (IN2 DISABLED) 0.65 0.3 VI(IN2) = 5.5 V 0.27 VI(IN2) = 4 V I CC – Supply Current – µ A I CC – Supply Current – µ A VI(IN2) = 5.5 V VI(IN2) = 5 V 0.59 VI(IN2) = 3.3 V 0.53 VI(IN2) = 2.7 V 0.47 0.41 0.35 –40 140 VI(IN2) = 5 V VI(IN2) = 4 V 0.24 VI(IN2) = 3.3 V VI(IN2) = 2.7 V 0.21 0.18 –10 20 50 80 110 TJ – Junction Temperature – °C 140 0.15 –40 Figure 15 –10 80 110 20 50 TJ – Junction Temperature – °C 140 Figure 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 TYPICAL CHARACTERISTICS IN2-OUT ON-STATE RESISTANCE vs JUNCTION TEMPERATURE IN1-OUT ON-STATE RESISTANCE vs JUNCTION TEMPERATURE 3 r on – IN1-OUT On-State resistance – Ω r on – IN1-OUT On-State resistance – m Ω 360 VI(IN1) = 2.7 V 320 VI(IN1) = 3.3 V VI(IN1) = 4 V VI(IN1) = 5 V 280 VI(IN1) = 5.5 V 240 200 –40 80 110 –10 20 50 TJ – Junction Temperature – °C VI(IN2) = 2.7 V 2.5 VI(IN2) = 3.3 V 2 VI(IN2) = 4 V 1.5 VI(IN2) = 5.5 V 1 VI(IN2) = 5 V 0.5 –40 140 –10 20 50 80 110 140 TJ – Junction Temperature – °C Figure 17 Figure 18 APPLICATION INFORMATION TPS2104 CardBus or System Controller 0.22 µF EN 5 V VCC IN1 5 V VAUX IN2 5V OUT 1 µF xx µF GND 0.22 µF Figure 19. Typical Application power-supply considerations A 0.22-µF ceramic bypass capacitor between IN and GND, close to the device is recommended. The output capacitor should be chosen based on the size of the load during the transition of the switch. A 220-µF capacitor is recommended for 100-mA loads. Typical output capacitors (xx µF, shown in Figure 19) required for a given load can be determined from Figure 11 which shows the output voltage droop when output is switched from IN2 to IN1. The output voltage droop is insignificant when output is switched from IN1 to IN2. Additionally, bypassing the output with a 1-µF ceramic capacitor improves the immunity of the device to short-circuit transients. 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 APPLICATION INFORMATION power supply considerations (continued) switch transition The n-channel MOSFET on IN1 uses a charge pump to create the gate-drive voltage, which gives the IN1 switch a rise time of approximately 0.4 ms. The p-channel MOSFET on IN2 has a simpler drive circuit that allows a rise time of approximately 4 µs. Because the device has two switches and a single enable pin, these rise times are seen as transition times, from IN1 to IN2, or IN2 to IN1, by the output. The controlled transition times help limit the surge currents seen by the power supply during switching. thermal protection Thermal protection provided on the IN1 switch prevents damage to the IC when heavy-overload or short-circuit faults are present for extended periods of time. The increased dissipation causes the junction temperature to rise to dangerously high levels. The protection circuit senses the junction temperature of the switch and shuts it off at approximately 145°C (TJ). The switch remains off until the junction temperature has dropped approximately 10°C. The switch continues to cycle in this manner until the load fault or input power is removed. undervoltage lockout An undervoltage lockout function is provided to ensure that the power switch is in the off state at power up. Whenever the input voltage falls below approximately 2 V, the power switch quickly turns off. This function facilitates the design of hot-insertion systems that may not have the capability to turn off the power switch before input power is removed. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce EMI and voltage overshoots. power dissipation and junction temperature The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass large currents. The thermal resistances of these packages are high compared to those of power packages; it is good design practice to check power dissipation and junction temperature. First, find ron at the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read ron from Figure 17 or Figure 18. Next calculate the power dissipation using: P D + ron I2 Finally, calculate the junction temperature: T J + PD R qJA ) TA Where: TA = Ambient temperature RθJA = Thermal resistance Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees, repeat the calculation using the calculated value as the new estimate. Two or three iterations are generally sufficient to obtain a reasonable answer. ESD protection All TPS2104 and TPS2105 terminals incorporate ESD-protection circuitry designed to withstand a 2-kV human-body-model, 750-V CDM, and 200-V machine-model discharge as defined in MIL-STD-883C. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 MECHANICAL DATA DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE 0,50 0,30 0,95 5 0,20 M 4 1,70 1,50 1 0,15 NOM 3,00 2,60 3 Gage Plane 3,00 2,80 0,25 0°–8° 0,55 0,35 Seating Plane 1,45 0,95 0,05 MIN 0,10 4073253-4/E 05/99 NOTES: A. B. C. D. 14 All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. Falls within JEDEC MO-178 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS2104, TPS2105 VAUX POWER-DISTRIBUTION SWITCHES SLVS235A – SEPTEMBER 1999 – REVISED APRIL 2000 MECHANICAL DATA D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 14 0.010 (0,25) M 8 0.008 (0,20) NOM 0.244 (6,20) 0.228 (5,80) 0.157 (4,00) 0.150 (3,81) Gage Plane 0.010 (0,25) 1 7 0°– 8° A 0.044 (1,12) 0.016 (0,40) Seating Plane 0.069 (1,75) MAX 0.010 (0,25) 0.004 (0,10) PINS ** 0.004 (0,10) 8 14 16 A MAX 0.197 (5,00) 0.344 (8,75) 0.394 (10,00) A MIN 0.189 (4,80) 0.337 (8,55) 0.386 (9,80) DIM 4040047 / D 10/96 NOTES: A. B. C. D. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). Falls within JEDEC MS-012 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 15 PACKAGE OPTION ADDENDUM www.ti.com 14-Oct-2022 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) TPS2104DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDLI Samples TPS2104DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDLI Samples TPS2105D ACTIVE SOIC D 8 75 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 2105 Samples TPS2105DBVR ACTIVE SOT-23 DBV 5 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDMI Samples TPS2105DBVT ACTIVE SOT-23 DBV 5 250 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 PDMI Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of