TRS3221E
SLLS792B – JUNE 2007 – REVISED JULY 2021
TRS3221E 3-V TO 5.5-V Single-Channel RS-232 Line Driver/Receiver
with ±15-kV IEC ESD Protection In Small Package
1 Features
•
•
•
•
•
•
•
•
•
•
•
ESD Protection for RS-232 Pins
– ±15-kV Human-Body Model (HBM)
– ±8 kV (IEC 61000-4-2, contact discharge)
– ±15 kV (IEC 61000-4-2, air-gap discharge)
Meets or exceeds the requirements of TIA/
EIA-232-F and ITU v.28 standards
Operates with 3-V to 5.5-V VCC supply
Operates up to 250 kbit/s
One driver and one receiver
Near chip-scale package, 16-pin VQFN (RGT, 82%
smaller than TSSOP package)
Low standby current: 1 μA Typical
External capacitors: 4 × 0.1 μF
Accepts 5-V logic input with 3.3-V supply
Alternative high-speed pin-compatible device (1
Mbit/s)
– TRSF3221E
Auto-powerdown feature automatically disables
drivers for power savings
2 Applications
•
•
•
•
•
•
•
•
•
Industrial PCs
Wired networking
Data center and enterprise computing
Battery-powered systems
PDAs
Notebooks
Laptops
Palmtop PCs
Hand-held equipment
3 Description
The TRS3221E is a single driver, single receiver
RS-232 solution operating from a single VCC supply.
The RS-232 pins provide IEC G1000-4-2 ESD
protection. The device meets the requirements of
TIA/EIA-232-F and provides the electrical interface
between an asynchronous communication controller
and the serial-port connector. The charge pump and
four small external capacitors allow operation from a
single 3-V to 5.5-V supply. These devices operate at
data signaling rates up to 250 kbit/s and a maximum
of 30-V/μs driver output slew rate.
Flexible control options for power management are
available when the serial port is inactive. The autopowerdown feature functions when FORCEON is
low and FORCEOFF is high. During this mode of
operation, if the device does not sense a valid RS-232
signal on the receiver input, the driver output is
disabled. If FORCEOFF is set low and EN is high,
both the driver and receiver are shut off, and the
supply current is reduced to 1 μA. Disconnecting
the serial port or turning off the peripheral drivers
causes the auto-powerdown condition to occur. Autopowerdown can be disabled when FORCEON and
FORCEOFF are high.
With auto-powerdown enabled, the device is activated
automatically when a valid signal is applied to the
receiver input. The INVALID output notifies the user
if an RS-232 signal is present at the receiver input.
INVALID is high (valid data) if the receiver input
voltage is greater than 2.7 V or less than –2.7 V, or
has been between –0.3 V and 0.3 V for less than 30
μs. INVALID is low (invalid data) if the receiver input
voltage is between –0.3 V and 0.3 V for more than 30
μs. Refer to Figure 7-5 for receiver input levels.
Device Information
PART NUMBER
TRS3221E
(1)
PACKAGE(1)
BODY SIZE (NOM)
SSOP (DB) (16)
6.20 mm x 5.30 mm
TSSOP (PW) (16)
5.00 mm × 4.40 mm
VQFN (RGT) (16)
3.00 mm x 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
DIN
FORCEOFF
13
11
DOUT
16
10
12
Auto-Powerdown
INVALID
FORCEON
ROUT
8
9
RIN
1
EN
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TRS3221E
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SLLS792B – JUNE 2007 – REVISED JULY 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 ESD Ratings, IEC Specifications................................ 4
6.4 Recommended Operating Conditions.........................5
6.5 Thermal Information....................................................5
6.6 Electrical Characteristics.............................................5
6.7 Driver Section Electrical Characteristics..................... 6
6.8 Driver Section Switching Characteristics.................... 6
6.9 Receiver Section Electrical Characteristics................ 7
6.10 Receiver Section Switching Characteristics..............7
6.11 Auto-Powerdown Section Electrical
Characteristics...............................................................8
6.12 Auto-Powerdown Section Switching
Characteristics...............................................................8
6.13 Typical Characteristics.............................................. 9
7 Parameter Measurement Information.......................... 10
8 Detailed Description......................................................13
8.1 Overview................................................................... 13
8.2 Functional Block Diagram......................................... 13
8.3 Feature Description...................................................13
8.4 Device Functional Modes..........................................14
9 Application Information Disclaimer............................. 15
9.1 Application Information............................................. 15
9.2 Typical Application.................................................... 15
9.3 Design Requirements............................................... 16
9.4 Detailed Design Procedure....................................... 16
9.5 Application Curve......................................................16
10 Layout...........................................................................17
10.1 Layout Guidelines................................................... 17
10.2 Layout Example...................................................... 17
11 Device and Documentation Support..........................18
11.1 Receiving Notification of Documentation Updates.. 18
11.2 Support Resources................................................. 18
11.3 Trademarks............................................................. 18
11.4 Electrostatic Discharge Caution.............................. 18
11.5 Glossary.................................................................. 18
12 Mechanical, Packaging, and Orderable
Information.................................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2020) to Revision B (July 2021)
Page
• Changed the Applications list............................................................................................................................. 1
• Changed the table note for the ESD Ratings, IEC Specifications to make it applicable to all packages............4
• Changed the thermal information for PW and DB packages.............................................................................. 5
Changes from Revision * (June 2007) to Revision A (December 2020)
Page
• Added ESD Ratings, ESD Ratings, IEC Specifications tables, Thermal Information table, Typical
Characteristics section, Detailed Description section, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section...................................................................................................1
• Deleted Ordering Information table.....................................................................................................................1
• Added the RGT (VQFN-16) package pinout ......................................................................................................3
• Added data rate and tsk(p) rows for the RGT package in Driver Section Switching Characteristics table ..........6
• Added tpLH, tpHL, tsk(p) rows for the RGT package in Reciever Section Switching Characteristics table ............7
2
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13
5
6
12
7
8
10
9
11
C1-
1
C2+
2
FORCEOFF
4
16
15
14
13
12
VCC
11 GND
Thermal Pad
C2-
3
10 DOUT
V-
4
9
Figure 5-1. 16-Pin SSOP (DB) or TSSOP (PW)
Packages, Top View
5
6
7
FORCEON
8
DIN
15
14
EN
2
3
INVALID
C1+
V+
C1C2+
C2VRIN
FORCEOFF
VCC
GND
DOUT
FORCEON
DIN
INVALID
ROUT
V+
16
ROUT
1
RIN
EN
C1+
5 Pin Configuration and Functions
Figure 5-2. 16-pin VQFN (RGT) Package, Top View
Table 5-1. Pin Functions
PIN
TYPE
DESCRIPTION
DB or
PW
RGT
C1+
2
16
—
C2+
5
2
—
C1–
4
1
—
C2–
6
3
—
DIN
11
8
I
Driver input
DOUT
13
10
O
RS-232 driver output
EN
1
14
I
Low input enables receiver ROUT output. High input sets ROUT to high impedance.
FORCEOFF
16
13
I
Automatic power-down control input
FORCEON
12
9
I
Automatic power-down control input
GND
14
11
GND
INVALID
10
7
O
Invalid output pin. Output is low when all RIN inputs are unpowered.
RIN
8
5
I
RS-232 receiver input
ROUT
9
6
O
Receiver output
VCC
15
12
—
3-V to 5.5-V supply voltage
V+
3
15
O
5.5-V supply generated by the charge pump
V–
7
4
O
–5.5-V supply generated by the charge pump
None
Thermal
Pad
-
Exposed thermal pad. Can be connected to GND or left floating.
NAME
Thermal Pad
Positive terminals of the voltage-doubler charge-pump capacitors
Negative terminals of the voltage-doubler charge-pump capacitors
Ground
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage range(2)
VCC
range(2)
V+
Positive output supply voltage
V–
Negative output supply voltage range(2)
V+ – V–
Supply voltage
Input voltage range
VO
Output voltage range
TJ
Operating virtual junction temperature
Tstg
Storage temperature range
(2)
MAX
6
V
–0.3
7
V
0.3
–7
V
13
V
difference(2)
VI
(1)
MIN
–0.3
DIN, FORCEOFF, FORCEON, EN
–0.3
6
RIN
–25
25
–13.2
13.2
–0.3
VCC + 0.3
DOUT
ROUT, INVALID
–65
UNIT
V
V
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to network GND.
6.2 ESD Ratings
VALUE
V(ESD)
Electrostatic discharge
Human-body model (HBM), per
ANSI/ESDA/JEDEC JS-001(1)
All pins except RIN and DOUT
±3000
RIN and DOUT
pins (RS232 ports)
±15000
Charged-device model (CDM), per
All pins
JEDEC specification JESD22-C101(2)
(1)
(2)
UNIT
V
±1500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 ESD Ratings, IEC Specifications
NAME
RIN, DOUT
(1)
4
TEST CONDITIONS
TYP
(1)
±8000
IEC 61000-4-2 Air-Gap Discharge (1)
±15000
IEC 61000-4-2 Contact Discharge
UNIT
V
A minimum of 1-µF capacitor is required between VCC and GND to meet the specified IEC ESD level
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6.4 Recommended Operating Conditions
See Figure 9-1, and note (1)
VCC = 3.3 V
Supply voltage
VCC = 5 V
VIH
Driver and control high-level input voltage DIN, FORCEOFF, FORCEON, EN
VIL
Driver and control low-level input voltage
DIN, FORCEOFF, FORCEON, EN
VI
Driver and control input voltage
DIN, FORCEOFF, FORCEON
VI
Receiver input voltage
TA
(1)
Operating free-air temperature
VCC = 3.3 V
VCC = 5 V
TRS3221EC
TRS3221EI
MIN
NOM
MAX
3
3.3
3.6
4.5
5
5.5
2
UNIT
V
V
2.4
0.8
V
0
5.5
V
–25
25
V
0
70
–40
85
°C
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.5 Thermal Information
TRS3221E
THERMAL METRIC(1)
DB (SSOP)
PW (TSSOP)
RGT (VQFN)
16 PINS
16 PINS
16 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
105.8
110.9
52.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
51.9
41.7
60.6
°C/W
RθJB
Junction-to-board thermal resistance
57.6
57.2
26.8
°C/W
ψJT
Junction-to-top characterization parameter
14.1
4.2
2.5
°C/W
ψJB
Junction-to-board characterization parameter
56.8
56.6
26.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
N/A
12.0
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.6 Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
PARAMETER
II
Input leakage current
TEST CONDITIONS(2)
Supply current
Powered off
Auto-powerdown
enabled
(1)
(2)
MAX
±0.01
±1
μA
0.3
1
mA
No load,
FORCEOFF at GND
1
10
No load, FORCEOFF at VCC,
FORCEON at GND,
All RIN are open or grounded
1
10
FORCEOFF,
FORCEON, EN
No load,
FORCEOFF and
FORCEON at VCC
Auto-powerdown
disabled
ICC
TYP(1)
MIN
VCC = 3.3 V or 5 V,
TA = 25°C
UNIT
μA
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.7 Driver Section Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
TEST CONDITIONS(3)
PARAMETER
MIN
TYP(1)
MAX
UNIT
VOH
High-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = GND
5
5.4
V
VOL
Low-level output voltage
DOUT at RL = 3 kΩ to GND,
DIN = VCC
–5
–5.4
V
IIH
High-level input current
VI = VCC
±0.01
±1
μA
IIL
Low-level input current
VI = GND
±0.01
±1
μA
IOS
Short-circuit
output current(2)
VCC = 3.6 V,
VO = 0 V
±35
±60
VCC = 5.5 V,
VO = 0 V
±35
±60
ro
Output resistance
VCC, V+, and V– = 0 V,
VO = ±2 V
Ioff
(1)
(2)
(3)
Output leakage current
FORCEOFF = GND
300
10M
mA
Ω
VO = ±12 V,
VCC = 3 V to 3.6 V
±25
VO = ±10 V,
VCC = 4.5 V to 5.5 V
±25
μA
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Short-circuit durations should be controlled to prevent exceeding the device absolute power-dissipation ratings, and not more than one
output should be shorted at a time.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.8 Driver Section Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
TEST CONDITIONS(3)
PARAMETER
Maximum data rate
tsk(p)
Pulse
SR(tr)
Slew rate,
transition region
(see Figure 7-1)
(1)
(2)
(3)
6
skew(2)
CL = 1000 pF,
RL = 3 kΩ, See
Figure 7-1
MIN
TYP(1)
RGT package
250
500
DB or PW
package
150
250
CL = 1000 pF,
RL = 3 kΩ Figure 7-2
RGT package
CL = 150 pF to 2500 pF,
RL = 3 kΩ to 7 kΩ,
See Figure 7-2
DB or PW
package
VCC = 3.3 V,
RL = 3 kΩ to 7 kΩ
MAX
UNIT
kbit/s
50
ns
100
CL = 150 pF to 1000 pF
6
30
CL = 150 pF to 2500 pF
4
30
V/μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.9 Receiver Section Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
TEST CONDITIONS(2)
PARAMETER
VOH
High-level output voltage
IOH = –1 mA
VOL
Low-level output voltage
IOL = 1.6 mA
VIT+
Positive-going input threshold voltage
VIT–
Negative-going input threshold voltage
Vhys
Input hysteresis (VIT+ – VIT–)
Ioff
Output leakage current
EN = VCC
ri
Input resistance
VI = ±3 V to ±25 V
(1)
(2)
MIN
TYP(1)
VCC – 0.6
VCC – 0.1
MAX
V
0.4
VCC = 3.3 V
1.6
2.4
VCC = 5 V
1.9
2.4
VCC = 3.3 V
0.6
1.1
VCC = 5 V
0.8
1.4
V
V
V
0.5
3
UNIT
V
±0.05
±10
μA
5
7
kΩ
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
6.10 Receiver Section Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 9-1)
TEST CONDITIONS(3)
PARAMETER
tPLH
tPHL
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
TYP(1)
CL = 150 pF, See Figure RGT package
7-3
DB or PW package
100
CL = 150 pF, See Figure RGT package
7-3
DB or PW package
125
UNIT
ns
150
ns
150
ten
Output enable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
tdis
Output disable time
CL = 150 pF, RL = 3 kΩ, See Figure 7-4
200
ns
RGT package
25
ns
DB or PW package
50
tsk(p)
(1)
(2)
(3)
Pulse
skew(2)
See Figure 7-3
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
Pulse skew is defined as |tPLH – tPHL| of each channel of the same device.
Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
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6.11 Auto-Powerdown Section Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5)
PARAMETER
TEST CONDITIONS
MIN
VT+(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VCC
VT–(valid)
Receiver input threshold
for INVALID high-level output voltage
FORCEON = GND,
FORCEOFF = VCC
–2.7
VT(invalid)
Receiver input threshold
for I NVALID low-level output voltage
FORCEON = GND,
FORCEOFF = VCC
–0.3
VOH
INVALID high-level output voltage
IOH = –1 mA, FORCEON = GND,
FORCEOFF = VCC
VOL
INVALID low-level output voltage
IOL = 1.6 mA, FORCEON = GND,
FORCEOFF = VCC
MAX
UNIT
2.7
V
V
0.3
V
VCC – 0.6
V
0.4
V
6.12 Auto-Powerdown Section Switching Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 7-5)
PARAMETER
tvalid
Propagation delay time, low- to high-level output
tinvalid
Propagation delay time, high- to low-level output
ten
Supply enable time
(1)
8
TYP(1)
UNIT
1
μs
30
μs
100
μs
All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
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6.13 Typical Characteristics
Receiver Low-to-High Propagation Delay (ns)
VCC = 3.3 V and TA = 25 °C unless specified otherwise.
220
CL = 150 pF
CL = 250 pF
CL = 1000 pF
CL = 2500 pF
200
Driver Pulse Skew (ns)
180
160
140
120
100
80
60
40
20
0
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
120
-40 qC
25 qC
85 qC
115
110
105
100
95
90
85
80
75
5.5
3
3.25
3.5
3.75
4
D001
4.25 4.5
VCC (V)
4.75
5
Figure 6-2. Receiver Path Low-to-High Propagation Delay vs TA
and Supply Voltage (RGT Package)
-40 qC
25 qC
85 qC
140
Receiver Path Skew (| tpLH -tpHL |) (ns)
Receiver High-to-Low Propagation Delay (ns)
D002_rx_tpLH.grf
150
145
135
130
125
120
115
110
105
100
95
3
3.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
-40 qC
25 qC
85 qC
3
3.25
D003
D003_rx_tpHL.grf
Figure 6-3. Receiver Path High-to-Low Propagation Delay vs TA
and Supply Voltage (RGT Package)
5.5
D002
D001_tx_skew.grf
Figure 6-1. Driver Pulse Skew vs Load Capacitance and Supply
Voltage at TA = 25 °C (RGT Package)
5.25
3.5
3.75
4
4.25 4.5
VCC (V)
4.75
5
5.25
5.5
D004
D004_rx_skew.grf
Figure 6-4. Receiver Pulse Skew (|tpLH - tpHL|) vs TA and Supply
Voltage (RGT Package)
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7 Parameter Measurement Information
FORCEON
3V
Generator
(see Note B)
3V
Input
RS-232
Output
50 Ω
RL
tTHL
CL
(see Note A)
3V
FORCEOFF
TEST CIRCUIT
0V
3V
3V
Output
SR(tr) +
tTLH
−3 V
−3 V
6V
t THL or tTLH
VOH
VOL
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-1. Driver Slew Rate
FORCEON
3V
Generator
(see Note B)
3V
RS-232
Output
50 Ω
RL
Input
1.5 V
1.5 V
0V
CL
(see Note A)
tPLH
tPHL
VOH
3V
FORCEOFF
50%
50%
Output
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-2. Driver Pulse Skew
EN = VCC
3V
Input
1.5 V
1.5 V
−3 V
Output
Generator
(see Note B)
50 Ω
tPHL
CL
(see Note A)
tPLH
VOH
50%
Output
50%
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-3. Receiver Propagation Delay Times
10
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3V
Input
VCC
1.5 V
GND
S1
0V
tPZH
(S1 at GND)
tPHZ
(S1 at GND)
RL
3 V or 0 V
1.5 V
VOH
Output
50%
Output
CL
(see Note A)
EN
Generator
(see Note B)
0.3 V
tPZL
(S1 at VCC)
tPLZ
(S1 at VCC)
50 Ω
0.3 V
Output
50%
VOL
TEST CIRCUIT
NOTES: A.
B.
C.
D.
VOLTAGE WAVEFORMS
CL includes probe and jig capacitance.
The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
Figure 7-4. Receiver Enable and Disable Times
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2.7 V
EN = GND
3V
0V
Receiver
Input
0V
ROUT
Generator
(see Note B)
2.7 V
−2.7 V
−2.7 V
−3 V
50 Ω
tvalid
tinvalid
VCC
Autopowerdown
INVALID
INVALID
Output
CL = 30 pF
(see Note A)
FORCEOFF
FORCEON
DIN
DOUT
50% VCC
50% VCC
0V
ten
V+
≈V+
Supply
Voltages
0.3 V
VCC
0V
0.3 V
V−
≈V−
TEST CIRCUIT
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎ
VOLTAGE WAVEFORMS
Valid RS-232 Level, INVALID High
2.7 V
Indeterminate
0.3 V
0V
If Signal Remains Within This Region
For More Than 30 µs, INVALID Is Low†
−0.3 V
Indeterminate
−2.7 V
Valid RS-232 Level, INVALID High
†
Auto-powerdown disables drivers and reduces supply
current to 1 µA.
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR = 5 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
Figure 7-5. INVALID Propagation Delay Times and Driver Enabling Time
12
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8 Detailed Description
8.1 Overview
The TRS3221E device is a one-driver and one-receiver RS-232 interface device. The RS-232 input and output
are protected up to ±15 kV using the Human-Body Model. The charge pump requires only four small 0.1-μF
capacitors for operation from a 3.3-V supply. The TRS3221E device is capable of running at data rates up to 250
kbps while maintaining RS-232-compliant output levels.
Automatic power down can be disabled when FORCEON and FORCEOFF are high. With automatic power down
plus enabled, the device activates automatically when a valid signal is applied to any receiver input. The device
can automatically power down the driver to save power when the RIN input is unpowered.
INVALID is high (valid data) if receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been
between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if receiver input voltages are
between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 7-5 for receiver input levels.
8.2 Functional Block Diagram
3.3 V, 5 V
POWER
EN [RX]
FORCEON
APD
FORCEOFF
DIN
1
1
TX
DOUT
RS232
1
ROUT
INVALID
RX
1
RIN
RS232
STATUS
8.3 Feature Description
8.3.1 Power
The power block increases, inverts, and regulates voltage at V+ and V– pins using a charge pump that requires
four external capacitors. The automatic power-down feature for the driver is controlled by FORCEON and
FORCEOFF inputs. The receiver is controlled by the EN input (see Table 8-1 and Table 8-2).
When the device is unpowered, it can be safely connected to an active remote RS232 device.
8.3.2 RS232 Driver
One driver interfaces standard logic level to RS232 levels. DIN input must be valid high or low.
8.3.3 RS232 Receiver
One receiver interfaces RS232 levels to standard logic levels. An open input results in a high output on ROUT.
RIN input includes an internal standard RS232 load. A logic high input on the EN pin shuts down the receiver
output.
8.3.4 RS232 Status
The INVALID output goes low when RIN input is unpowered for more than 30 μs. The INVALID output goes high
when the receiver has a valid input. The INVALID output is active when Vcc is powered regardless of FORCEON
and FORCEOFF inputs (see Table 8-3).
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8.4 Device Functional Modes
Table 8-1. Driver
INPUTS(1)
DIN
(1)
FORCEON
OUTPUT
FORCEOFF
VALID RIN RS-232
LEVEL
DRIVER STATUS
DOUT
X
X
L
X
Z
Powered off
L
H
H
X
H
H
H
H
X
L
Normal operation with
automatic power down disabled
L
L
H
Yes
H
H
L
H
Yes
L
L
L
H
No
Z
H
L
H
No
Z
Normal operation with
automatic power down enabled
Powered off by
automatic power-down feature
H = high level, L = low level, X = irrelevant, Z = high impedance, Yes = |RIN| > 2.7 V, No = |RIN| < 0.3 V
Table 8-2. Receiver
INPUTS(1)
(1)
OUTPUT
RIN
EN
VALID RIN RS-232
LEVEL
X
H
X
Z
L
L
X
H
H
L
X
L
Open
L
No
H
RECEIVER STATUS
ROUT
Output off
Normal operation
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
Table 8-3. INVALID
INPUTS(1)
(1)
OUTPUT
RIN
FORCEON
FORCEOFF
EN
INVALID
L
X
X
X
H
H
X
X
X
H
Open
X
X
X
L
H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off
13
11
DIN
DOUT
16
FORCEOFF
12
Automatic
Power Down
10
INVALID
FORCEON
9
8
RIN
ROUT
1
EN
Figure 8-1. Logic Diagram
14
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9 Application Information Disclaimer
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TRS3221E device is designed to convert single-ended signals into RS232-compatible signals, and RS232compatible signals into single-ended signals.
This device can be used in any application where an RS232 line driver or receiver is required. One benefit of this
device is its ESD protection, which helps protect other components on the board when the RS232 lines are tied
to a physical connector
9.2 Typical Application
EN
1
16
2
VCC
C1+
15
+
3
C1
+
−
+
C3
−
4
5
(A)
V+
Automatic
Power Down
GND
C1−
6
RIN
12
C2−
7
11
V−
10
C4
+
CBYPASS = 0.1 µF
DOUT
C2+
C2
−
−
14
13
+
−
FORCEOFF
8
9
FORCEON
DIN
INVALID
ROUT
5 kΩ
A.
B.
C.
D.
C3 can be connected to VCC or GND.
Resistor values shown are nominal.
Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they must be connected as
shown.
See Table 9-1 for capacitor values.
Figure 9-1. Typical Operating Circuit and Capacitor Values
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9.3 Design Requirements
•
Recommended VCC is 3.3 V or 5 V
– 3 V to 5.5 V is also possible
– Maximum recommended bit rate is 250 kbps
– Use capacitors as shown in Figure 9-1 and Table 9-1
Table 9-1. VCC versus Capacitor Values
VCC
C1
C2, C3, and C4
3.3 V ± 0.3 V
0.1 µF
0.1 µF
5 V ± 0.5 V
0.047 µF
0.33 µF
3 V to 5.5 V
0.1 µF
0.47 µF
9.4 Detailed Design Procedure
For proper operation, add capacitors as shown in Figure 9-1 and Table 9-1.
•
•
DIN, FORCEOFF and FORCEON inputs must be connected to valid low or high logic levels
Select capacitor values based on VCC level for best performance
ROUT and DIN connect to UART or general purpose logic lines. FORCEON and FORCEOFF may be connected
general purpose logic lines or tied to ground or VCC. INVALID may be connected to a general purpose logic
line or left unconnected. RIN and DOUT lines connect to a RS232 connector or cable. DIN, FORCEON, and
FORCEOFF inputs must not be left unconnected.
9.5 Application Curve
VCC of 3.3 V and 250 kbps alternative bit data stream
6
5
4
Voltage (V)
3
2
1
0
±1
±2
±3
±4
DIN
DOUT to RIN
ROUT
±5
±6
0
1
2
3
4
5
6
7
Time ( s)
8
9
10
C001
Figure 9-2. 250 kbps Driver to Receiver Loopback Timing Waveform, VCC= 3.3 V
16
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Power Supply Recommendations
VCC must be between 3 V and 5.5 V. Charge pump capacitors must be chosen using Table 9-1.
10 Layout
10.1 Layout Guidelines
Keep the external capacitor traces short. This is more important on C1 and C2 nodes, which have the fastest
rise and fall times.
10.2 Layout Example
Ground
C3
1 EN
2 C1+
FORCEOFF 16
VCC 15
VCC
0.1 µF
C1
3 V+
GND 14
4 C1-
DOUT 13
5 C2+
FORCEON 12
6 C2-
DIN 11
Ground
C2
Ground
7 V-
INVALID 10
C4
8 RIN
ROUT 9
Figure 10-1. Layout Diagram
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11 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
11.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.5 Glossary
TI Glossary
18
This glossary lists and explains terms, acronyms, and definitions.
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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29-Jul-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TRS3221ECDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RS21EC
Samples
TRS3221ECPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
0 to 70
RS21EC
Samples
TRS3221EIDBR
ACTIVE
SSOP
DB
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RS21EI
Samples
TRS3221EIPWR
ACTIVE
TSSOP
PW
16
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
RS21EI
Samples
TRS3221EIRGTR
ACTIVE
VQFN
RGT
16
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
3221
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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