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TRS3223ECDW

TRS3223ECDW

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC20

  • 描述:

    IC TRANSCEIVER FULL 2/2 20SOIC

  • 数据手册
  • 价格&库存
TRS3223ECDW 数据手册
SLLS794 – JUNE 2007 FEATURES • • • • • • • • • ESD Protection for RS-232 Bus Pins – ±15-kV Human-Body Model (HBM) – ±8-kV IEC61000-4-2, Contact Discharge – ±15-kV IEC61000-4-2, Air-Gap Discharge Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU v.28 Standards Operates With 3-V to 5.5-V VCC Supply Operates up to 500 kbit/s Two Drivers and Two Receivers Low Standby Current . . . 1 μA Typ External Capacitors . . . 4 × 0.1 μF Accepts 5-V Logic Input With 3.3-V Supply Alternative High-Speed Pin-Compatible Device (1 Mbit/s) for TRSF3223E DB, DW, OR PW PACKAGE (TOP VIEW) EN C1+ V+ C1− C2+ C2− V− DOUT2 RIN2 ROUT2 1 20 2 3 19 18 4 5 17 16 6 7 15 8 9 13 12 10 11 14 RHL PACKAGE (TOP VIEW) The TRS3223E consists of two line drivers, two line receivers, and a dual charge-pump circuit with ±15-kV ESD protection pin to pin (serial-port connection pins, including GND). The device meets the requirements of TIA/EIA-232-F and provides the electrical interface between an asynchronous communication controller and the serial-port connector. The charge pump and four small external capacitors allow operation from a single 3-V to 5.5-V supply. The device operates at typical data signaling rates up to 500 kbit/s and a maximum of 30-V/μs driver output slew rate. C1+ N.C. V+ C1– C2+ C2– V– DOUT2 N.C. RIN2 24 2 23 VCC 3 4 22 N.C. 21 GND 20 DOUT1 19 RIN1 5 6 8 18 ROUT1 17 FORCEON 9 10 16 DIN1 15 N.C. 7 11 14 DIN2 12 13 INVALID DESCRIPTION/ ORDERING INFORMATION 1 ROUT2 Battery-Powered Systems PDAs Notebooks Laptops Palmtop PCs Hand-Held Equipment EN APPLICATIONS • • • • • • FORCEOFF VCC GND DOUT1 RIN1 ROUT1 FORCEON DIN1 DIN2 INVALID FORCEOFF www.ti.com TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION N.C. − No internal connection Flexible control options for power management are available when the serial port is inactive. The auto-powerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal, the driver outputs are disabled. If FORCEOFF is set low and EN is high, both drivers and receivers are shut off, and the supply current is reduced to 1 mA. Disconnecting the serial port or turning off the peripheral drivers causes auto-powerdown to occur. Auto-powerdown can be disabled when FORCEON and FORCEOFF are high. With auto-powerdown enabled, the device is activated automatically when a valid signal is applied to any receiver input. The INVALID output is used to notify the user if an RS-232 signal is present at any receiver input. INVALID is high (valid data) if any receiver input voltage is greater than 2.7 V or less than –2.7 V, or has been between –0.3 V and 0.3 V for less than 30 μs. INVALID is low (invalid data) if the receiver input voltage is between –0.3 V and 0.3 V for more than 30 μs. Refer to Figure 4 for receiver input levels. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 ORDERING INFORMATION TA PACKAGE QFN – RHL SOIC – DW 0°C to 70°C SSOP – DB TSSOP – PW QFN – RHL SOIC – DW –40°C to 85°C SSOP – DB TSSOP – PW (1) (2) (1) (2) ORDERABLE PART NUMBER Reel of 2000 TRS3223ECRHLR Tube of 25 TRS3223ECDW Reel of 2000 TRS3223ECDWR Tube of 70 TRS3223ECDB Reel of 2000 TRS3223ECDBR Tube of 70 TRS3223ECPW Reel of 2000 TRS3223ECPWR Reel of 2000 TRS3223EIRHLR Tube of 25 TRS3223EIDW Reel of 2000 TRS3223EIDWR Tube of 70 TRS3223EIDB Reel of 2000 TRS3223EIDBR Tube of 70 TRS3223EIPW Reel of 2000 TRS3223EIPWR TOP-SIDE MARKING PREVIEW TRS3223EC RS23EC RS23EC PREVIEW TRS3223EI RS23EI RS23EI Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLES ABC EACH DRIVER (1) INPUTS DIN (1) FORCEON FORCEOFF VALID RIN RS-232 LEVEL OUTPUT DOUT DRIVER STATUS X X L X Z Powered off L H H X H H H H X L Normal operation with auto-powerdown disabled L L H Yes H H L H Yes L L L H No Z H L H No Z Normal operation with auto-powerdown enabled Powered off by auto-powerdown feature H = high level, L = low level, X = irrelevant, Z = high impedance EACH RECEIVER (1) INPUTS (1) 2 RIN EN VALID RIN RS-232 LEVEL OUTPUT DOUT L L X H L X L X H X Z Open L No H H = high level, L = low level, X = irrelevant, Z = high impedance (off), Open = input disconnected or connected driver off Submit Documentation Feedback H TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 LOGIC DIAGRAM (POSITIVE LOGIC) DIN1 DIN2 FORCEOFF FORCEON EN ROUT1 ROUT2 13 17 12 8 20 DOUT1 DOUT2 11 Powerdown 14 INVALID 1 15 16 10 9 RIN1 RIN2 Pin numbers are for the DB, DW, and PW packages. Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.3 6 V V+ Positive-output supply voltage range (2) –0.3 7 V 0.3 –7 V 13 V V– Negative-output supply voltage range V+ – V– Supply voltage difference (2) VI Input voltage range VO Output voltage range θJA (2) Package thermal impedance (3) (4) Driver (FORCEOFF, FORCEON, EN) –0.3 6 Receiver –25 25 Driver Receiver (INVALID) –13.2 13.2 –0.3 VCC + 0.3 DB package 70 DW package 58 PW package 83 RHL package TJ Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) UNIT V V °C/W PREVIEW –65 150 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback 3 TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 Recommended Operating Conditions (1) See Figure 6 VCC = 3.3 V Supply voltage VCC = 5 V VIH Driver and control high-level input voltage DIN, EN, FORCEOFF, FORCEON VIL Driver and control low-level input voltage DIN, EN, FORCEOFF, FORCEON Driver and control input voltage DIN, EN, FORCEOFF, FORCEON VI TA (1) VCC = 3.3 V VCC = 5 V Receiver input voltage TRS3223EC Operating free-air temperature TRS3223EI MIN NOM MAX 3 3.3 3.6 4.5 5 5.5 UNIT V 2 V 2.4 0.8 V 0 5.5 V –25 25 V 0 70 –40 85 °C Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER II ICC (1) (2) 4 Input leakage current Supply current TEST CONDITIONS EN, FORCEOFF, FORCEON MIN TYP (2) MAX ±0.01 ±1 μA 0.3 1 mA Auto-powerdown disabled VCC = 3.3 V or 5 V, TA = 25°C, No load, FORCEOFF and FORCEON at VCC Powered off No load, FORCEOFF at GND 1 10 Auto-powerdown enabled No load, FORCEOFF at VCC, FORCEON at GND, All RIN are open or grounded 1 10 Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Documentation Feedback UNIT μA TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 DRIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT VOH High-level output voltage DOUT at RL = 3 kΩ to GND 5 5.4 VOL Low-level output voltage DOUT at RL = 3 kΩ to GND –5 –5.4 IIH High-level input current VI = VCC ±0.01 ±1 μA IIL Low-level input current VI at GND ±0.01 ±1 μA ±35 ±60 mA IOS Short-circuit output current (3) ro Output resistance IOZ (1) (2) (3) Output leakage current VCC = 3.6 V, VO = 0 V VCC = 5.5 V, VO = 0 V VCC, V+, and V– = 0 V, VO = ±2 V 300 V V Ω 10M FORCEOFF = GND, VCC = 3 V to 3.6 V, VO = ±12 V ±25 FORCEOFF = GND, VCC = 4.5 V to 5.5 V, VO = ±12 V ±25 μA Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Short-circuit durations should be controlled to prevent exceeding the device absolute power dissipation ratings, and not more than one output should be shorted at a time. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN TYP (2) 250 500 kbit/s 100 ns MAX Maximum data rate CL = 1000 pF, One DOUT switching, RL = 3 kΩ, See Figure 1 tsk(p) Pulse skew (3) CL = 150 pF to 2500 pF, See Figure 2 RL = 3 kΩ to 7 kΩ, SR(tr) Slew rate, transition region (See Figure 1) RL = 3 kΩ to 7 kΩ, VCC = 3.3 V CL = 150 pF to 1000 pF 6 30 CL = 150 pF to 2500 pF 4 30 (1) (2) (3) UNIT V/μs Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Submit Documentation Feedback 5 TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 RECEIVER SECTION Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 6) PARAMETER VOH High-level output voltage IOH = –1 mA VOL Low-level output voltage IOL = 1.6 mA TYP (2) VCC – 0.6 VCC – 0.1 MAX VCC = 3.3 V 1.6 2.4 VCC = 5 V 1.9 2.4 Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Input hysteresis (VIT+ – VIT–) IOZ Output leakage current EN = VCC ri Input resistance VI = ±3 V to ±25 V VCC = 3.3 V 0.6 1.1 VCC = 5 V 0.6 1.4 UNIT V 0.4 VIT+ (1) (2) MIN TEST CONDITIONS V V V 0.5 V ±0.05 μA 5 kΩ 3 Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Switching Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TYP (2) UNIT tPLH Propagation delay time, low- to high-level output CL = 150 pF, See Figure 3 150 ns tPHL Propagation delay time, high- to low-level output CL = 150 pF, See Figure 3 150 ns ten Output enable time CL = 150 pF, RL = 3 kΩ, See Figure 4 200 ns tdis Output disable time CL = 150 pF, RL = 3 kΩ, See Figure 4 200 ns tsk(p) Pulse skew (3) See Figure 3 50 ns (1) (2) (3) 6 TEST CONDITIONS Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Pulse skew is defined as |tPLH – tPHL| of each channel of the same device. Submit Documentation Feedback TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 AUTO-POWERDOWN SECTION Electrical Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TEST CONDITIONS MIN VT+(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC VT(valid) Receiver input threshold for INVALID high-level output voltage FORCEON = GND, FORCEOFF = VCC –2.7 VT(invalid) Receiver input threshold for INVALID low-level output voltage FORCEON = GND, FORCEOFF = VCC –0.3 VOH INVALID high-level output voltage IOH = 1 mA, FORCEOFF = VCC FORCEON = GND, VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEOFF = VCC FORCEON = GND, MAX UNIT 2.7 V V 0.3 V VCC – 0.6 V 0.4 V Switching Characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5) PARAMETER TYP (1) UNIT tvalid Propagation delay time, low- to high-level output 1 μs tinvalid Propagation delay time, high- to low-level output 30 μs ten Supply enable time 100 μs (1) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C. Submit Documentation Feedback 7 TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 PARAMETER MEASUREMENT INFORMATION 3V Input Generator (see Note B) 1.5 V RS-232 Output 50 Ω RL 1.5 V 0V CL (see Note A) tTHL 3V FORCEOFF tTLH VOH 3V 3V Output −3 V −3 V VOL TEST CIRCUIT VOLTAGE WAVEFORMS SR(tr) + t THL 6V or t TLH A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 1. Driver Slew Rate 3V Generator (see Note B) RS-232 Output 50 Ω RL Input 1.5 V 1.5 V 0V CL (see Note A) tPHL tPLH VOH 3V FORCEOFF 50% 50% Output VOL TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 2. Driver Pulse Skew EN 0V 3V Input 1.5 V 1.5 V −3 V Output Generator (see Note B) 50 Ω tPHL CL (see Note A) tPLH VOH 50% Output 50% VOL TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 3. Receiver Propagation Delay Times 8 Submit Documentation Feedback TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 PARAMETER MEASUREMENT INFORMATION (continued) VCC GND S1 RL 3 V or 0 V Output CL (see Note A) EN 3V Input 1.5 V 0V tPZH (S1 at GND) tPHZ (S1 at GND) VOH Output 50% 0.3 V Generator (see Note B) 1.5 V 50 Ω tPLZ (S1 at VCC) 0.3 V Output 50% VOL tPZL (S1 at VCC) TEST CIRCUIT VOLTAGE WAVEFORMS A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 4. Receiver Enable and Disable Times Submit Documentation Feedback 9 TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 PARAMETER MEASUREMENT INFORMATION (continued) 2.7 V EN 50 Ω 0V −2.7 V tvalid 50% V CC 50% V CC 0V ten INVALID CL = 30 pF (see Note A) ≈V+ V+ 0.3 V VCC 0V 0.3 V Supply Voltages FORCEOFF DIN DOUT ≈V− V− TEST CIRCUIT −3 V VCC INVALID Output FORCEON 2.7 V tinvalid Autopowerdown 3V 0V Receiver Input ROUT Generator (see Note B) 2.7 V ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉ VOLTAGE WAVEFORMS Valid RS-232 Level, INVALID High 2.7 V Indeterminate 0.3 V If Signal Remains Within This Region for More Than 30 ms, INVALID Is Low † 0V 0.3 V Indeterminate 2.7 V Valid RS-232 Level, INVALID High † Auto-powerdown disables drivers reduces supply current to 1 µA A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 5. INVALID Propagation Delay Times and Supply Enabling Time 10 Submit Documentation Feedback and TRS3223E 3-V TO 5.5-V MULTICHANNEL RS-232 LINE DRIVER/RECEIVER WITH ±15-kV ESD PROTECTION www.ti.com SLLS794 – JUNE 2007 APPLICATION INFORMATION 1 EN 2 20 AutoPowerdown VCC C1+ FORCEOFF 19 CBYPASS + 3 C1 V+ GND 18 = 0.1mF C3 † 4 5 17 C1 16 C2+ DOUT1 RIN1 + C2 6 15 C2 ROUT1 5 kΩ 7 C4 DOUT2 RIN2 ROUT2 14 V FORCEON + 8 13 9 12 10 11 DIN1 DIN2 INVALID 5 kΩ † C3 can be connected to V CC or GND. NOTES: A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. VCC vs CAPACITOR VALUES VCC 3.3 V " 0.3 V C1 0.1 µF C2, C3, and C4 0.1 µF 5 V " 0.5 V 0.047 µF 0.33 µF 3 V to 5.5 V 0.1 µF 0.47 µF Figure 6. Typical Operating Circuit and Capacitor Values Submit Documentation Feedback 11 PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TRS3223ECDB ACTIVE SSOP DB 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RS23EC TRS3223ECDBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RS23EC TRS3223ECDW OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70 TRS3223ECDWG4 OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70 TRS3223ECDWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TRS3223EC TRS3223ECPW ACTIVE TSSOP PW 20 70 TBD Call TI Call TI 0 to 70 RS23EC TRS3223ECPWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 RS23EC TRS3223EIDB ACTIVE SSOP DB 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RS23EI TRS3223EIDBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RS23EI TRS3223EIDWR OBSOLETE SOIC DW 20 TBD Call TI Call TI -40 to 85 TRS3223EIDWRG4 OBSOLETE SOIC DW 20 TBD Call TI Call TI -40 to 85 TRS3223EIPW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RS23EI TRS3223EIPWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 RS23EI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 30-Sep-2016 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TRS3223ECDBR Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 TRS3223ECDWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 TRS3223ECPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 TRS3223EIDBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 TRS3223EIPWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS3223ECDBR SSOP DB 20 2000 367.0 367.0 38.0 TRS3223ECDWR SOIC DW 20 2000 367.0 367.0 45.0 TRS3223ECPWR TSSOP PW 20 2000 367.0 367.0 38.0 TRS3223EIDBR SSOP DB 20 2000 367.0 367.0 38.0 TRS3223EIPWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 PACKAGE OUTLINE DW0020A SOIC - 2.65 mm max height SCALE 1.200 SOIC C 10.63 TYP 9.97 SEATING PLANE PIN 1 ID AREA A 0.1 C 20 1 13.0 12.6 NOTE 3 18X 1.27 2X 11.43 10 11 B 7.6 7.4 NOTE 4 20X 0.51 0.31 0.25 C A B 2.65 MAX 0.33 TYP 0.10 SEE DETAIL A 0.25 GAGE PLANE 0 -8 0.3 0.1 1.27 0.40 DETAIL A TYPICAL 4220724/A 05/2016 NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side. 5. Reference JEDEC registration MS-013. www.ti.com EXAMPLE BOARD LAYOUT DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM (R0.05) TYP 10 11 (9.3) LAND PATTERN EXAMPLE SCALE:6X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK 0.07 MAX ALL AROUND 0.07 MIN ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4220724/A 05/2016 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DW0020A SOIC - 2.65 mm max height SOIC 20X (2) SYMM 1 20 20X (0.6) 18X (1.27) SYMM 11 10 (9.3) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:6X 4220724/A 05/2016 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. www.ti.com MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. 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