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TS3A24157
SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
TS3A24157 0.65-Ω 2-Channel SPDT Analog Switch
2-Channel 2:1 Multiplexer and Demultiplexer
1 Features
3 Description
•
•
•
•
•
•
•
•
The TS3A24157 is a bidirectional, 2-channel, singlepole double-throw (SPDT) analog switch that is
designed to operate from 1.65 V to 3.6 V. The device
offers low ON-state resistance and excellent ON-state
resistance matching with the break-before-make
feature, to prevent signal distortion during the transfer
of a signal from one channel to another. The device
has excellent total harmonic distortion (THD)
performance and consumes very-low power. These
features make this device suitable for portable audio
applications.
1
•
Specified Break-Before-Make Switching
Low ON-State Resistance (0.65-Ω Maximum)
Low Charge Injection
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion
1.65-V to 3.6-V Single-Supply Operation
Bidirectional Signal Paths
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
PART NUMBER
TS3A24157
PACKAGE
BODY SIZE (NOM)
UQFN (10)
1.50 mm × 2.00 mm
VSSOP (10)
3.00 mm × 3.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
•
•
•
•
•
•
Device Information(1)
Cell Phones
PDAs
Portable Instrumentation
Audio and Video Signal Routing
Low-Voltage Data Acquisition Systems
Communication Circuits
Modems
Hard Drives
Computer Peripherals
Wireless Terminals and Peripherals
Functional Block Diagram
SPDT
COM1
IN1
NO1
Logic
Control
SPDT
COM2
IN2
NC1
NC2
NO2
Logic
Control
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS3A24157
SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
4
4
4
4
5
6
7
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics: 3-V Supply ......................
Electrical Characteristics: 2.5-V Supply ....................
Electrical Characteristics: 1.8-V Supply ....................
Typical Characteristics ..............................................
Parameter Measurement Information ................ 10
Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 14
9
Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application .................................................. 15
10 Power Supply Recommendations ..................... 16
11 Layout................................................................... 16
11.1 Layout Guidelines ................................................. 16
11.2 Layout Example .................................................... 16
12 Device and Documentation Support ................. 17
12.1
12.2
12.3
12.4
12.5
12.6
12.7
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
18
18
18
18
18
18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 19
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (September 2007) to Revision B
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
•
Deleted Ordering Information table; see POA at the end of the data sheet........................................................................... 1
•
Deleted Summary of Characteristics table ............................................................................................................................. 1
•
Changed V+ pin name to VCC................................................................................................................................................ 3
•
Added Thermal Information table ........................................................................................................................................... 4
2
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TS3A24157
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SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
5 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
VCC
RSE Package
10-Pin UQFN
Top View
1
10
VCC
NO1
2
9
COM1
NC2
3
8
IN1
NO2
4
7
IN2
GND
5
6
COM2
1
9
COM1
NO1
2
8
IN1
NC2
3
7
IN2
NO2
4
6
COM2
GND
5
Not to scale
NC1
10
NC1
Not to scale
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
NC1
I/O
Normally closed signal path
2
NO1
I/O
Normally open signal path
3
NC2
I/O
Normally closed signal path
4
NO2
I/O
Normally open signal path
5
GND
—
Ground
6
COM2
I/O
Common signal path
7
IN2
I
Digital control to connect COM2 to NO2 or NC2
Digital control to connect COM1 to NO1 or NC1
8
IN1
I
9
COM1
I/O
Common signal path
10
VCC
—
Power supply
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SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2) (3)
Supply voltage
Analog signal voltage
(4)
Digital input voltage
MIN
MAX
UNIT
–0.5
3.6
V
–0.5
VCC + 0.5
V
–0.5
3.6
V
Analog port diode current
VNC, VNO, VCOM < 0
–50
50
mA
ON-state switch current
VNC, VNO, VCOM = 0 to VCC
–300
300
mA
ON-state peak switch current (5)
VNC, VNO, VCOM = 0 to VCC
–500
500
mA
Digital input clamp current
VIN < 0
–50
mA
Continuous current through VCC
100
Continuous current through GND
–100
Storage temperature, Tstg
–65
(1)
(2)
(3)
(4)
(5)
mA
mA
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
This value is limited to 5.5 V (maximum).
Pulse at 1-ms duration < 10% duty cycle.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
MIN
MAX
1.65
3.6
NC1, NC2
0
VCC
NO1, NO2
0
VCC
COM1, COM2
0
VCC
0
VCC
Supply voltage
VNC
VNO
Analog signal voltage
VCOM
VIN
Digital input voltage
UNIT
V
V
V
6.4 Thermal Information
TS3A24157
THERMAL METRIC (1)
DGS (VSSOP)
RSE (UQFN)
UNIT
10 PINS
10 PINS
RθJA
Junction-to-ambient thermal resistance
188.5
160.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
76.5
77.8
°C/W
RθJB
Junction-to-board thermal resistance
108.2
82.2
°C/W
ψJT
Junction-to-top characterization parameter
15.3
4.3
°C/W
ψJB
Junction-to-board characterization parameter
106.8
82.2
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
6.5 Electrical Characteristics: 3-V Supply
VCC = 3 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.5
0.65
UNIT
ANALOG SWITCH
rPEAK
Peak ON resistance
0 ≤ (VNC or VNO) ≤ VCC, VCC = 2.7 V,
ICOM = –100 mA, Switch ON, See Figure 10
TA = 25°C
rON
ON-state resistance
VNC or VNO = 2 V, VCC = 2.7 V,
ICOM = –100 mA, Switch ON, See Figure 10
TA = 25°C
ΔrON
ON-state resistance match
between channels
VNC or VNO = 2 V or 0.8 V, VCC = 2.7 V,
ICOM = –100 mA, Switch ON, See Figure 10
TA = 25°C
rON(FLAT)
ON-state resistance flatness
VCC = 2.7 V, ICOM = –100 mA,
Switch ON, See Figure 10
–40°C ≤ TA ≤ 85°C
0.75
0.45
–40°C ≤ TA ≤ 85°C
0.05
–40°C ≤ TA ≤ 85°C
0.01
–40°C ≤ TA ≤ 85°C
NC and NO OFF leakage
current
VNC or VNO = 1 V and VCOM = 3 V, or
VNC or VNO = 3 V and VCOM = 1 V;
VCC = 3.6 V, Switch OFF, See Figure 11
TA = 25°C
INC(ON),
INO(ON)
NC and NO ON leakage current
VNC or VNO = 1 V or 3 V, VCOM = Open,
VCC = 3.6 V, Switch ON, See Figure 12
TA = 25°C
ICOM(ON)
COM ON leakage current
VNC or VNO = Open, VCOM = 1 V or 3 V,
VCC = 3.6 V, Switch ON, See Figure 12
TA = 25°C
Ω
Ω
0.025
TA = 25°C
INC(OFF),
INO(OFF)
0.07
0.08
0 ≤ (VNC or VNO) ≤ VCC
VNC or VNO =
2 V or 0.8 V
0.6
0.65
Ω
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
0.04
Ω
0.1
–50
50
–250
250
–50
50
–400
400
–50
50
–400
400
nA
nA
nA
DIGITAL CONTROL INPUTS (IN1, IN2) (1)
VIH
Input logic high
2.7 V ≤ VCC ≤ 3.6 V, –40°C ≤ TA ≤ 85°C
VIL
Input logic low
2.7 V ≤ VCC ≤ 3.6 V, –40°C ≤ TA ≤ 85°C
IIH, IIL
1.4
TA = 25°C
Input leakage current
VIN = 3.6 V or GND, VCC = 3.6 V
tON
Turnon time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 3 V, TA = 25°C
tOFF
Turnoff time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 3 V, TA = 25°C
tBBM
Break-before-make time
VNC = VNO = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 15
VCC = 3 V, TA = 25°C
QC
Charge injection
VGEN = 0, RGEN = 0, CL = 1 nF, See Figure 19
CNC(OFF),
CNO(OFF)
NC and NO OFF capacitance
CNC(ON),
CNO(ON)
V
0.5
–50
–40°C ≤ TA ≤ 85°C
5
–150
50
150
V
nA
DYNAMIC
20
2.7 V ≤ VCC ≤ 3.6 V, –40°C ≤ TA ≤ 85°C
40
12
2.7 V ≤ VCC ≤ 3.6 V, –40°C ≤ TA ≤ 85°C
25
30
1
2.7 V ≤ VCC ≤ 3.6 V, –40°C ≤ TA ≤ 85°C
35
10
0.5
25
30
ns
ns
ns
8.75
pC
(VNC or VNO) = VCC or GND, Switch OFF, See Figure 13
50
pF
NC and NO ON capacitance
(VNC or VNO) = VCC or GND, Switch ON, See Figure 13
140
pF
CCOM(ON)
COM ON capacitance
VCOM = VCC or GND, Switch ON, See Figure 13
140
pF
CI
Digital input capacitance
VIN = VCC or GND, See Figure 13
BW
Bandwidth
OISO
XTALK
THD
2
pF
RL = 50 Ω, Switch ON, See Figure 16
50
MHz
OFF isolation
RL = 50 Ω, f = 1 MHz, See Figure 17
–72
dB
Crosstalk
RL = 50 Ω, f = 1 MHz, See Figure 18
–72
dB
Total harmonic distortion
RL = 600 Ω, CL = 50 pF, f = 20 Hz to 20 kHz, See Figure 20
Positive supply current
VIN = VCC or GND, VCC = 3.6 V
0.005%
SUPPLY
ICC
(1)
TA = 25°C
15
–40°C ≤ TA ≤ 85°C
200
1200
nA
All unused digital inputs of the device must be held at VCCor GND to ensure proper device operation. See Implications of Slow or
Floating CMOS Inputs.
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6.6 Electrical Characteristics: 2.5-V Supply
VCC = 2.5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.55
0.75
UNIT
ANALOG SWITCH
rPEAK
Peak ON resistance
0 ≤ (VNO or VNC) ≤ VCC, VCC = 2.3 V,
ICOM = –8 mA, Switch ON, See Figure 10
TA = 25°C
rON
ON-state resistance
VNO or VNC = 1.8 V, VCC = 2.3 V,
ICOM = –8 mA, Switch ON, See Figure 10
TA = 25°C
ΔrON
ON-state resistance match
between channels
VNO or VNC = 1.8 V or 0.8 V, VCC = 2.3 V,
ICOM = –8 mA, Switch ON, See Figure 10
TA = 25°C
rON(FLAT)
ON-state resistance flatness
VCC = 2.3 V, ICOM = –8 mA,
Switch ON, See Figure 10
–40°C ≤ TA ≤ 85°C
0.9
0.56
–40°C ≤ TA ≤ 85°C
0.85
0.1
–40°C ≤ TA ≤ 85°C
0.1
TA = 25°C
NC and NO OFF leakage
current
VNC or VNO = 0.5 V and VCOM = 2.2 V, or
VNC or VNO = 2.2 V and VCOM = 0.5 V;
VCC = 2.7 V, Switch OFF, See Figure 11
TA = 25°C
INC(ON),
INO(ON)
NC and NO ON leakage current
VNC or VNO = 0.5 V or 2.2 V, VCOM = Open,
VCC = 2.7 V, Switch ON, See Figure 12
TA = 25°C
ICOM(ON)
COM ON leakage current
VNC or VNO = Open, VCOM = 0.5 V or 2.2 V,
VCC = 2.7 V, Switch ON, See Figure 12
TA = 25°C
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
Ω
Ω
0.15
0.17
–40°C ≤ TA ≤ 85°C
INC(OFF),
INO(OFF)
0.15
0.15
0 ≤ (VNO or VNC) ≤ VCC
VNO or VNC =
0.8 V or 1.8 V
0.75
Ω
Ω
0.2
–50
50
–250
250
–50
50
–400
400
–50
50
–400
400
nA
nA
nA
DIGITAL CONTROL INPUTS (IN1, IN2) (1)
VIH
Input logic high
2.3 V ≤ VCC ≤ 2.7 V, –40°C ≤ TA ≤ 85°C
VIL
Input logic low
2.3 V ≤ VCC ≤ 2.7 V, –40°C ≤ TA ≤ 85°C
IIH, IIL
1.25
V
0.5
TA = 25°C
–50
50
–40°C ≤ TA ≤ 85°C
–50
50
Input leakage current
VIN = 2.7 V or GND, VCC = 2.7 V
tON
Turnon time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 2.5 V, TA = 25°C
tOFF
Turnoff time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 2.5 V, TA = 25°C
tBBM
Break-before- make time
VNC = VNO = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 15
VCC = 2.5 V, TA = 25°C
2
2.3 V ≤ VCC ≤ 2.7 V, –40°C ≤ TA ≤ 85°C
1
QC
Charge injection
VGEN = 0, RGEN = 0, CL = 1 nF, See Figure 19
CNC(OFF),
CNO(OFF)
NC and NO OFF capacitance
CNC(ON),
CNO(ON)
V
nA
DYNAMIC
23
2.3 V ≤ VCC ≤ 2.7 V, –40°C ≤ TA ≤ 85°C
45
50
17
2.3 V ≤ VCC ≤ 2.7 V, –40°C ≤ TA ≤ 85°C
27
30
14
30
35
ns
ns
ns
8
pC
VNC or VNO = VCC or GND, Switch OFF, See Figure 13
50
pF
NC and NO ON capacitance
VNC or VNO = VCC or GND, Switch ON, See Figure 13
140
pF
CCOM(ON)
COM ON capacitance
VCOM = VCC or GND, Switch ON, See Figure 13
140
pF
CI
Digital input capacitance
VIN = VCC or GND, See Figure 13
BW
Bandwidth
OISO
XTALK
THD
2
pF
RL = 50 Ω, Switch ON, See Figure 16
50
MHz
OFF isolation
RL = 50 Ω, f = 1 MHz, See Figure 17
–72
dB
Crosstalk
RL = 50 Ω, f = 1 MHz, See Figure 18
–72
dB
Total harmonic distortion
RL = 600 Ω, CL = 50 pF, f = 20 Hz to 20 kHz, See Figure 20
Positive supply current
VIN = VCC or GND, VCC = 2.7 V
0.006%
SUPPLY
ICC
(1)
6
TA = 25°C
–40°C ≤ TA ≤ 85°C
10
150
700
nA
All unused digital inputs of the device must be held at VCCor GND to ensure proper device operation. See Implications of Slow or
Floating CMOS Inputs.
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SCDS208B – JUNE 2007 – REVISED OCTOBER 2016
6.7 Electrical Characteristics: 1.8-V Supply
VCC = 1.8 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ANALOG SWITCH
rPEAK
Peak ON resistance
0 ≤ (VNO or VNC) ≤ VCC, VCC = 1.65 V,
ICOM = –2 mA, Switch ON, See Figure 10
TA = 25°C
rON
ON-state resistance
VNO or VNC = 1.5 V, VCC = 1.65 V,
ICOM = –2 mA, Switch ON, See Figure 10
TA = 25°C
ΔrON
ON-state resistance match
between channels
VNO or VNC = 0.6 V or 1.5 V, VCC = 1.65 V,
ICOM = –2 mA, Switch ON, See Figure 10
TA = 25°C
rON(FLAT)
ON-state resistance flatness
VCC = 1.65 V, ICOM = –2 mA,
Switch ON, See Figure 10
0.8
1.4
0.6
0.95
–40°C ≤ TA ≤ 85°C
1
0.1
0.15
–40°C ≤ TA ≤ 85°C
0.15
0 ≤ (VNO or VNC) ≤ VCC
VNO or VNC =
0.6 V or 1.5 V
1.25
–40°C ≤ TA ≤ 85°C
0.35
TA = 25°C
INC(OFF),
INO(OFF)
NC and NO OFF leakage
current
VNC or VNO = 0.3 V and VCOM = 1.65 V, or
VNC or VNO = 1.65 V and VCOM = 0.3 V;
VCC = 1.65, Switch OFF, See Figure 11
TA = 25°C
INC(ON),
INO(ON)
NC and NO ON leakage
current
VNC or VNO = 0.3 V or 1.65 V, VCOM = Open,
VCC = 1.95 V, Switch ON, See Figure 12
TA = 25°C
ICOM(ON)
COM ON leakage current
VNC or VNO = Open, VCOM = 0.3 V or 1.65 V,
VCC = 1.95 V, Switch ON, See Figure 12
TA = 25°C
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
Ω
Ω
0.13
Ω
0.05
–40°C ≤ TA ≤ 85°C
Ω
0.2
–50
50
–250
250
–50
50
–400
400
–50
50
–400
400
nA
nA
nA
DIGITAL CONTROL INPUTS (IN1, IN2) (1)
VIH
Input logic high
1.65 V ≤ VCC ≤ 1.95 V, –40°C ≤ TA ≤ 85°C
VIL
Input logic low
1.65 V ≤ VCC ≤ 1.95 V, –40°C ≤ TA ≤ 85°C
IIH, IIL
1
V
0.4
25°C
0
Input leakage current
VIN = 1.95 V or GND, VCC = 1.95 V
tON
Turnon time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 1.8 V, TA = 25°C
tOFF
Turnoff time
VCOM = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 14
VCC = 1.8 V, TA = 25°C
tBBM
Break-before- make time
VNC = VNO = VCC, RL = 50 Ω,
CL = 35 pF, See Figure 15
VCC = 1.8 V, TA = 25°C
2
1.65 V ≤ VCC ≤ 1.95 V, –40°C ≤ TA ≤ 85°C
1
QC
Charge injection
VGEN = 0, RGEN = 0, CL = 1 nF, See Figure 19
CNC(OFF),
CNO(OFF)
NC and NO OFF capacitance
CNC(ON),
CNO(ON)
–40°C ≤ TA ≤ 85°C
50
150
V
nA
DYNAMIC
33
1.65 V ≤ VCC ≤ 1.95 V, –40°C ≤ TA ≤ 85°C
75
80
24
1.65 V ≤ VCC ≤ 1.95 V, –40°C ≤ TA ≤ 85°C
35
40
20
40
50
ns
ns
ns
4
pC
VNC or VNO = VCC or GND, Switch OFF, See Figure 13
50
pF
NC and NO ON capacitance
VNC or VNO = VCC or GND, Switch ON, See Figure 13
140
pF
CCOM(ON)
COM ON capacitance
VCOM = VCC or GND, Switch ON, See Figure 13
140
pF
CI
Digital input capacitance
VIN = VCC or GND, See Figure 13
BW
Bandwidth
OISO
XTALK
THD
2
pF
RL = 50 Ω, Switch ON, See Figure 16
48
MHz
OFF isolation
RL = 50 Ω, f = 1 MHz, See Figure 17
–73
dB
Crosstalk
RL = 50 Ω, f = 1 MHz, See Figure 18
–72
dB
Total harmonic distortion
RL = 600 Ω, CL = 50 pF, f = 20 Hz to 20 kHz, See Figure 20
Positive supply current
VIN = VCC or GND, VCC = 1.95 V
0.005%
Supply
ICC
(1)
TA = 25°C
10
–40°C ≤ TA ≤ 85°C
100
600
nA
All unused digital inputs of the device must be held at VCCor GND to ensure proper device operation. See Implications of Slow or
Floating CMOS Inputs.
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6.8 Typical Characteristics
0.9
0.7
0.8
0.6
0.7
0.5
0.4
0.5
rON (Ω)
rON (Ω)
0.6
0.4
0.3
0.3
0.2
0.2
–40ºC
25ºC
85ºC
0.1
–40ºC
25ºC
85ºC
0.1
0
0
0
0.2
0.4
0.6
0.8
1
1.2
1.6
1.4
1.8
0
0.5
1.5
1
VCOM (V)
2.5
2
VCOM (V)
VCC = 1.65 V
VCC = 2.3 V
Figure 1. rON vs VCOM
Figure 2. rON vs VCOM
20
0.6
1.8 V
2.5 V
3V
0
0.5
–20
–40
QC (pC)
rON (Ω)
0.4
0.3
–60
–80
–100
0.2
–120
–140
–40ºC
25ºC
85ºC
0.1
–160
0
–180
0
0.5
1.5
1
2
2.5
3
0
0.5
1
1.5
VCOM (V)
2
2.5
3
3.5
VCOM (V)
VCC = 2.7 V
Figure 4. Charge Injection vs VCOM
Figure 3. rON vs VCOM
2
35
tON
tOFF
30
1.8 V
2.5 V
3V
0
–2
25
Gain (dB)
tON/tOFF (ns)
–4
20
15
–6
–8
–10
10
–12
5
–14
0
1.5
8
2
2.5
3
3.5
–16
1.E+04
1.E+05
1.E+06
1.E+07
Supply Voltage (V)
Frequency (Hz)
Figure 5. tON and tOFF vs Supply Voltage
Figure 6. Bandwidth
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1.E+09
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Typical Characteristics (continued)
0E+00
0
–1E+01
–10
–2E+01
Crosstalk (dB)
Off Isolation (dB)
–20
–3E+01
–4E+01
–5E+01
–30
–40
–50
–6E+01
–60
–7E+01
1.8 V
2.5 V
3V
–8E+01
–9E+01
1E+04
1E+05
1E+06
1E+07
1E+08
1.8 V
2.5 V
3V
–70
1E+09
–80
1.E+03
1.E+04
1.E+05
Frequency (Hz)
1.E+06
1.E+07
1.E+08
1.E+09
Frequency (Hz)
Figure 7. OFF Isolation
Figure 8. Crosstalk
4.E-07
–40ºC
25ºC
85ºC
4.E-07
3.E-07
I+ (A)
3.E-07
2.E-07
2.E-07
1.E-07
5.E-08
0.E+00
–5.E-08
0
0.5
1
1.5
2
2.5
3
3.5
4
V+ (V)
Figure 9. Power-Supply Current vs VCC
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7 Parameter Measurement Information
VCC
VNC NC
COM
+
VCOM
Channel ON
VNO NO
r on =
IN
VI
ICOM
VCOM –VNO or VNC
I COM
VI = V IH or V IL
+
GND
Figure 10. ON-State Resistance
VCC
VNC NC
COM
+
VCOM
+
VNO NO
OFF-State Leakage Current
Channel OFF
VI = V IH or V IL
IN
VI
+
GND
INC(OFF), INC(PWROFF), INO(OFF), INO(PWROFF), ICOM(OFF), ICOM(PWROFF)
Figure 11. OFF-State Leakage Current
VCC
VNC NC
COM
+
VNO NO
VI
VCOM
ON-State Leakage Current
Channel ON
VI = V IH or V IL
IN
+
GND
ICOM(ON), INC(ON), INO(ON)
Figure 12. ON-State Leakage Current
10
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Parameter Measurement Information (continued)
VCC
Capacitance
Meter
VNC
NC
VNO
NO
VBI AS = V CC or GND
VI = V CC or GND
VCOM COM
VBI AS
VI
Capacitance is measured at NC,
NO, COM, and IN inputs during
ON and OFF conditions.
IN
GND
CI, CCOM(ON), CNC(OFF), CNO(OFF), CNC(ON), CNO(ON)
Figure 13. Capacitance
VCC
VCOM
NC or NO
VNC or V NO
NC or NO
CL(2)
TEST
RL
CL
VCOM
tON
50 Ω
35 pF
VCC
tOFF
50 Ω
35 pF
VCC
COM
RL
IN
VI
CL(2)
GND
(1)
RL
VCC
Logic
Input
(VI)
50%
50%
0
tON
tOFF
90%
90%
(VNC or V NO)
(1)
(2)
All input pulses are supplied by generators having the following characteristics:
•
PRR ≤ 10 MHz
•
ZO = 50 Ω
•
tr < 5 ns
•
tf < 5 ns
CL includes probe and jig capacitance.
Figure 14. Turnon and Turnoff Time
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Parameter Measurement Information (continued)
VCC
NC or NO
V+
Logic
Input
(VI)
VNC or V NO
VCOM
50%
0
COM
NC or NO
CL(2)
tBBM
Logic
Input(1)
(1)
A.
90%
(VCOM)
IN
VI
90%
RL
VNC or VNO = VCC
RL = 50
CL = 35 pF
GND
All input pulses are supplied by generators having the following characteristics:
•
PRR ≤ 10 MHz
•
ZO = 50 Ω
•
tr < 5 ns
•
tf < 5 ns
CL includes probe and jig capacitance.
Figure 15. Break-Before-Make Time
VCC
Network Analyzer
50 Ω
VNC
NC
Channel ON: NC to COM
COM
Source
Signal
VCOM
VI = VCC or GND
NO
Network Analyzer Setup
IN
VI
50 Ω
+
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 16. Bandwidth
VCC
Network Analyzer
Channel OFF: NC to COM
50 Ω
VNC NC
COM
Source
Signal
50 Ω
VCOM
VI = VCC or GND
NO
Network Analyzer Setup
IN
Source Power = 0 dBm
(632-mV P-P at 50-Ωload)
VI
50 Ω
+
GND
DC Bias = 350 mV
Figure 17. OFF Isolation
12
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Parameter Measurement Information (continued)
VCC
Network Analyzer
Channel ON: NC to COM
50 Ω
VNC
Channel OFF: NO to COM
NC
VCOM
Source
Signal
VNO
VI
50 Ω
VI = VCC or GND
NO
Network Analyzer Setup
50 Ω
IN
+
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 18. Crosstalk
VCC
RGEN
VIH
OFF
ON
OFF V
IL
NC or NO
COM
+
VGEN
Logic
Input
(VI)
VCOM
ΔVCOM
VCOM
NC or NO
CL(2)
VI
VGEN = 0 to VCC
IN
Logic
Input(1)
(1)
(2)
RGEN = 0
CL = 1 nF
QC = C L ×⋅ΔVCOM
VI = V IH or V IL
GND
All input pulses are supplied by generators having the following characteristics:
•
PRR ≤ 10 MHz
•
ZO = 50 Ω
•
tr < 5 ns
•
tf < 5 ns
CL includes probe and jig capacitance.
Figure 19. Charge Injection
VI = V IH or V IL
Channel ON: COM to NO
VSOURCE = VCC P-P
Source Signal = 20 Hz to 20 kHz
RL = 600 Ω
CL = 50 pF
VCC /2
VCC
Audio Analyzer
RL
10 µF
Source
Signal
10 µF
NO
COM
600 Ω
600 Ω
CL(1)
VI
IN
GND
600 Ω
(1)
CL includes probe and jig capacitance.
Figure 20. Total Harmonic Distortion
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8 Detailed Description
8.1 Overview
The TS3A24157 is a bidirectional, 2-channel, single-pole double-throw (SPDT) analog switch. This switch offers
low ON-state resistance and excellent THD performance which makes it great for interfacing with an ADC.
8.2 Functional Block Diagram
SPDT
COM1
Logic
Control
IN1
SPDT
COM2
IN2
NC1
NO1
NC2
NO2
Logic
Control
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8.3 Feature Description
The TS3A24157 is a bidirectional device that has two single-pole, double-throw switches. The two channels of
the switch are controlled independently by two digital signals; one digital control for each single-pole,
doublethrow switch.
8.4 Device Functional Modes
To allow signals to pass between the NC and COM pins you must set the digital control IN pin Low
To allow signals to pass between the NO and COM pins you must set the digital control IN pin High
Table 1. Function Table
14
IN
NC TO COM, COM TO NC
NO TO COM, COM TO NO
L
ON
OFF
H
OFF
ON
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The switches are bidirectional, so the NO, NC, and COM pins can be used as either inputs or outputs.
9.2 Typical Application
3.3 V
0.1 mF
0.1 mF
VCC
TS3A24157
System
Controller
Switch
Control
Logic
IN1
IN2
NO1
Device 1
COM1
NC1
Device 2
NO2
Device 3
NC2
Device 4
Signal
Path
COM2
GND
COM4
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Figure 21. Typical Application Schematic
9.2.1 Design Requirements
The TS3A24157 can be properly operated without any external components.
When unused, pins COM, NC, and NO may be left floating.
Digital control pins IN must be pulled up to VCC or down to GND to avoid undesired switch positions that could
result from the floating pin.
9.2.2 Detailed Design Procedure
Ensure that all of the signals passing through the switch are within the ranges specified in Recommended
Operating Conditions to ensure proper performance.
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Typical Application (continued)
9.2.3 Application Curves
0.6
0.5
rON (Ω)
0.4
0.3
0.2
–40ºC
25ºC
85ºC
0.1
0
0
0.5
1
1.5
2
2.5
3
VCOM (V)
Figure 22. rON
VCC = 2.7 V
vs VCOM
10 Power Supply Recommendations
TI recommends proper power-supply sequencing for all CMOS devices. Do not exceed the absolute-maximum
ratings, because stresses beyond the listed ratings can cause permanent damage to the device. Always
sequence VCC on first, followed by NO, NC, or COM. Although it is not required, power-supply bypassing
improves noise margin and prevents switching noise propagation from the VCC supply to other components. A
0.1-μF capacitor, connected from VCC to GND, is adequate for most applications
11 Layout
11.1 Layout Guidelines
High-speed switches require proper layout and design procedures for optimum performance. Reduce stray
inductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are placed as
close to the device as possible. Use large ground planes where possible.
11.2 Layout Example
VCC
= VIA to GND Plane
0603 Cap
To Device 1
NC1
VCC
To Device
3
To DeviceNO1
3
COM1
To Device
3
To Device 1/2
To Device 2
To System
To Device 3
To DeviceNC2
3
IN1
To
DeviceNO2
3
IN2
To
Device 3
To System
To Device 4
To
Device 3
To Device 3/4
COM2
To Device
To DeviceGND
3
3
Figure 23. TS3A24157 Example Layout
16
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Device Nomenclature
VCOM
Voltage at COM.
VNC
Voltage at NC.
VNO
Voltage at NO.
rON
Resistance between COM and NC or COM and NO ports when the channel is ON.
rPEAK
Peak ON-state resistance over a specified voltage range.
ΔrON
Difference of rON between channels in a specific device.
rON(FLAT)
Difference between the maximum and minimum value of rON in a channel over the specified range
of conditions.
INC(OFF)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF
state under worst-case input and output conditions.
INC(PWROFF)
Leakage current measured at the NC port during the power-down condition (VCC = 0).
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the
OFF state under worst-case input and output conditions.
INO(PWROFF)
Leakage current measured at the NO port during the power-down condition (VCC = 0).
INC(ON)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON
state and the output (COM) open.
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON
state and the output (COM) open.
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO or COM
to NC) in the ON state and the output (NC or NO) open.
ICOM(PWROFF) Leakage current measured at the COM port during the power-down condition (VCC = 0).
VIH
Minimum input voltage for logic high for the control input (IN).
VIL
Maximum input voltage for logic low for the control input (IN).
VI
Voltage at the control input (IN).
IIH, IIL
Leakage current measured at the control input (IN).
tON
Turnon time for the switch. This parameter is measured under the specified range of conditions and
by the propagation delay between the digital control (IN) signal and analog output (COM, NC, or
NO) signal when the switch is turning ON.
tOFF
Turnoff time for the switch. This parameter is measured under the specified range of conditions and
by the propagation delay between the digital control (IN) signal and analog output (COM, NC, or
NO) signal when the switch is turning OFF.
tBBM
Break-before-make time. This parameter is measured under the specified range of conditions and
by the propagation delay between the output of two adjacent analog channels (NC and NO) when
the control signal changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the
analog (NC, NO, or COM) output. This is measured in coulomb (C) and measured by the total
charge induced due to switching of the control input. Charge injection, QC = CL × ΔVCOM, CL is the
load capacitance and ΔVCOM is the change in analog output voltage.
CNC(OFF)
Capacitance at the NC port when the corresponding channel (NC to COM) is OFF.
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF.
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Device Support (continued)
CNC(ON)
Capacitance at the NC port when the corresponding channel (NC to COM) is ON.
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON.
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NC or COM to NO) is ON.
CI
Capacitance of control input (IN).
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in
dB in a specific frequency, with the corresponding channel (NC to COM or NO to COM) in the OFF
state.
XTALK
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel
(NC to NO or NO to NC). This is measured in a specific frequency and in dB.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below
the DC gain.
THD
Total harmonic distortion describes the signal distortion caused by the analog switch. This is
defined as the ratio of root mean square (RMS) value of the second, third, and higher harmonic to
the absolute magnitude of the fundamental harmonic.
ICC
Static power-supply current with the control (IN) pin at VCC or GND.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
Implications of Slow or Floating CMOS Inputs (SCBA004)
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.5 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.6 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
18
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13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS3A24157DGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JZO, JZR)
TS3A24157RSER
ACTIVE
UQFN
RSE
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JZO
TS3A24157RSERG4
ACTIVE
UQFN
RSE
10
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JZO
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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