CY2X013FLXIT

CY2X013 LVDS Crystal Oscillator (XO) Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Functional Description The CY2X013 is a high-performance and high-frequency XO. The device uses a Cypress proprietary low-noise PLL to synthesize the frequency from an integrated crystal. The CY2X013 is available as a factory-configured device or as a field-programmable device. Factory-configured devices are configured for general use (see Standard and Application-Specific Factory Configurations) or they can be customer-specific. Low jitter crystal oscillator (XO) Less than 1 ps typical root mean square (RMS) phase jitter Low-voltage differential signaling (LVDS) output Output frequency from 50 MHz to 690 MHz Factory-configured or field-programmable Integrated phase-locked loop (PLL) Output enable (OE) or power-down (PD#) function Supply voltage: 3.3 V or 2.5 V Pb-free package: 5.0 × 3.2 mm leadless chip carrier (LCC) Commercial and industrial temperature ranges Logic Block Diagram 4 CRYSTAL OSCILLATOR LOW- NOISE PLL OUTPUT DIVIDER PROGRAMMABLE CONFIGURATION CLK 5 CLK# 1 OE/PD# 6 VDD 3 VSS Cypress Semiconductor Corporation Document Number: 001-10261 Rev. *G • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised March 25, 2011 [+] Feedback CY2X013 Pinouts Figure 1. Pin Diagram – 6-Pin Ceramic LCC OE/PD# 1 DNU 2 VSS 3 6 VDD 5 CLK# 4 CLK Table 1. Pin Definitions - 6-Pin Ceramic LCC Pin 1 Name OE/PD# I/O Type Description CMOS input Output enable pin: Active HIGH. If OE = 1, CLK is enabled. Power-down pin: Active LOW. If PD# = 0, the device is powered down and the clock is disabled. The functionality of this pin is programmable LVDS output Differential output clock – Do not use: DNU pins are electrically connected, but perform no function Power Supply voltage: 2.5 V or 3.3 V Power Ground 4, 5 2 6 3 CLK, CLK# DNU VDD VSS Standard and Application-Specific Factory Configurations Part Number CY2X013LXI062T CY2X013LXI100T CY2X013LXI122T CY2X013LXI125T CY2X013LXI156T CY2X013LXI200T Output Frequency 62.50 MHz 100.00 MHz 122.88 MHz 125.00 MHz 156.25 MHz 200.00 MHz Pin 1 Function OE OE OE OE OE OE RMS Phase Jitter (Random) Offset Range 1.875 MHz to 20 MHz 12 kHz to 20 MHz 637 kHz to 10 MHz 900 kHz to 7.5 MHz 12 kHz to 20 MHz 1.875 MHz to 20 MHz 12 kHz to 20 MHz 1.875 MHz to 20 MHz 12 kHz to 20 MHz Jitter (Typical) 0.36 ps 0.96 ps 0.52 ps 0.39 ps 0.81 ps 0.34 ps 0.84 ps 0.31 ps 0.74 ps Document Number: 001-10261 Rev. *G Page 2 of 10 [+] Feedback CY2X013 Programming Description The CY2X013 is a programmable device. Prior to being used in an application, it must be programmed with the output frequency and other variables described in Programming Variables. Two different device types are available, each with its own programming flow. They are described in the following sections. Programming Variables Output Frequency The CY2X013 can synthesize a frequency to a resolution of one part per million (ppm), but the actual accuracy of the output frequency is limited by the accuracy of the integrated reference crystal. The CY2X013 has an output frequency range of 50 MHz to 690 MHz, but the range is not continuous. The CY2X013 cannot generate frequencies in the ranges of 521 MHz to 529 MHz and 596 MHz to 617 MHz. Field Programmable CY2X013F Field programmable devices are shipped unprogrammed and must be programmed before being installed on a PCB. Customers use CyClockWizard™ software to specify the device configuration and generate a joint electron devices engineering council (JEDEC - extension .jed) programming file. Programming of samples and prototype quantities is available using the CyClockWizard software along with a CY3675-CLKMAKER1 CyClockMaker Clock Programmer Kit with a CY3675-LCC6A socket adapter. Cypress’s value-added distribution partners also provide programming services. Field-programmable devices are designated with an ‘F’ in the part number. They are intended for quick prototyping and inventory reduction. You can download the software and programmer kit hardware from www.cypress.com by clicking the hyperlinks in the previous paragraph. Pin 1: Output Enable (OE) or Power-Down (PD#) Pin 1 is programmed as either OE or PD#. The OE function is used to enable or disable the CLK output quickly, but it does not reduce core power consumption. The PD# function puts the device into a low-power state, but the wake-up takes longer because the PLL must reacquire the lock. Industrial versus Commercial Device Performance Industrial and commercial devices have different internal crystals. They have a potentially significant impact on performance levels for applications requiring the lowest possible phase noise. CyClockWIzard software allows the user to select between and view the expected performance of both options. Table 2. Device Programming Variables Variable Output frequency Pin 1 function (OE or PD#) Temperature range (commercial or industrial) Factory Configured CY2X013 For ready-to-use devices, the CY2X013 is available with no field programming required. Pre-configured devices (see Standard and Application-Specific Factory Configurations) are available for samples or orders, or a request for a custom configuration can be made. All requests are submitted to the local Cypress field application engineer (FAE) or sales representative. After the request is processed, the user receives a new part number, samples, and datasheet with the programmed values. This part number is used for additional sample requests and production orders. The CY2X013 is one-time programmable (OTP). Document Number: 001-10261 Rev. *G Page 3 of 10 [+] Feedback CY2X013 Absolute Maximum Conditions Parameter VDD VIN[1] TS TJ ESDHBM ΘJA[2] Supply voltage Input voltage, DC Temperature, storage Temperature, junction Electrostatic discharge (ESD) protection human body model (HBM) Thermal resistance, junction to ambient JEDEC Std 22-A114-B 0 m/s airflow Relative to VSS Non operating Description Condition Min –0.5 –0.5 –55 –40 2000 64 Max 4.4 VDD + 0.5 135 135 – Unit V V °C °C V °C / W Operating Conditions Parameter VDD TPU TA 3.3 V supply voltage range 2.5 V supply voltage range Power-up time for VDD to reach minimum specified voltage (power ramp is monotonic) Ambient temperature (commercial) Ambient temperature (industrial) Description Min 3.0 2.375 0.05 0 –40 Typ 3.3 2.5 – – – Max 3.6 2.625 500 70 85 Unit V V ms °C °C DC Electrical Characteristics Parameter IDD[3] Description Operating supply current Condition VDD = 3.6 V, OE/PD# = VDD, output terminated VDD = 2.625 V, OE/PD# = VDD, output terminated Min – – – 247 Typ – – – – Max 125 120 200 454 Unit mA mA μA mV ISB VOD ΔVOD VOS ΔVOS IOZ VIH VIL IIH IIL Standby supply current LVDS differential output voltage PD# = VSS VDD = 3.3 V or 2.5 V, RTERM = 100 Ω between CLK and CLK# VDD = 3.3 V or 2.5 V, RTERM = 100 Ω between CLK and CLK# VDD = 3.3 V or 2.5 V, RTERM = 100 Ω between CLK and CLK# VDD = 3.3 V or 2.5 V, RTERM = 100 Ω between CLK and CLK# Tri-state output, unterminated, measured on one pin while floating the other pin, PD#/OE = VSS Change in VOD between complementary output states LVDS offset output voltage – – 50 mV 1.125 – 1.375 V Change in VOS between complementary output states LVDS output leakage current – – 50 mV μA –35 – 35 Input high voltage Input low voltage Input high current Input low current Input = VDD Input = VSS 0.7 × VDD – – – – – – – – 0.3 × VDD 115 50 V V μA μA CIN[3] Input capacitance, OE/PD# pin – 15 – pF Notes 1. The voltage on any input or I/O pin cannot exceed the power pin during power-up. 2. Simulated. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper (2/1/1/2 oz.). The internal layers are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model. 3. IDD includes ~4 mA of current that is dissipated externally in the output termination resistors. Document Number: 001-10261 Rev. *G Page 4 of 10 [+] Feedback CY2X013 AC Electrical Characteristics The following table lists the AC electrical specifications for this device.[4] Parameter FOUT FSC FSI AG TDC TR, TF TOHZ TOE TLOCK Description Output frequency [5] Condition VDD = min to max, TA = 0 °C to 70 °C VDD = min to max, TA = –40 °C to 85 °C Min 50 – – – Typ – – – – 50 50 0.35 – – – Max 690 ±35 ±55 ±15 55 60 1.0 100 120 5 Unit MHz ppm ppm ppm % % ns ns ns ms Frequency stability, commercial devices[6] Frequency stability, industrial devices[6] Aging, 10 years Output duty cycle Output rise and fall time Output disable time Output enable time Startup time F 450 MHz, measured at zero crossing 20% and 80% of full output swing Time from falling edge on OE to stopped outputs (asynchronous) Time from rising edge on OE to outputs at a valid frequency (asynchronous) Time for CLK to reach valid frequency measured from the time VDD = VDD(min) or from PD# rising edge FOUT = 106.25 MHz (12 kHz to 20 MHz) Pre-defined factory configurations[7] 45 40 – – – – TJitter(φ) RMS phase jitter (random) – 1 See Note 7 – ps ps Switching Waveforms Figure 2. Output Voltage Swing CLK# VOD1 CLK ΔVOD = VOD1 - VOD2 Figure 3. Output Offset Voltage CLK VOD2 50 Ω 50 Ω CLK# VOS Notes 4. Not 100% tested, guaranteed by design and characterization. 5. This parameter is specified in the CyClockWizard software. 6. Frequency stability is the maximum variation in frequency from F0. It includes initial accuracy, and variation from temperature and supply voltage. 7. Typical phase noise specs for factory programmed devices are listed in the Standard and Application-Specific Factory Configurations table on page 2. Document Number: 001-10261 Rev. *G Page 5 of 10 [+] Feedback CY2X013 Figure 4. Duty Cycle Timing CLK TDC = CLK# TPW TPERIOD TPW TPERIOD Figure 5. Output Rise and Fall Time CLK# 20% TR 80% 80% 20% TF CLK Figure 6. Output Enable and Disable Timing OE VIH VIL TOHZ CLK TOE High-Impedance CLK# Termination Circuits Figure 7. LVDS Termination CLK 100 Ω CLK# Document Number: 001-10261 Rev. *G Page 6 of 10 [+] Feedback CY2X013 Ordering Information Part Number Pb-free CY2X013FLXCT CY2X013FLXIT CY2X013LXI062T CY2X013LXI100T CY2X013LXI125T CY2X013LXI156T CY2X013LXI200T [8] [8] Configuration Field-programmable Field-programmable Factory-configured Factory-configured Factory-configured Factory-configured Factory-configured Factory-configured Package Description 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel Product Flow Commercial, 0 °C to 70 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C Industrial, –40 °C to 85 °C CY2X013LXI122T[8] [8] [8] [8] Some product offerings are factory programmed customer specific devices with customized part numbers. The Possible Configurations table shows the available device types, but not complete part numbers. Contact your local Cypress FAE or sales representative for more information. Possible Configurations Part Number[9] Pb-free CY2X013LXCxxxT CY2X013LXIxxxT Factory-configured Factory-configured 6-pin ceramic LCC SMD - tape and reel 6-pin ceramic LCC SMD - tape and reel Commercial, 0 °C to 70 °C Industrial, –40 °C to 85 °C Configuration Package Description Product Flow Ordering Code Definitions CY 2X013 F LX C/I XXX T Tape and reel Custom part configuration code C = Commercial I = Industrial 6-pin LCC package Field programmable device Base part number Company ID : CY = Cypress Notes 8. Device configuration details are described in the Standard and Application-Specific Factory Configurations table on page 2. 9. “xxx” indicates factory programmed parts based on customer specific configuration. For more details, contact your local Cypress FAE or a sales representative. Document Number: 001-10261 Rev. *G Page 7 of 10 [+] Feedback CY2X013 Package Diagram Figure 8. 6-Pin 5.0 × 3.2 mm Ceramic LCC 001-10044 *A Acronyms Acronym ESD FAE HBM JEDEC LCC LVDS OE PCB PLL RMS XO OTP Description electrostatic discharge field application engineer human body model joint electron devices engineering council leadless chip carrier Low-voltage differential signaling output enable printed circuit board phase-locked loop root mean square crystal oscillator one-time programmable Document Conventions Units of Measure Symbol °C mA mV MHz ms ns pF μA Unit of Measure degrees Celsius milliampere millivolts megahertz millisecond nanoseconds picofarads microamperes parts per million picoseconds volts ohms watts ppm ps V Ω W Document Number: 001-10261 Rev. *G Page 8 of 10 [+] Feedback CY2X013 . Document History Page Document Title: CY2X013 LVDS Crystal Oscillator (XO) Document Number: 001-10261 Revision ** *A ECN 504518 2705638 Orig. of Change RGL KVM/AESA Submission Date 09/21/06 05/13/09 New data sheet Removed pull up resistor on pin 1, Pin 2 changed from NC to DNU Added description of frequency range gaps, Removed frequency stability as a programming option; added phase noise / jitter optimization, Max storage temperature changed from 150 to 135°C, Max junction temperature changed from 125 to 135°C, Removed flammability and moisture sensitivity specs, Added thermal resistance data, IDD increased (100mA to 120 mA), conditions changed, and separate spec added for 2.5V supply, Changed IDD values and conditions, Standby current changed from 1mA to 250μA, Changes to IIL and IIH, Added CIN spec, Changed frequency stability and aging specs, Relaxed duty cycle spec added for >450 MHz, Removed period jitter spec, and Revised switching waveform figures Minor ECN to post data sheet to external web Change VOD limits from 250/450 mV to 247/454 mV Change ISB max from 250 μA to 200 μA Add clause to IOZ Condition column Add max limit for TR, TF: 1.0 ns Change TOE max from 100 ns to 120 ns Change TLOCK max from 10 ms to 5 ms Updated data sheet status from Preliminary to Final Updated Ordering Information Added Possible Configurations Updated Package Diagram Added Standard and Application-Specific Factory Configurations table on page 2. Added phase jitter specs for pre-defined configurations in AC Electrical Characteristics (note 7 refers users to the new table on page 2 for typical specs). Added CY2X013LXI100T, CY2X013LXI122T, CY2X013LXI125T, and CY2X013LXI156T devices to Ordering Information and added note 8 to reference the configuration descriptions for each new device. Changed all references to CyberClocksOnline software to CyClockWizard. Removed section on phase noise versus jitter SW optimization. Added CY2X013LXI062T to Standard and Application-Specific Factory Configurations table on page 2 and to Ordering Information table. Added Acronym and Units of Measure table Updated datasheet as per template Added CY2X013LXI200T to Standard and Application-Specific Factory Configurations table on page 2 and to Ordering Information table. Description of Change *B *C 2718898 2768029 WWZ KVM 06/15/09 09/18/09 *D 2897691 KVM 03/23/10 *E 2973338 CXQ 07/08/10 *F 3047226 BASH 10/08/10 *G 3205939 BASH 03/25/11 Document Number: 001-10261 Rev. *G Page 9 of 10 [+] Feedback CY2X013 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations. Products Automotive Clocks & Buffers Interface Lighting & Power Control Memory Optical & Image Sensing PSoC Touch Sensing USB Controllers Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/plc cypress.com/go/memory cypress.com/go/image cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 | PSoC 5 © Cypress Semiconductor Corporation, 2006-2011. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress. Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document Number: 001-10261 Rev. *G Revised March 25, 2011 Page 10 of 10 All products and company names mentioned in this document may be the trademarks of their respective holders. [+] Feedback