0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
SP8690ADG

SP8690ADG

  • 厂商:

    ETC2

  • 封装:

  • 描述:

    SP8690ADG - 200MHz÷8/9/10/11 - List of Unclassifed Manufacturers

  • 数据手册
  • 价格&库存
SP8690ADG 数据手册
ADVANCE INFORMATION DS3647-1·2 SP8690 200MHz410/11 SP8691 200MHz48/9 The SP8690 and SP8691 are low power ECL variable modulus dividers, with both ECL10K and TTL/CMOS compatible outputs. They divide by the lower division ratio when either of the ECL control inputs, PE1 or PE2, is in the high state and by the higher ratio when both are low (or open circuit). CLOCK INPUT 1 2 3 4 5 6 7 8 16 15 14 CLOCK INPUT NC NC NC VEE TTL/CMOS OUTPUT NC ECL OUTPUT FEATURES  PE1 CONTROL INPUTS   PE2 NC VCC NC NC I ECL and TTL/CMOS Compatible Outputs I AC-Coupled Input I Control Inputs ECL Compatible QUICK REFERENCE DATA SP8690 SP8691 13 12 11 10 ECL OUTPUT 9 I Supply Voltage: 25·2V60·25V (ECL), 5V60·25V (TTL) I Power Consumption: 70mW (Typ.) I Temperature Range: 255°C to 1125°C (A Grade) 230°C to 170°C (B Grade) DG16 Fig. 1 Pin connections - top view ABSOLUTE MAXIMUM RATINGS Supply voltage, |VCC2VEE| ECL output current Storage temperature range Max. junction temperature TTL output voltage Input voltage Max. open collector current 8V 10mA 265°C to 1150°C 1175°C 112V 2·5V p-p 15mA ORDERING INFORMATION SP8690 A DG SP8690 B DG SP8691 A DG 5962-87678 (SMD) (SP8690) VCC 5 D1 PE1 PE2 CLOCK INPUT CLOCK INPUT 2 3 Q1 D2 Q2 D3 Q3 D4 Q4 8 ECL OUTPUT Q4 1 16 12 VEE 9 ECL OUTPUT 11 TTL/CMOS OUTPUT Fig. 2 Functional diagram (SP8690) SP8690/SP8691 VCC 5 PE1 PE2 2 3 D1 Q1 D2 Q2 D3 Q3 D4 Q4 8 ECL OUTPUT Q2 CLOCK INPUT CLOCK INPUT 1 16 12 VEE Q4 9 ECL OUTPUT 11 TTL/CMOS OUTPUT Fig. 3 Functional diagram (SP8691) ELECTRICAL CHARACTERISTICS Unless otherwise stated, the Electrical Characteristics are guaranteed over specified supply, frequency and temperature range ECL OPERATION Supply voltage, VCC = 0V, VEE = 25·2V 6 0·25V Temperature, TAMB = 255°C to 1125°C (A Grade), 230°C to 170°C (B Grade) Characteristic Symbol fMAX fMIN IEE VOH VOL VINH VINL tp ts tr Value Min. 200 40 21 20·7 21·5 21·62 9 3 8 Max. MHz MHz mA V V V V ns ns ns Input = 400-800mV p-p Input = 400-800mV p-p VEE = 25·0V VEE = 25·2V (25°C) VEE = 25·2V (25°C) VEE = 25·2V (25°C) VEE = 25·2V (25°C) 5 5 5 Units Conditions Notes Maximum frequency (sinewave input) Minimum frequency (sinewave input) Power supply current ECL output high voltage ECL output low voltage PE input high voltage PE input low voltage Clock to ECL output delay Set-up time Release time 20·85 21·8 20·93 6 3, 6 4, 6 TTL OPERATION Supply voltage, VCC = 5V 6 0·25V, VEE = 0V Temperature, TAMB = 255°C to 1125°C (A Grade), 230°C to 170°C (B Grade) Characteristic Symbol fMAX fMIN IEE VOL VOH tPLH tPHL ts tr Value Min. 200 40 21 0·5 3·75 32 18 3 8 Max. MHz MHz mA V V ns ns ns ns Input = 400-800mV p-p Input = 400-800mV p-p VCC = 5·0V VCC = 5V, RL = 560Ω RL = 560Ω RL = 560Ω RL = 560Ω 5 5 5 5, 7 5, 7 6 6 3, 6 4, 6 Units Conditions Notes Maximum frequency (sinewave input) Minimum frequency (sinewave input) Power supply current TTL output low voltage TTL output high voltage Clock to TTL output high delay,1ve going Clock to TTL output low delay,2ve going Set-up time Release time NOTES 1. The temperature coefficients of VOH = 11·63mV/°C, VOL = 10·94mV/°C and of VIN = 11·22mV/°C. 2. The test configuration for dynamic testing is shown in Fig.8 3. The set-up time ts is defined as the minimum time that can elapse between L→H transition of control input and the next L→H clock pulse transition to ensure that division by the lower modulus is obtained. 4. The release time tr is defined as the minimum time that can elapse between H→L transition of control input and the next L→H clock pulse transition to ensure that division by the higher modulus is obtained. 5. SP8690/1B tested at 25°C only. 6. Guaranteed but not tested. 7. The open collector output is not recommended for use at output frequencies above 15MHz. CLOAD ≤ 5pF. 2 SP8690/SP8691 CLOCK INPUT TRUTH TABLE FOR CONTROL INPUTS tr ts PE1 L H L H PE2 L L H H Division ratio 11 10 10 10 PE INPUTS 6 ECL AND TTL OUTPUTS 5 5 5 Fig. 4 Timing diagram, SP8690 TRUTH TABLE FOR CONTROL INPUTS tr PE INPUTS CLOCK INPUT ts PE1 L H L H PE2 L L H H Division ratio 9 8 8 8 5 ECL AND TTL OUTPUTS 4 4 4 Fig. 5 Timing diagram, SP8691 1200 INPUT AMPLITUDE (mV p-p) 1000 800 600 400 200 0 0 50 100 150 INPUT FREQUENCY (MHz) 200 250 1125°C GUARANTEED * OPERATING WINDOW * Tested as specified in table of Electrical Characteristics 255°C Fig. 6 Typical input characteristics, SP8690/1 j1 j 0.5 j2 j 0.2 j5 0 0.2 0.5 1 2 5 50 2j 0.2 200 2j 0.5 2j 1 2j 2 100 150 2j 5 Fig. 7 Typical input impedance. Test conditions: Supply Voltage = 5.0V, Ambient Temperature = 25°C. Frequencies in MHz, impedances normalised to 50Ω. 3 SP8690/SP8691 VCC 560 2·4k 10n INPUT FROM GENERATOR 33 INPUT MONITOR 33 16 1 10n 20 2 5 11 Q4 9 8 450 450 0.1µ 0.1µ 0.1µ DUT Q4 3 12 OUTPUTS TO SAMPLING SCOPE VEE Fig. 8 Test circuit for dynamic measurements VCC 1·5k TTL CONTROL INPUT (SEE TRUTH TABLES, FIGS. 4 AND 5) 10n CLOCK INPUT 5 1 10k 10k 3·6k O/C 2 3 11 TTL OUTPUT 560 8 16 DIVIDE BY 10/11 (SP8690) 8/9 (SP8691) 9 91 ECL10K OUTPUT 3k 3k 10n 68k BIAS 3k 3k 8 VEE Fig. 9 Typical application showing interfacing. OPERATING NOTES 1. The clock inputs can be single or differentially driven. The clock input is biased internally and is coupled to the signal source with a suitable capacitor. The input signal path is completed by an input reference decoupling capacitor which is connected to ground. 2. In the absence of a signal the device will self-oscillate. If this is undesirable, it may be prevented by connecting a 68kΩ resistor from the input to V EE i.e., from pin 1 or pin 16 to pin 12. This reduces the input sensitiviy by approximately 100mV. 3. The circuit will operate down to DC but slew rate must be better than 100V/ µs. 4. The Q 4 and Q4 outputs are compatible with ECLII but can be interfaced to ECL10K as shown in Fig. 9. 5. The PE inputs are ECLIII/10K compatible and include internal 10kΩ pulldown resistors. Unused inputs can therefore be left open circuit. 6. The input impedance of the SP8690/1 varies as a function of frequency. See Fig. 7. 7. The TTL/CMOS output is a free collector and the high state output voltage will depend on the supply that the collector load is taken to. This should not exceed 12V. 8. The rise/fall time of the open collector output waveform is directly proportional to load capacitance and load resistor value. Therefore, load capacitance should be minimised and the load resistor kept to a minimum consistent with system power requirements. In the test configuration of Fig. 8 the output rise time is approximately 10ns and the fall time 4 SP8690/SP8691 NOTES 5 SP8690/SP8691 PACKAGE DETAILS Dimensions are shown thus: mm (in). 1 5·59/7·87 (0·220/0·310) 16 0·20/0·36 (0·008/0·014) PIN 1 REF NOTCH 7·62 (0·3) NOM CTRS 1·14/1·65 (0·045/0·065) 20·32 (0·800) MAX SEATING PLANE 5·08/(0·20) MAX 0·51 (0·02) 3·18/4·06 MIN (0·125/0·160) 0·36/0·58 (0·014/0·23) 16 LEADS AT 2·54 (0·10) NOM. SPACING NOTES 1. Controlling dimensions are inches. 2. This package outline diagram is for guidance only. Please contact your GPS Customer Service Centre for further information. 16-LEAD CERAMIC DIL – DG16 HEADQUARTERS OPERATIONS GEC PLESSEY SEMICONDUCTORS Cheney Manor, Swindon, Wiltshire SN2 2QW, United Kingdom. Tel: (0793) 518000 Fax: (0793) 518411 GEC PLESSEY SEMICONDUCTORS P.O. Box 660017 1500 Green Hills Road, Scotts Valley, CA95067-0017 United States of America. Tel (408) 438 2900 Fax: (408) 438 5576 CUSTOMER SERVICE CENTRES G FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45 Fax : (1) 64 46 06 07 G GERMANY Munich Tel: (089) 3609 06-0 Fax : (089) 3609 06-55 G ITALY Milan Tel: (02) 66040867 Fax: (02) 66040993 G JAPAN Tokyo Tel: (3) 5276-5501 Fax: (3) 5276-5510 G NORTH AMERICA Scotts Valley, USA Tel: (408) 438 2900 Fax: (408) 438 7023. G SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872 G SWEDEN Stockholm Tel: 46 8 702 97 70 Fax: 46 8 640 47 36 G UK, EIRE, DENMARK, FINLAND & NORWAY Swindon Tel: (0793) 518510 Fax : (0793) 518582 These are supported by Agents and Distributors in major countries world-wide. © GEC Plessey Semiconductors 1994 Publication No. DS3647 Issue No. 1.2 March 1994 This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior knowledge the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company's conditions of sale, which are available on request. 6
SP8690ADG 价格&库存

很抱歉,暂时无法提供与“SP8690ADG”相匹配的价格&库存,您可以联系我们找货

免费人工找货