IRFR430ATRPBF

IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Low Gate Charge Qg Results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness • Fully Characterized Capacitance and Avalanche Voltage and Current • Effective Coss Specified • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 500 RDS(on) () VGS = 10 V 1.7 Qg (Max.) (nC) 24 Qgs (nC) 6.5 Qgd (nC) 13 Configuration Single D DPAK (TO-252) IPAK (TO-251) APPLICATIONS D D • Switch Mode Power Supply (SMPS) G • Uninterruptible Power Supply G S G • High Speed Power Switching D S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251) SiHFR430A-GE3 SiHFR430ATR-GE3a SiHFR430ATRL-GE3a SiHFR430ATRR-GE3a SiHFU430A-GE3 IRFR430APbF IRFR430ATRPbFa IRFR430ATRLPbFa IRFR430ATRRPbFa IRFU430APbF SiHFR430A-E3 SiHFR430AT-E3a SiHFR430ATL-E3a SiHFR430ATR-E3a SiHFU430A-E3 Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 500 Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C Pulsed Drain Currenta ID IDM Linear Derating Factor UNIT V 5.0 3.2 A 20 0.91 W/°C EAS 130 mJ Currenta IAR 5.0 A Repetitive Avalanche Energya EAR 11 mJ Single Pulse Avalanche Energyb Repetitive Avalanche Maximum Power Dissipation TC = 25 °C Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d for 10 s PD 110 W dV/dt 3.0 V/ns TJ, Tstg - 55 to + 150 300 °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 11 mH, Rg = 25 , IAS = 5.0 A (see fig. 12). c. ISD  5.0 A, dI/dt  320 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. S12-0168-Rev. D, 04-Feb-13 Document Number: 91276 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.1 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 500 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.60 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.5 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) gfs VGS = ± 30 V - - ± 100 VDS = 500 V, VGS = 0 V - - 25 VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 - - 1.7  2.3 - - S - 490 - ID = 3.0 Ab VGS = 10 V VDS = 50 V, ID = 3.0 A μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Output Capacitance Coss Effective Output Capacitance VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V Coss eff. - 75 - - 4.5 - VDS = 1.0 V, f = 1.0 MHz - 750 - VDS = 400 V, f = 1.0 MHz - 25 - - 51 - - - 24 VDS = 0 V to 400 Vc Total Gate Charge Qg Gate-Source Charge Qgs - - 6.5 Gate-Drain Charge Qgd - - 13 Turn-On Delay Time td(on) - 8.7 - Rise Time Turn-Off Delay Time Fall Time tr td(off) VGS = 10 V ID = 5.0 A, VDS = 400 V, see fig. 6 and 13b VDD = 250 V, ID = 5.0 A, Rg = 15 , RD = 50 , see fig. 10b tf pF pF nC - 27 - - 17 - - 16 - - - 5.0 - - 20 - - 1.5 - 410 620 ns - 1.4 2.1 μC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 5.0 A, VGS = 0 Vb TJ = 25 °C, IF = 5.0 A, dI/dt = 100 A/μsb V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. S12-0168-Rev. D, 04-Feb-13 Document Number: 91276 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 100 100.00 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 ID, Drain-to-Source Current (Α ) ID, Drain-to-Source Current (A) TOP 1 0.1 4.5V 0.01 10.00 T J = 150°C 1.00 T J = 25°C 0.10 20μs PULSE WIDTH Tj = 25°C VDS = 100V 20μs PULSE WIDTH 0.01 0.001 0.1 1 10 100 4.0 6.0 Fig. 1 - Typical Output Characteristics 100 3.0 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 14.0 16.0 I D = 5.0A 0.1 20μs PULSE WIDTH Tj = 150°C 0.01 1 10 VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics 100 2.0 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 4.5V S12-0168-Rev. D, 04-Feb-13 12.0 2.5 1 0.1 10.0 Fig. 3 - Typical Transfer Characteristics TOP 10 8.0 VGS, Gate-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) 1.5 1.0 0.5 V GS = 10V 0.0 -60 -40 -20 0 20 40 60 TJ , Junction Temperature 80 100 120 140 160 ( ° C) Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91276 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com 10000 100 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd 1000 Ciss I SD , Reverse Drain Current (A) C, Capacitance(pF) Vishay Siliconix 100 Coss 10 Crss 10 TJ = 25 ° C TJ = 150 ° C 1 1 1 10 100 V GS= 0 V 1000 0.1 0.2 VDS, Drain-to-Source Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage 1.4 OPERATION IN THIS AREA LIMITED BY R DS(on) VDS = 400V VDS = 250V VDS = 100V 10 VGS , Gate-to-Source Voltage (V) 1.1 100 I D = 5.0A 7 5 2 10 100μsec 1 1msec 0.1 0 0 0.8 Fig. 7 - Typical Source-Drain Diode Forward Voltage ID , Drain-to-Source Current (A) 12 0.5 V SD,Source-to-Drain Voltage (V) 4 8 12 16 20 QG , Total Gate Charge (nC) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S12-0168-Rev. D, 04-Feb-13 Tc = 25°C Tj = 150°C Single Pulse 10 10msec 100 1000 10000 VDS , Drain-toSource Voltage (V) Fig. 8 - Maximum Safe Operating Area Document Number: 91276 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix 5.5 RD VDS VGS ID , Drain Current (A) 4.4 D.U.T. Rg + - VDD 10 V 3.3 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 2.2 Fig. 10a - Switching Time Test Circuit 1.1 90 % VDS 0.0 25 50 75 100 125 10 % VGS 150 ( ° C) TC , Case Temperature td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms (Z thJC ) 10 1 Thermal Response D = 0.50 0.20 P DM 0.10 0.1 0.05 t1 SINGLE PULSE (THERMAL RESPONSE) 0.02 0.01 t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC +TC 0.1 1 t1, Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp L VDS D.U.T Rg IAS 20 V tp Driver + A - VDD IAS 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit S12-0168-Rev. D, 04-Feb-13 Fig. 12b - Unclamped Inductive Waveforms Document Number: 91276 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix 5.0 250 EAS , Single Pulse Avalanche Energy (mJ) 200 TOP 2.2A 3.2A BOTTOM 5.0A VGS(th) Gate threshold Voltage (V) ID 150 100 50 4.5 ID = 250μA 4.0 3.5 3.0 2.5 -75 0 25 50 75 100 Starting Tj, Junction Temperature 125 -50 -25 0 25 50 75 100 125 150 150 T J , Temperature ( °C ) ( ° C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Threshold Voltage vs. Temperature Current regulator Same type as D.U.T. 50 kΩ QG VGS 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform S12-0168-Rev. D, 04-Feb-13 Fig. 13b - Gate Charge Test Circuit Document Number: 91276 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR430A, IRFU430A, SiHFR430A, SiHFU430A www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91276. S12-0168-Rev. D, 04-Feb-13 Document Number: 91276 7 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-252AA Case Outline E MILLIMETERS A C2 e b2 D1 e1 E1 L gage plane height (0.5 mm) L4 b L5 H D L3 b3 C A1 INCHES DIM. MIN. MAX. MIN. MAX. A 2.18 2.38 0.086 0.094 A1 - 0.127 - 0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 b3 4.95 5.46 0.195 0.215 0.024 C 0.46 0.61 0.018 C2 0.46 0.89 0.018 0.035 D 5.97 6.22 0.235 0.245 D1 4.10 - 0.161 - E 6.35 6.73 0.250 0.265 E1 4.32 - 0.170 - H 9.40 10.41 0.370 0.410 e 2.28 BSC e1 0.090 BSC 4.56 BSC 0.180 BSC L 1.40 1.78 0.055 0.070 L3 0.89 1.27 0.035 0.050 L4 - 1.02 - 0.040 L5 1.01 1.52 0.040 0.060 ECN: T13-0359-Rev. O, 03-Jun-13 DWG: 5347 Notes • Dimension L3 is for reference only. • Xi’an, Mingxin, and GEM SH actual photo. Revision: 03-Jun-13 Document Number: 71197 1 For technical questions, contact: pmostechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-251AA (HIGH VOLTAGE) 4 3 E1 E Thermal PAD 4 b4 θ2 4 A 0.010 0.25 M C A B L2 4 c2 A θ1 B D D1 A C 3 Seating plane 5 C L1 L3 (Datum A) C L B B A A1 3 x b2 View A - A 2xe c 3xb 0.010 0.25 M C A B Plating 5 b1, b3 Base metal Lead tip c1 (c) 5 (b, b2) Section B - B and C - C MILLIMETERS DIM. MIN. MAX. INCHES MIN. MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 2.18 2.39 0.086 0.094 D1 5.21 - 0.205 - A1 0.89 1.14 0.035 0.045 E 6.35 6.73 0.250 0.265 4.32 - 0.170 - b 0.64 0.89 0.025 0.035 E1 b1 0.65 0.79 0.026 0.031 e b2 0.76 1.14 0.030 0.045 L 8.89 9.65 0.350 0.380 b3 0.76 1.04 0.030 0.041 L1 1.91 2.29 0.075 0.090 b4 4.95 5.46 0.195 0.215 L2 0.89 1.27 0.035 0.050 2.29 BSC 2.29 BSC c 0.46 0.61 0.018 0.024 L3 1.14 1.52 0.045 0.060 c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15' c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35' D 5.97 6.22 0.235 0.245 ECN: S-82111-Rev. A, 15-Sep-08 DWG: 5968 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension are shown in inches and millimeters. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions b4, L2, E1 and D1. 5. Lead dimension uncontrolled in L3. 6. Dimension b1, b3 and c1 apply to base metal only. 7. Outline conforms to JEDEC outline TO-251AA. Document Number: 91362 Revision: 15-Sep-08 www.vishay.com 1 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR DPAK (TO-252) 0.224 0.243 0.087 (2.202) 0.090 (2.286) (10.668) 0.420 (6.180) (5.690) 0.180 0.055 (4.572) (1.397) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72594 Revision: 21-Jan-08 www.vishay.com 3 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000